* rtl.h (rtl_size): Declare.
(rtunion): Remove rtwint.
(rtx_def): Replace 'fld' with a union of an rtunion or a HOST_WIDE_INT.
(RTX_HDR_SIZE, RTX_SIZE): New macros.
(RTL_CHECK1): Adjust for new rtx_def layout.
(RTL_CHECK2, RTL_CHECKC1, RTL_CHECKC2): Likewise.
(XWINT, XCWINT): Likewise. Access the rtx structure directly.
(X0WINT): Remove.
(X0ANY): New macro.
* rtl.def: Adjust comments for new rtx_def layout.
* ggc.h (ggc_alloc_rtx): Take the rtx code as argument, not the
number of slots.
* rtl.c (rtx_size): New array.
(rtx_alloc): Adjust call to ggc_alloc_rtx. Use RTX_HDR_SIZE.
(copy_rtx): Use RTX_HDR_SIZE. Adjust for new rtx_def layout.
(shallow_copy_rtx): Adjust call to ggc_alloc_rtx. Use RTX_SIZE.
* integrate.c (copy_rtx_and_substitute): Use X0ANY to copy '0' fields.
* emit-rtl.c (copy_most_rtx): Likewise.
(copy_rtx_if_shared): Use RTX_SIZE.
(copy_insn_1): Use RTX_HDR_SIZE. Adjust for new rtx_def layout.
* gengenrtl.c (gendef): Adjust ggc_alloc_rtx call. Use RTX_HDR_SIZE.
* gengtype.c (write_rtx_next): Use RTX_HDR_SIZE.
(adjust_field_rtx_def): Expect "rtx_def" to be a union rather than
an array. Adjust output for new rtx_def layout.
* ggc-page.c (RTL_SIZE): Use RTX_HDR_SIZE.
* reload1.c (eliminate_regs): Use RTX_SIZE.
* rtlanal.c (loc_mentioned_in_p): Adjust for new rtx_def layout.
* gdbinit.in (pi): Likewise.
From-SVN: r72647
* gengenrtl.c (find_formats, genheader): Make i an unsigned
int, remove cast of NUM_RTX_CODE.
* machmode.h: Make the HAVE_MACHINE_MODES #ifdef encompass the
entire file. Remove the #ifs on GET_MODE_MASK etc and
GET_MODE_WIDER_MODE etc.
From-SVN: r72321
* genmodes.c, mode-classes.def: New files.
* machmode.def: Rewritten to genmodes.c interface.
* Makefile.in (extra_modes_file): New substitution variable.
(MACHMODE_H): No longer includes machmode.def or
@extra_modes_file@; instead, mode-classes.def and insn-modes.h.
(BUILD_RTL): Add $(BUILD_PREFIX)insn-modes.o.
(OBJS-common): Add insn-modes.o.
(STAGESTUFF): Add insn-modes.c, insn-modes.h, s-modes, and
genmodes$(build_exeext).
(insn-modes.o, insn-modes.c, insn-modes.h, s-modes, genmodes.o,
genmodes$(build_exeext), $(BUILD_PREFIX_1)insn-modes.o): New targets.
(s-genrtl): Don't depend on $(RTL_BASE_H).
(gengenrtl.o): Don't depend on coretypes.h, $(GTM_H), real.h,
or $(RTL_BASE_H); just rtl.def.
* gengenrtl.c: Don't include coretypes.h, tm.h, rtl.h, or
real.h. Give fake definition of CONST_DOUBLE_FORMAT and
substitute definition of NUM_RTX_CODE. Add casts to avoid
warnings.
* machmode.h: Include insn-modes.h, not machmode.def. Include
mode-classes.def to define enum mode_class. Tweak definitions
of GET_MODE_CLASS, GET_MODE_SIZE, GET_MODE_BITSIZE, GET_MODE_MASK,
GET_MODE_INNER, GET_MODE_WIDER_MODE, GET_CLASS_NARROWEST_MODE.
(inner_mode_array): Renamed mode_inner.
(mode_base_align): New.
* rtl.c (mode_name, mode_class, mode_bitsize, mode_size,
mode_unit_size, mode_wider_mode, mode_mask_array,
inner_mode_array, class_narrowest_mode): Delete definitions.
* stor-layout.c (get_mode_alignment): Use mode_base_align.
* real.h: Use MIN_MODE_FLOAT and MAX_MODE_FLOAT, not QFmode
and TFmode, in real_format_for_mode and REAL_MODE_FORMAT.
* config/ip2k/ip2k.h, config/iq2000/iq2000.h:
No need to define BITS_PER_UNIT.
From-SVN: r72313
* rtl.h (gen_rtx_CONST_VECTOR): Declare.
* gengenrtl.c (special_rtx): Check for CONST_VECTOR.
* emit-rtl.c (gen_rtx_CONST_VECTOR): New function.
(gen_const_vector_0): Use it.
From-SVN: r55395
* gcse.c (gcse_emit_move_after): New.
(pre_delete, hoist_store): Use it.
* reload1.c (emit_input_reload_insns): Use constrain_operands
instead of constraint_accepts_reg_p to verify optimization.
(constraint_accepts_reg_p): Kill
* reload1.c (reload_cse_delete_noop_set): Kill.
(reload_cse_simplify): use delte_insn_and_edges.
From-SVN: r54105
* emit-rtl.c (global_rtl): Update comment.
(const_double_htab, const_double_htab_hash,
const_double_htab_hash, lookup_const_double): New.
(const_int_htab_hash, const_int_htab_eq): Remove const
qualifiers, which cause tons of warnings with RTL checking on.
(gen_rtx_CONST_DOUBLE): Deleted.
(const_double_from_real_value): New function - bears some
resemblance to the former immed_real_const_1.
(immed_double_const): Moved here from varasm.c and
simplified.
(gen_rtx_REG): Make REGNO unsigned to squelch warnings.
(gen_rtx_SUBREG): Use gen_rtx_raw_SUBREG.
(gen_rtx): Use immed_double_const.
(init_emit_once): Initialize the const_double_htab. Use
REAL_VALUE_FROM_INT where possible. Can now use
CONST_DOUBLE_FROM_REAL_VALUE when setting up const_tiny_rtx.
* varasm.c (struct varasm_status): Remove x_const_double_chain.
(const_double_chain, immed_real_const, clear_const_double_mem): Delete.
(immed_double_const, immed_real_const_1): Moved to emit-rtl.c.
(init_varasm_status, mark_varasm_status): Don't touch
x_const_double_chain.
* output.h: Delete prototype for clear_const_double_mem.
* real.h: Make REAL_VALUE_TYPE a macro again. Remove leading
'0' slot from all CONST_DOUBLE_FORMAT definitions. Prototype
const_double_from_real_value, not immed_real_const_1, and use
it to define CONST_DOUBLE_FROM_REAL_VALUE. Define new macro
CONST_DOUBLE_ATOF.
* rtl.h (CONST_DOUBLE_CHAIN): Kill.
(CONST_DOUBLE_LOW, CONST_DOUBLE_HIGH): Adjust.
(gen_rtx_CONST_DOUBLE, immed_real_const): Delete prototypes.
(gen_rtx_REG): Second arg is unsigned.
* gengenrtl.c (special_rtx): Take out CONST_DOUBLE.
(excluded_rtx): New, return true for CONST_DOUBLE.
(genmacro): Write nothing for excluded codes.
* combine.c (combine_simplify_rtx): Use CONST_DOUBLE_FROM_REAL_VALUE.
* expr.c (expand_expr): Likewise.
* ggc-common.c (ggc_mark_rtx_children_1): Don't mark the
CONST_DOUBLE_CHAIN.
* toplev.c (rest_of_compilation): Don't call
clear_const_double_mem.
* config/rs6000/rs6000.c (rs6000_float_const): Delete.
(rs6000_hash_constant): Remove CONST_DOUBLE special case.
(toc_hash_eq): Remove CONST_DOUBLE and LABEL_REF special cases.
* config/rs6000/rs6000-protos.h: Don't prototype rs6000_float_const.
* config/c4x/c4x.md, config/rs6000/rs6000.md: Use CONST_DOUBLE_ATOF.
* config/dsp16xx/dsp16xx.md, config/mips/mips.md,
config/pa/pa.md: Use CONST_DOUBLE_FROM_REAL_VALUE.
* config/sparc/sparc.md, config/sparc/sparc.c: Use immed_double_const.
From-SVN: r53409
* real.h: Define REAL_VALUE_TYPE_SIZE as 96 or 160, as
appropriate. Document need for extended precision even when
MAX_LONG_DOUBLE_TYPE_SIZE is smaller. Define REAL_WIDTH here,
based on REAL_VALUE_TYPE_SIZE. Use REAL_WIDTH to size
REAL_VALUE_TYPE. Define CONST_DOUBLE_FORMAT here. Use #error
instead of relying on later syntax error when REAL_WIDTH > 5.
* real.c: Define NE based only on whether or not we have a
full 128-bit extended type (not INTEL_EXTENDED_IEEE_FORMAT).
Require sizeof(REAL_VALUE_TYPE) == 2*NE. Unconditionally
define GET_REAL and PUT_REAL as simple memcpy operations; no
need to byteswap or round.
Use #error instead of #ifdef-ing out the entire file, for
prompt error detection.
* rtl.c, gengenrtl.c: No need to calculate CONST_DOUBLE_FORMAT here.
From-SVN: r52502
2001-04-03 Jakub Jelinek <jakub@redhat.com>
David S. Miller <davem@pierdol.cobaltmicro.com>
Andrew MacLeod <amacleod@redhat.com>
Use byte offsets in SUBREGs instead of words.
* alias.c (nonlocal_mentioned_p): Use subreg_regno function.
* caller-save.c (mark_set_regs): Change callers of subreg_hard_regno
to pass new argument.
(add_stored_regs): Use subreg_regno_offset function.
* calls.c (expand_call): For non-paradoxical SUBREG take endianess
into account.
(precompute_arguments): Use gen_lowpart_SUBREG.
* combine.c (try_combine): Replace explicit XEXP with SUBREG_REG.
(combine_simplify_rtx): Rework to use SUBREG_BYTE.
(simplify_set): Rework to use SUBREG_BYTE.
(expand_field_assignment): Use SUBREG_BYTE.
(make_extraction): Use SUBREG_BYTE.
(if_then_else_cond): Use SUBREG_BYTE.
(apply_distributive_law): Use SUBREG_BYTE and fixup subreg comments.
(gen_lowpart_for_combine): Compute full byte offset.
* cse.c (mention_regs): Use SUBREG_BYTE.
(remove_invalid_subreg_refs): Rework to use SUBREG_BYTE.
(canon_hash): Use SUBREG_BYTE.
(fold_rtx): Pass SUBREG_BYTE div UNITS_PER_WORD to operand_subword.
(gen_lowpart_if_possible): Formatting.
* dbxout.c (dbxout_symbol_location): Compute SUBREG hard regnos
correctly.
* dwarf2out.c (is_pseudo_reg): Fixup explicit XEXP into SUBREG_REG
(mem_loc_descriptor): Fixup explicit XEXP into SUBREG_REG
(loc_descriptor): Fixup explicit XEXP into SUBREG_REG
* dwarfout.c (is_pseudo_reg): Fixup explicit XEXP into SUBREG_REG
(output_mem_loc_descriptor): Fixup explicit XEXP into SUBREG_REG
(output_loc_descriptor): Fixup explicit XEXP into SUBREG_REG
* emit-rtl.c (gen_rtx_SUBREG): New function, used to verify
certain invariants about SUBREGs the compiler creates.
(gen_lowpart_SUBREG): New function.
(subreg_hard_regno): New function to get the final register number.
(gen_lowpart_common): Use SUBREG_BYTE.
(gen_imagpart): Spacing nits.
(subreg_realpart_p): Use SUBREG_BYTE.
(gen_highpart): Use SUBREG_BYTE.
(subreg_lowpart_p): Always compute endian corrected goal offset,
even at the byte level, then compare against that.
(constant_subword): New function, pulled out all constant cases
from operand_subword and changed second argument name to offset.
(operand_subword): Detect non REG/SUBREG/CONCAT/MEM cases early
and call constant_subword to do the work. Return const0_rtx if
looking for a word outside of OP.
(operand_subword_force): Change second arg name to offset.
* expmed.c (store_bit_field): Use SUBREG_BYTE.
(store_split_bit_field): Use SUBREG_BYTE.
(extract_bit_field): Use SUBREG_BYTE.
(extract_split_bit_field): Use SUBREG_BYTE.
(expand_shift): Use SUBREG_BYTE.
* expr.c (store_expr, expand_expr): Use gen_lowpart_SUBREG.
* final.c (alter_subreg) Use subreg_hard_regno and SUBREG_BYTE.
* flow.c (set_noop_p): Use SUBREG_BYTE.
(mark_set_1): Remove ALTER_HARD_SUBREG. Use subreg_regno_offset instead.
* function.c (fixup_var_refs_1): Fixup explicit XEXP into a SUBREG_REG.
(fixup_memory_subreg): Use SUBREG_BYTE and remove byte endian
correction code.
(optimize_bit_field): Use SUBREG_BYTE.
(purge_addressof_1): Use SUBREG_BYTE.
(purge_single_hard_subreg_set): Use subreg_regno_offset function.
(assign_params): Mark arguments SUBREG_PROMOTED_VAR_P if they are
actually promoted by the caller and PROMOTE_FOR_CALLS_ONLY is true.
* gengenrtl.c (special_rtx): Add SUBREG.
* global.c (mark_reg_store): Use SUBREG_BYTE.
(set_preference): Rework to use subreg_regno_offset and SUBREG_BYTE.
* ifcvt (noce_emit_move_insn): Use SUBREG_BYTE.
* integrate.c (copy_rtx_and_substitute): Use SUBREG_BYTE and make sure
final byte offset is congruent to subreg's mode size.
(subst_constants): Use SUBREG_BYTE.
(mark_stores): Use subreg_regno_offset function.
* jump.c (rtx_renumbered_equal_p, true_regnum): Use subreg_regno_offset
function and SUBREG_BYTE.
* local-alloc.c (combine_regs): Use subreg_regno_offset function.
(reg_is_born): Use subreg_hard_regno.
* recog.c (valid_replace_rtx_1): Use SUBREG_BYTE and remove byte
endian correction code. Don't combine subregs unless resulting
offset aligns with type. Fix subreg constant extraction for DImode.
Simplify SUBREG of VOIDmode CONST_DOUBLE.
(general_operand): Remove dead mode_altering_drug code.
(indirect_operand): Use SUBREG_BYTE.
(constrain_operands): Use subreg_regno_offset function.
* reg-stack.c (get_true_reg): Use subreg_regno_offset function.
* regmove.c (regmove_optimize): Use SUBREG_BYTE.
(optimize_reg_copy_3): Use gen_lowpart_SUBREG.
* regs.h (REG_SIZE): Allow target to override.
(REGMODE_NATURAL_SIZE): New macro which target can override.
* reload.c (reload_inner_reg_of_subreg): subreg_regno should be used
on the entire subreg rtx.
(push_reload): Use SUBREG_BYTE in comments and code.
(find_dummy_reload): Use subreg_regno_offset. Only adjust offsets
for hard registers inside subregs.
(operands_match_p): Use subreg_regno_offset.
(find_reloads): Use SUBREG_BYTE and only advance offset for subregs
containing hard regs.
(find_reload_toplev): Use SUBREG_BYTE. Remove byte endian
corrections when fixing up MEM subregs.
(find_reloads_address_1): Use SUBREG_BYTE, subreg_regno, and
subreg_regno_offset where appropriate.
(find_reloads_subreg_address): Use SUBREG_BYTE. Remove
byte endian corrections when fixing up MEM subregs.
(subst_reloads): When combining two subregs, make sure final
offset is congruent to subreg's mode size.
(find_replacement): Use SUBREG_BYTE and subreg_regno_offset.
(refers_to_regno_for_reload_p): Use subreg_regno.
(reg_overlap_mentioned_for_reload_p): Use subreg_regno_offset.
* reload1.c (eliminate_regs) Use SUBREG_BYTE. Remove byte endian
correction code for memory subreg fixups.
(forget_old_reload_1): Use subreg_regno_offset.
(choose_reload_regs): Use subreg_regno.
(emit_input_reload_insns): Use SUBREG_BYTE.
(reload_combine_note_store): Use subreg_regno_offset.
(move2add_note_store): Use subreg_regno_offset.
* resource.c (update_live_status, mark_referenced_resources): Use
subreg_regno function.
(mark_set_resources): Use subreg_regno function.
* rtl.h (SUBREG_WORD): Rename to SUBREG_BYTE.
(subreg_regno_offset, subreg_regno): Define prototypes.
(subreg_hard_regno, constant_subword, gen_rtx_SUBREG): Newi functions.
(gen_lowpart_SUBREG): Add prototype.
* rtl.texi (subreg): Update to reflect new byte offset representation.
Add mentioning of the effect that BYTES_BIG_ENDIAN has on subregs now.
* rtlanal.c (refers_to_regno_p): Use subreg_regno.
(reg_overlap_mentioned_p): Use subreg_regno.
(replace_regs); Make sure final offset of combined subreg is
congruent to size of subreg's mode.
(subreg_regno_offset): New function.
(subreg_regno): New function.
* sched-vis.c (print_value): Change SUBREG_WORD to SUBREG_BYTE.
* sdbout.c (sdbout_symbol): Compute offset using alter_subreg.
* stmt.c (expand_anon_union_decl): Use gen_lowpart_SUBREG.
* tm.texi (ALTER_HARD_SUBREG): Remove, it is now dead.
(SUBREG_REGNO_OFFSET): Describe SUBREG_REGNO_OFFSET overrides.
* config/a29k/a29k.c (gpc_reg_operand): Use subreg_regno.
(a29k_get_reloaded_address): Use SUBREG_BYTE.
(print_operand): Use SUBREG_BYTE.
* config/alpha/alpha.c (print_operand_address): Use SUBREG_BYTE.
* config/arm/arm.c (arm_reload_in_hi): Use SUBREG_BYTE.
(arm_reload_out_hi): Use SUBREG_BYTE.
* config/d30v/d30v.c (d30v_split_double): Use subreg_regno_offset
instead of SUBREG_WORD.
(d30v_print_operand_memory_reference): Use subreg_regno_offset.
* config/dsp16xx/dsp16xx.md (extendqihi2, zero_extendqihi2): Fix
SUBREG creation to use byte offset.
* config/h8300/h8300.md (Unnamed HImode zero extraction and 16bit
inverted load insns): Fix explicit rtl subregs to use byte
offsets.
* config/i370/i370.md (cmpstrsi, movstrsi, mulsi3, divsi3,
udivsi3, umodsi3): Generate SUBREGs with byte offsets.
* config/i860/i860.c (single_insn_src_p): Use SUBREG_BYTE.
* config/i860/i860.md (mulsi3_big): Fixup explicit SUBREGs in rtl
to use byte offsets.
(unnamed fmlow.dd insn): Fixup SUBREGS to use byte offsets.
* config/i960/i960.md (extendhisi2): Generate SUBREGs with byte
offsets, also make sure it is congruent to SUBREG's mode size.
(extendqisi2, extendqihi2, zero_extendhisi2, zero_extendqisi2,
unnamed ldob insn): Generate SUBREGs with byte offset.
(zero_extendqihi2): SUBREG's are byte offsets.
* config/m68hc11/m68hc11.c (m68hc11_gen_lowpart): Use SUBREG_BYTE.
(m68hc11_gen_highpart): Use SUBREG_BYTE.
* config/m68k/m68k.md (zero_extendhisi2, zero_extendqihi2,
zero-extendqisi2): Generate SUBREGs with byte offset.
(umulsidi3, mulsidi3, subreghi1ashrdi_const32,
subregsi1ashrdi_const32, subreg1lshrdi_const32): Fixup explicit
subregs in rtl to use byte offsets.
* config/m88k/m88k.md (extendsidi2): fixup subregs to use byte offset.
* config/mips/mips.c (mips_move_1word): Use subreg_regno_offset.
(mips_move_2words): Use subreg_regno_offset.
(mips_secondary_reload_class): Use subreg_regno_offset.
* config/mips/mips.md (DImode plus, minus, move, and logical op
splits): Fixup explicit subregs in rtl to use byte offsets.
* config/mn10200/mn10200.c (print_operand): Use subreg_regno function.
* config/mn10300/mn10300.c (print_operand): Use subreg_regno function.
* config/ns32k/ns32k.md (udivmoddisi4): Fix explicit subregs in
rtl to use byte offsets.
* config/pa/pa.c (emit_move_sequence): Use SUBREG_BYTE.
* config/pa/pa.md (floatunssisf2, floatunssidf2, mulsi3): fix explicit
subregs to use byte offsets.
* config/pdp11/pdp11.md (zero_extendhisi2, modhi3, modhi3+1):
Fixup explicit subregs in rtl to use byte offsets.
* config/romp/romp.c (memory_offset_in_range_p): Use SUBREG_BYTE
and remove byte endian correction code.
* config/sh/sh.c (output_movedouble): Use subreg_regno.
(gen_ashift_hi): Use SUBREG_BYTE.
(regs_used): Use subreg_regno_offset.
(machine_dependent_reorg): Use subreg_regno_offset.
* config/sh/sh.h (INDEX_REGISTER_RTX_P): Use SUBREG_BYTE.
* config/sh/sh.md (DImode and DFmode move splits): Use subreg_regno.
(movdf_i4): Subregs are byte offsets now.
* config/sparc/sparc.c (ultra_find_type): Use SUBREG_BYTE.
* config/sparc/sparc.h (ALTER_HARD_SUBREG): Removed.
(REGMODE_NATURAL_SIZE): Override.
(REG_SIZE): For SUBREG check float mode on SUBREG_REG's mode.
* config/sparc/sparc.md (TFmode move splits): Generate SUBREGs
with byte offsets.
(zero_extendhisi2, zero_extendqidi2_insn, extendhisi2,
extendqihi2, sign_extendqihi2_insn, sign_extendqisi2_insn,
extendqidi2): Generate SUBREGs with byte offsets, also make sure
it is congruent to SUBREG's mode size.
(smulsi3_highpart_v8plus): Fix explicit subregs in rtl to use byte
offsets.
(cmp_siqi_trunc, cmp_siqi_trunc_set, cmp_diqi_trunc,
cmp_diqi_trunc_set, lshrdi3_v8plus+1, lshrdi3_v8plus+2,
lshrdi3_v8plus+3, lshrdi3_v8plus+4): Use proper
SUBREG_BYTE offset for non-paradoxical subregs in patterns.
* config/v850/v850.c (print_operand, output_move_double): Use
subreg_regno function.
Co-Authored-By: Andrew MacLeod <amacleod@redhat.com>
Co-Authored-By: David S. Miller <davem@pierdol.cobaltmicro.com>
From-SVN: r41058
toplevel:
* ggc-none.c, ggc-simple.c, ggc-page.c (ggc_alloc_obj): Rename
it ggc_alloc, drop second argument, never clear returned memory.
* ggc-common.c (ggc_alloc_string): Use ggc_alloc.
(ggc_alloc_cleared): New.
* ggc.h: Prototype ggc_alloc and ggc_alloc_cleared, not
ggc_alloc_obj. Remove ggc_alloc macro.
(ggc_alloc_rtx, ggc_alloc_rtvec, ggc_alloc_tree): Use ggc_alloc.
* rtl.c (rtvec_alloc): Clear the vector always.
(rtx_alloc): Clear the first word always. Remove dirty
obstack tricks (this routine is no longer a bottleneck).
* tree.c (make_node): Clear the new node always.
(make_tree_vec): Likewise.
(tree_cons): Clear the common structure always.
(build1): Likewise; also, clear TREE_COMPLEXITY.
* gengenrtl.c: Use puts wherever possible. Remove extra
newlines.
(gendef): Clear the first word of an RTX in the generator
function, irrespective of ggc_p. Initialize '0' slots to
NULL.
(genlegend): Don't generate obstack_alloc_rtx routine, just a
thin wrapper macro around obstack_alloc.
* stmt.c (expand_fixup): Use ggc_alloc.
* c-typeck.c (add_pending_init): Use ggc_alloc.
* emit-rtl.c (init_emit_once): Clear CONST_DOUBLE_CHAIN(tem).
* varasm.c (immed_double_const): Set CONST_DOUBLE_MEM(r) to
const0_rtx when it is created.
(immed_real_const_1): Set CONST_DOUBLE_CHAIN(r) to NULL_RTX if
we are not in a function.
* tree.c (tree_class_check_failed): Make second arg an int.
* tree.h: Update prototype.
cp:
* call.c (add_candidate): Use ggc_alloc_cleared.
* decl.c (lookup_label): Likewise.
* lex.c (retrofit_lang_decl): Likewise.
From-SVN: r34478
* gengenrtl.c (CONST_DOUBLE_FORMAT): Take the size REAL_ARITHMETIC
will use into account. Expand the max width to 5.
* rtl.c: Likewise.
From-SVN: r29216
* Makefile.in (ggc-simple.o): Depend on varray.h.
(rtl.o): Depend on ggc.h.
(genattrtab.o): Depend on ggc.h.
(print-tree.o): Likewise.
(fold-const.o): Likewise.
* emit-rtl.c (sequence_element_free_list): Remove, and all references.
(make_insn_raw): Don't cache insns when GC'ing.
(emit_insn_before): Likewise.
(emit_insn_after): Likewise.
(emit_insn): Likewise.
(start_sequence): Use xmalloc to allocate the sequence_stack.
(end_sequence): Add free to free it.
(gen_sequence): Don't cache insns when GC'ing.
(clear_emit_caches): Don't use sequence_element_free_list.
(init_emit): Use xcalloc, not xmalloc+bzero.
* fold-const.c (size_int_wide): Kill the cache, when GC'ing.
* function.c (pop_function_context_from): Use free to free the
fixup_var_refs_queue.
(put_reg_into_stack): Allocate it with xmalloc.
* genattrtab.c: Include ggc.h.
(operate_exp): Don't use obstack_free when GC'ing.
(simplify_cond): Likewise.
(simplify_text_exp): Likewise.
(optimize_attrs): Likewise.
* gengenrtl.c (gendef): Use ggc_alloc_rtx to allocate RTL, when
GC'ing.
(gencode): Generate a #include for ggc.h.
* ggc-callbacks.c (ggc_p): Define it to zero.
* ggc-none.c (ggc_p): Likewise.
* ggc-simple.c: Include varray.h.
(ggc_mark_tree_varray): New function.
(ggc_add_tree_varray_root): Likewise.
(ggc_mark_tree_varray_ptr): Likewise.
* ggc.h (ggc_p): Declare.
(varray_head_tag): Likewise.
(ggc_add_tree_varray_root): Declare.
* print-tree.c (print_node): Don't check for TREE_PERMANENT
inconsistencies when GC'ing.
* rtl.c: Include ggc.h.
(rtvec_alloc): Use ggc_alloc_rtvec when GC'ing.
(rtx_alloc): Use ggc_alloc_rtx when GC'ing.
(rtx_free): Don't call obstack_free when GC'ing.
* toplev.c (rest_of_compilation): Call ggc_collect after every
pass, if GC'ing.
* tree.c (push_obstacks): Do nothing, if GC'ing.
(pop_obstacks_nochange): Likewise.
(pop_obstacks): Likewise.
(make_node): Use ggc_alloc_tree when GC'ing.
(copy_node): Likewise.
(get_identifier): Use ggc_alloc_string when GC'ing.
(build_string): Likewise.
(make_tree_vec): Use ggc_alloc_tree when GC'ing.
(tree_cons): Likewise.
(build1): Likewise.
(type_hash_canon): Don't call obstack_free when GC'ing.
From-SVN: r29131
1999-08-27 13:27 -0700 Zack Weinberg <zack@bitmover.com>
* rtl.c: Define CONST_DOUBLE_FORMAT to the appropriate format
for a CONST_DOUBLE, at compile time. Initialize rtx_length
and class_narrowest_mode at compile time. Kill init_rtl.
Mark rtx_length, mode_class, mode_size, mode_unit_size,
mode_wider_mode, mode_mask_array, class_narrowest_mode, and
rtx_format as const. Kill all references to EXTRA_CC_MODES or
EXTRA_CC_NAMES.
* rtl.def (CONST_DOUBLE): Use CONST_DOUBLE_FORMAT macro for
format.
* rtl.h: Declare rtx_length and rtx_format as const.
* machmode.def: Define CC(). Use CC() to define CCmode. If
EXTRA_CC_MODES is defined, expand it here.
* machmode.h: Declare mode_class, mode_size, mode_unit_size,
mode_wider_mode, mode_mask_array, and class_narrowest_mode as
const. Kill all references to EXTRA_CC_MODES.
* toplev.c: Don't prototype or call init_rtl.
* optabs.c: Don't call init_mov_optab.
* genemit.c: Don't generate init_mov_optab. Don't call
init_rtl.
* gengenrtl.c: Duplicate calculation of CONST_DOUBLE_FORMAT
here.
* genattr.c, genattrtab.c, gencodes.c, genconfig.c,
genextract.c, genflags.c, genopinit.c, genoutput.c, genpeep.c,
genrecog.c: Don't call init_rtl.
* arc.h, arm.h, c4x.h, i386.h, i960.h, m88k.h, pa.h, pdp11.h,
rs6000.h, sparc.h: Don't define EXTRA_CC_NAMES. Use CC() in
definition of EXTRA_CC_MODES.
* md.texi: Kill ref to EXTRA_CC_NAMES.
* tm.texi: Document new way to define EXTRA_CC_MODES.
* genrecog.c: Do not look up the name of a define_split.
(Unrelated bugfix.)
From-SVN: r28937
1999-08-25 22:10 -0700 Zack Weinberg <zack@bitmover.com>
* system.h: Don't redefine abort or trim_filename.
* rtl.h: Define abort to fancy_abort (__FILE__, __LINE__, 0)
or fancy_abort (__FILE__, __LINE__, __FUNCTION__) depending on
whether or not __FUNCTION__ is available.
* tree.h: Duplicate rtl.h's definition of abort, for files
that don't include rtl.h. Delete all code to perform type
checking with a compiler other than GCC.
* varray.h: Delete all code to perform type checking with a
compiler other than GCC. Make VARRAY_CHECK() always evaluate
its arguments exactly once, using a statement expression.
Adjust the VARRAY_<type> accessor macros to match.
* toplev.h (fatal_insn, fatal_insn_not_found): Kill.
(_fatal_insn, _fatal_insn_not_found): New fns, take info on
caller's location. Define fatal_insn and fatal_insn_not_found
as macros that use _fatal_insn and _fatal_insn_not_found.
(fancy_abort, trim_filename): Kill prototypes.
* rtl.c (trim_filename): Move here from toplev.c.
(fancy_abort): New function.
(DIR_SEPARATOR): Provide default definition.
* tree.c (tree_check_failed, tree_class_check_failed): Go
through fancy_abort.
(tree_check, tree_class_check, cst_or_constructor_check,
expr_check): Delete.
* varray.c (varray_check_failed): New function.
* toplev.c (fatal_insn, fatal_insn_not_found): Replace with
_fatal_insn and _fatal_insn_not_found. Go through
fancy_abort.
(trim_filename, fancy_abort): Delete.
* builtins.c (expand_builtin_args_info): Report ICE with abort.
* except.c (start_catch_handler): Report ICE with error/abort
combo.
* final.c (output_operand_lossage): Likewise.
* flow.c (verify_flow_info): Likewise.
* gcc.c: Prototype fatal.
* gengenrtl.c: Undef abort after including rtl.h not system.h.
* genattr.c, genattrtab.c, genemit.c, genextract.c,
genflags.c, genopinit.c, genoutput.c, genpeep.c, genrecog.c:
Don't define fancy_abort.
From-SVN: r28889
1999-08-19 14:44 -0700 Zack Weinberg <zack@bitmover.com>
* rtl.def (NOTE): Change format to "iuu0n".
(ADDR_DIFF_VEC): Change format to "eEee0".
(ADDRESSOF): Change format to "eit".
* rtl.h (rtvec): Make "elem" an array of rtx, not rtunion.
(RTVEC_ELT): Change to match.
(XVECEXP): Use XVEC and RTVEC_ELT.
(INSN_UID, INSN_CODE, CODE_LABEL_NUMBER, NOTE_LINE_NUMBER,
ADDRESSOF_REGNO, REGNO, SUBREG_WORD): Use XINT.
(PREV_INSN, NEXT_INSN, PATTERN, REG_NOTES,
CALL_INSN_FUNCTION_USAGE, SUBREG_REG, SET_SRC, SET_DEST,
TRAP_CONDITION, TRAP_CODE): Use XEXP.
(INTVAL): Use XWINT.
(ADDRESSOF_DECL): Use XTREE.
(SET_ADDRESSOF_DECL): Delete.
(NOTE_DECL_NAME, NOTE_DECL_CODE, NOTE_DECL_RTL,
NOTE_DECL_IDENTIFIER, NOTE_DECL_TYPE): Kill. These have been
ifdefed out since 2.6 at least.
(gen_rtvec_vv): Delete prototype.
* rtl.h (rtvec_alloc): rt->elem is now an array of rtx,
not rtunion.
(copy_most_rtx): Handle 't' format letter.
* emit-rtl.c (gen_rtvec_v): rt_val->elem is an array of rtx.
(gen_rtvec_vv): Delete function. All callers changed to use
gen_rtvec_v instead.
* print-rtl.c (print_rtx): Move special casing of NOTEs to
the '0' format letter.
* function.c (gen_mem_addressof): Don't use
SET_ADDRESSOF_DECL; provide `decl' to gen_rtx_ADDRESSOF
instead.
* integrate.c (copy_rtx_and_substitute): Likewise.
Copy 't' slots with XTREE.
(subst_constants): Treat 't' slots like '[swi]' slots.
* cse.c (canon_hash, exp_equiv_p): Treat 't' slots like '0' slots.
* jump.c (rtx_equal_for_thread_p): Likewise.
* rtlanal.c (rtx_equal_p): Likewise.
* stmt.c (expand_end_case): gen_rtx_ADDR_DIFF_VEC now takes
only four arguments.
* gengenrtl.c (type_from_format): Provide correct types for
'b' and 't' slots.
* tree.h [ENABLE_CHECKING] (TREE_CHECK, TREE_CLASS_CHECK):
If a recent gcc is in use (always in stage2 and beyond), use
statement expressions, so we don't make a function call unless
the check fails. Evaluate arguments exactly once.
(CHAIN_CHECK, DO_CHECK, DO_CHECK1, TREE_CHECK1,
TREE_CLASS_CHECK1, TYPE_CHECK1, DECL_CHECK1, CST_CHECK1):
Delete.
(CST_OR_CONSTRUCTOR_CHECK, EXPR_CHECK): Redefine such that
they evaluate their arguments exactly once, irrespective of
the compiler in use.
* tree.c [ENABLE_CHECKING]: Define whichever set of functions
is used by the currently-enabled check macros. This is:
(tree_check_failed, tree_class_check_failed): For gcc.
(tree_check, tree_class_check, cst_or_constructor_check,
expr_check): For other compilers.
* gencheck.c: Do not define any *_CHECK1 macros.
From-SVN: r28769
Kelley Cook
Kazu Hirata
Nathan Sidwell
Dan Nicolaescu
Richard Sandiford
Zack Weinberg
Kaveh R. Ghazi
Andreas Jaeger
Geoffrey Keating
Neil Booth
J"orn Rennecke
Jan Hubicka
Andreas Jaeger
Zack Weinberg
Richard Kenner
Stan Shebs
Lars Brinkhoff
Kazu Hirata
Jakub Jelinek
Zack Weinberg
Mark Mitchell
Akiko Matsushita
Theodore Papadopoulo
H.J. Lu
Stan Cox
Kaveh Ghazi
Richard Henderson
Jeff Law
Mark Mitchell
Zack Weinberg
Zack Weinberg