2013-07-22 Po-Chun Chang <pchang9@cs.wisc.edu>
* reload.c (find_reloads): Exit loop once we find this operand
cannot be reloaded somehow for this alternative.
* reload.c (find_reloads): Exit loop once we find a hard register.
* rtlanal.c (computed_jump_p): Exit loop once we find label
reference is used.
* i386.c (ix86_pad_returns): Exit loop after setting replace.
* cfgloopmanip.c (remove_path): Exit loop after setting
irred_invalidated.
* gensupport.c (subst_dup): Avoid loop if code is not
MATCH_DUP nor MATCH_OP_DUP.
From-SVN: r201174
gcc/
* config/aarch64/aarch64.c (aarch64_hard_regno_mode_ok): Also return
true for SP_REGNUM if mode == ptr_mode.
* config/aarch64/aarch64.h (ADDITIONAL_REGISTER_NAMES): Add "wsp"
with value R0_REGNUM + 31.
From-SVN: r201170
gcc/testsuite/
* gcc.dg/20020219-1.c: Skip the test on aarch64*-*-* in ilp32.
* gcc.target/aarch64/aapcs64/test_18.c (struct y): Change the field
type from long to long long.
* gcc.target/aarch64/atomic-op-long.c: Update dg-final directives
to have effective-target keywords of lp64 and ilp32.
* gcc.target/aarch64/fcvt_double_int.c: Likewise.
* gcc.target/aarch64/fcvt_double_long.c: Likewise.
* gcc.target/aarch64/fcvt_double_uint.c: Likewise.
* gcc.target/aarch64/fcvt_double_ulong.c: Likewise.
* gcc.target/aarch64/fcvt_float_int.c: Likewise.
* gcc.target/aarch64/fcvt_float_long.c: Likewise.
* gcc.target/aarch64/fcvt_float_uint.c: Likewise.
* gcc.target/aarch64/fcvt_float_ulong.c: Likewise.
* gcc.target/aarch64/vect_smlal_1.c: Replace 'long' with 'long long'.
From-SVN: r201166
small PIC addressing models
gcc/
* config/aarch64/aarch64.c (POINTER_BYTES): New define.
(aarch64_load_symref_appropriately): In the case of
SYMBOL_SMALL_ABSOLUTE, use the mode of 'dest' instead of Pmode
to generate new rtx; likewise to the case of SYMBOL_SMALL_GOT.
(aarch64_expand_mov_immediate): In the case of SYMBOL_FORCE_TO_MEM,
change to pass 'ptr_mode' to force_const_mem and zero-extend 'mem'
if 'mode' doesn't equal to 'ptr_mode'.
(aarch64_output_mi_thunk): Add an assertion on the alignment of
'vcall_offset'; change to call aarch64_emit_move differently depending
on whether 'Pmode' equals to 'ptr_mode' or not; use 'POINTER_BYTES'
to calculate the upper bound of 'vcall_offset'.
(aarch64_cannot_force_const_mem): Change to also return true if
mode != ptr_mode.
(aarch64_legitimize_reload_address): In the case of large
displacements, add new local variable 'xmode' and an assertion
based on it; change to use 'xmode' to generate the new rtx and
reload.
(aarch64_asm_trampoline_template): Change to generate the template
differently depending on TARGET_ILP32 or not; change to use
'POINTER_BYTES' in the argument passed to assemble_aligned_integer.
(aarch64_trampoline_size): Removed.
(aarch64_trampoline_init): Add new local constant 'tramp_code_sz'
and replace immediate literals with it. Change to use 'ptr_mode'
instead of 'DImode' and call convert_memory_address if the mode
of 'fnaddr' doesn't equal to 'ptr_mode'.
(aarch64_elf_asm_constructor): Change to use assemble_aligned_integer
to output symbol.
(aarch64_elf_asm_destructor): Likewise.
* config/aarch64/aarch64.h (TRAMPOLINE_SIZE): Change to be dependent
on TARGET_ILP32 instead of aarch64_trampoline_size.
* config/aarch64/aarch64.md (movsi_aarch64): Add new alternatives
of 'mov' between WSP and W registers as well as 'adr' and 'adrp'.
(loadwb_pair<GPI:mode>_<PTR:mode>): Rename to ...
(loadwb_pair<GPI:mode>_<P:mode>): ... this. Replace PTR with P.
(storewb_pair<GPI:mode>_<PTR:mode>): Likewise; rename to ...
(storewb_pair<GPI:mode>_<P:mode>): ... this.
(add_losym): Change to 'define_expand' and call gen_add_losym_<mode>
depending on the value of 'mode'.
(add_losym_<mode>): New.
(ldr_got_small_<mode>): New, based on ldr_got_small.
(ldr_got_small): Remove.
(ldr_got_small_sidi): New.
* config/aarch64/iterators.md (P): New.
(PTR): Change to 'ptr_mode' in the condition.
From-SVN: r201165
gcc/
* config.gcc (aarch64*-*-*): Support --with-abi.
(aarch64*-*-elf): Support --with-multilib-list.
(aarch64*-*-linux*): Likewise.
(supported_defaults): Add abi to aarch64*-*-*.
* configure.ac: Mention AArch64 for --with-multilib-list.
* configure: Re-generated.
* config/aarch64/biarchilp32.h: New file.
* config/aarch64/biarchlp64.h: New file.
* config/aarch64/aarch64-elf.h (ENDIAN_SPEC): New define.
(ABI_SPEC): Ditto.
(MULTILIB_DEFAULTS): Ditto.
(DRIVER_SELF_SPECS): Ditto.
(ASM_SPEC): Update to also substitute -mabi.
* config/aarch64/aarch64-elf-raw.h (LINK_SPEC): Add linker script
file whose name depends on -mabi= and -mbig-endian.
* config/aarch64/aarch64.h (LONG_TYPE_SIZE): Change to depend on
TARGET_ILP32.
(POINTER_SIZE): New define.
(POINTERS_EXTEND_UNSIGNED): Ditto.
(enum aarch64_abi_type): New enumeration tag.
(AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
(AARCH64_ABI_DEFAULT): Define to AARCH64_ABI_LP64 if undefined.
(TARGET_ILP32): New define.
* config/aarch64/aarch64.opt (mabi): New.
(aarch64_abi): New.
(ilp32, lp64): New values for -mabi.
* config/aarch64/t-aarch64 (comma): New define.
(MULTILIB_OPTIONS): Ditto.
(MULTILIB_DIRNAMES): Ditto.
* config/aarch64/t-aarch64-linux (MULTIARCH_DIRNAME): New define.
* doc/invoke.texi: Document -mabi for AArch64.
From-SVN: r201164
2013-07-23 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/s390/linux-unwind.h: Use the proper dwarf to hard reg
mapping for FPRs when creating the fallback framestate.
From-SVN: r201156
2013-07-22 Bill Schmidt <wschmidt@vnet.linux.ibm.com>
Anton Blanchard <anton@au1.ibm.com>
* config/rs6000/rs6000.c (rs6000_expand_vector_init): Fix
endianness when selecting field to splat.
Co-Authored-By: Anton Blanchard <anton@au1.ibm.com>
From-SVN: r201149
2013-07-22 Eric Christopher <echristo@gmail.com>
* dwarf2out.c (die_odr_checksum): New function to use
CHECKSUM_ macros and ULEB128 for DIE tag.
(generate_type_signature): Use.
From-SVN: r201148
2013-07-22 Paolo Carlini <paolo.carlini@oracle.com>
* cp-tree.h (DERIVED_FROM_P): Pass tf_none to lookup_base, not
tf_warning_or_error.
From-SVN: r201145
gcc/
2013-07-26 Jürgen Urban <JuergenUrban@gmx.de>
* config.gcc (mips*-*-*): Add --with-fpu support. Make single the
default for R5900 targets.
* config/mips/mips.h (OPTION_DEFAULT_SPECS): Handle --with-fpu.
(ISA_HAS_LDC1_SDC1): Set to false for TARGET_MIPS5900.
* config/mips/mips.c (mips_option_override): Report an error for
-march=r5900 -mhard-float -mdouble-float. Use spu_single_format
for -march=r5900 -mhard-float.
From-SVN: r201143
2013-07-22 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/57920
* src/c++11/random.cc (random_device::_M_getval): If possible, use
read instead of std::fread.
* include/std/random: Do not include <cstdio> unnecessarily.
From-SVN: r201133
