2017-03-28 Martin Liska <mliska@suse.cz>
PR ipa/80104
* cgraphunit.c (cgraph_node::expand_thunk): Mark argument of a
thunk call as DECL_GIMPLE_REG_P when vector or complex type.
2017-03-28 Martin Liska <mliska@suse.cz>
PR ipa/80104
* gcc.dg/ipa/pr80104.c: New test.
From-SVN: r246525
The compiler is supposed to have the builtin defined _REENTRANT defined
when -pthread is passed, which wasn't done on the ARC architecture.
When _REENTRANT is not passed, the C library will not use reentrant
functions, and the latest version of ax_pthread.m4 from the
autoconf-archive will no longer detect that thread support is
available (see https://savannah.gnu.org/patch/?8186).
gcc/
2017-03-28 Claudiu Zissulescu <claziss@synopsys.com>
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
* config/arc/arc.h (CPP_SPEC): Add subtarget_cpp_spec.
(EXTRA_SPECS): Define.
(SUBTARGET_EXTRA_SPECS): Likewise.
(SUBTARGET_CPP_SPEC): Likewise.
* config/arc/elf.h (EXTRA_SPECS): Renamed to
SUBTARGET_EXTRA_SPECS.
* config/arc/linux.h (SUBTARGET_CPP_SPEC): Define.
Co-Authored-By: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
From-SVN: r246524
vec_select expects in selection a list of subparts. The old ARC SIMD
extension instructions were not up-to-date.
gcc/
2017-03-28 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/simdext.md (vst64_insn): Update pattern.
(vld32wh_insn): Likewise.
(vld32wl_insn): Likewise.
(vld64_insn): Likewise.
(vld32_insn): Likewise.
From-SVN: r246523
PR libstdc++/80229
* include/bits/shared_ptr_base.h
(__shared_ptr::_M_enable_shared_from_this_with): Change parameters to
non-const and then use remove_cv to get unqualified type.
* testsuite/20_util/enable_shared_from_this/members/const.cc: Don't
cast away constness on object created const.
* testsuite/20_util/shared_ptr/cons/80229.cc: New test.
From-SVN: r246520
/home/markus/gcc/gcc/tree.c: In function ‘void inchash::add_expr(const_tree, inchash::hash&, unsigned int)’:
/home/markus/gcc/gcc/tree.c:8013:11: warning: name lookup of ‘i’ changed
for (i = TREE_OPERAND_LENGTH (t) - 1; i >= 0; --i)
^
/home/markus/gcc/gcc/tree.c:7773:7: warning: matches this ‘i’ under ISO standard rules
int i;
^
/home/markus/gcc/gcc/tree.c:7869:16: warning: matches this ‘i’ under old rules
for (int i = 0; i < TREE_VEC_LENGTH (t); ++i)
^
From-SVN: r246519
PR middle-end/80162
c-family/
* c-common.c (c_common_mark_addressable_vec): Don't set
TREE_ADDRESSABLE on DECL_HARD_REGISTER.
c/
* c-tree.h (c_mark_addressable): Add array_ref_p argument.
* c-typeck.c (c_mark_addressable): Likewise. Look through
VIEW_CONVERT_EXPR unless array_ref_p and VCE is from VECTOR_TYPE
to ARRAY_TYPE.
(build_array_ref): Pass true as array_ref_p to c_mark_addressable.
cp/
* cp-tree.h (cxx_mark_addressable): Add array_ref_p argument.
* typeck.c (cxx_mark_addressable): Likewise. Look through
VIEW_CONVERT_EXPR unless array_ref_p and VCE is from VECTOR_TYPE
to ARRAY_TYPE.
(cp_build_array_ref): Pass true as array_ref_p to cxx_mark_addressable.
testsuite/
* c-c++-common/pr80162-1.c: New test.
* c-c++-common/pr80162-2.c: New test.
* c-c++-common/pr80162-3.c: New test.
From-SVN: r246512
PR target/80102
* reg-notes.def (REG_CFA_NOTE): Define. Use it for CFA related
notes.
* cfgcleanup.c (reg_note_cfa_p): New array.
(insns_have_identical_cfa_notes): New function.
(old_insns_match_p): Don't cross-jump in between /f
and non-/f instructions. If both i1 and i2 are frame related,
verify all CFA notes, their order and content.
* g++.dg/opt/pr80102.C: New test.
From-SVN: r246511
[gcc]
2017-03-27 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/78543
* config/rs6000/rs6000.md (bswaphi2_extenddi): Combine bswap
HImode and SImode with zero extend to DImode to one insn.
(bswap<mode>2_extenddi): Likewise.
(bswapsi2_extenddi): Likewise.
(bswaphi2_extendsi): Likewise.
(bswaphi2): Combine bswap HImode and SImode into one insn.
Separate memory insns from swapping register.
(bswapsi2): Likewise.
(bswap<mode>2): Likewise.
(bswaphi2_internal): Delete, no longer used.
(bswapsi2_internal): Likewise.
(bswap<mode>2_load): Split bswap HImode/SImode into separate load,
store, and gpr<-gpr swap insns.
(bswap<mode>2_store): Likewise.
(bswaphi2_reg): Register only splitter, combine with the splitter.
(bswaphi2 splitter): Likewise.
(bswapsi2_reg): Likewise.
(bswapsi2 splitter): Likewise.
(bswapdi2): If we have the LDBRX and STDBRX instructions, split
the insns into load, store, and register/register insns.
(bswapdi2_ldbrx): Likewise.
(bswapdi2_load): Likewise.
(bswapdi2_store): Likewise.
(bswapdi2_reg): Likewise.
[gcc/testsuite]
2017-03-27 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/78543
* gcc.target/powerpc/pr78543.c: New test.
From-SVN: r246508
2017-03-27 Dominique d'Humieres <dominiq@lps.ens.fr>
* io/list_read.c: Insert /* Fall through. */ in the macro
CASE_SEPARATORS in order to silence warnings.
From-SVN: r246507
This patch almost a decade ago:
...
2007-08-31 Douglas Gregor <doug.gregor@gmail.com>
* cp-demangle.c (d_dump): Handle
DEMANGLE_COMPONENT_RVALUE_REFERENCE.
(d_make_comp): Ditto.
...
... missed doing the same change to cplus_demangle_fill_component that
was done to d_make_comp. I.e., teach it to only validate that we're
not passing in a "right" subtree. GDB has recently (finally) learned
about rvalue references, and a change to make it use
cplus_demangle_fill_component more ran into an assertion because of
this.
(GDB is the only user of cplus_demangle_fill_component in both the gcc
and binutils-gdb trees.)
libiberty/ChangeLog:
2017-03-27 Pedro Alves <palves@redhat.com>
* cp-demint.c (cplus_demangle_fill_component): Handle
DEMANGLE_COMPONENT_RVALUE_REFERENCE.
From-SVN: r246502
2017-03-27 Richard Biener <rguenther@suse.de>
PR tree-optimization/80181
* tree-ssa-ccp.c (likely_value): UNDEFINED ^ X is UNDEFINED.
* gcc.dg/torture/pr80181.c: New testcase.
From-SVN: r246500
Durring compilation process, (subreg (mem ...) ...) can occur. Hence,
we need to check if the address of mem is a valid one. This patch is
fixing this check by directly calling the address_operand, instead of
calling move_double_src_operand, as the latter is always checking
against the original mode, thus, returning false when the inner and
outer modes are different.
gcc/
2017-03-27 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/predicates.md (move_double_src_operand): Replace the
call to move_double_src_operand with a call to address_operand.
From-SVN: r246499
ARC can use scaled offsets when loading (i.e. ld.as rA,[base,
offset]). Where base and offset can be a register or an immediate
operand. The scaling only applies on the offset part of the
instruction. The compiler can accept an address like this:
(plus:SI (mult:SI (reg:SI 2 r2 [orig:596 _2129 ] [596])
(const_int 4 [0x4]))
(const_int 60 [0x3c]))
Hence, to emit this instruction we place the (const_int 60) into base
and the register into offset to take advantage of the scaled offset
facility of the load instruction. As a result the length of the load
instruction is 8 bytes. However, the long_immediate_loadstore_operand
predicate used for calculating the length attribute doesn't recognize
this address and returns a wrong decision leading to a wrong length
computation for a load instruction using the above address.
gcc/
2017-03-27 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/predicates.md (long_immediate_loadstore_operand):
Consider scaled addresses cases.
From-SVN: r246496
PR sanitizer/80168
* asan.c (instrument_derefs): Copy over last operand from
original COMPONENT_REF to the new COMPONENT_REF with
DECL_BIT_FIELD_REPRESENTATIVE.
* ubsan.c (instrument_object_size): Likewise.
* gcc.dg/asan/pr80168.c: New test.
From-SVN: r246492
2017-03-27 Richard Biener <rguenther@suse.de>
PR tree-optimization/80170
* tree-vect-data-refs.c (vect_compute_data_ref_alignment): Make
sure DR/SCEV didnt fold in constants we do not see when looking
at the reference base alignment.
* gcc.dg/pr80170.c: New testcase.
From-SVN: r246491
2017-03-27 Richard Biener <rguenther@suse.de>
PR middle-end/80171
* gimple-fold.c (fold_ctor_reference): Properly guard against
NULL return value from canonicalize_constructor_val.
* g++.dg/torture/pr80171.C: New testcase.
From-SVN: r246490
2017-03-25 Jerry DeLisle <jvdelisle@gcc.gnu.org>
PR libgfortran/78881
* io/io.h (st_parameter_dt): Rename unused component last_char to
child_saved_iostat. Move comment to gfc_unit.
* io/list_read.c (list_formatted_read_scalar): After call to
child READ procedure, save the returned iostat value for later
check. (finish_list_read): Only finish READ if child_saved_iostat
was OK.
* io/transfer.c (read_sf_internal): If there is a saved character
in last character, seek back one. Add a new check for EOR
condition. (read_sf): If there is a saved character
in last character, seek back one. (formatted_transfer_scalar_read):
Initialize last character before invoking child procedure.
(data_transfer_init): If child dtio, set advance
status to nonadvancing. Move update of size and check for EOR
condition to before child dtio return.
* gfortran.dg/dtio_26.f90: New test.
From-SVN: r246478
2017-03-25 Paul Thomas <pault@gcc.gnu.org>
PR fortran/80156
PR fortran/79382
* decl.c (access_attr_decl): Remove the error for an absent
generic DTIO interface and ensure that symbol has the flavor
FL_PROCEDURE.
2017-03-25 Paul Thomas <pault@gcc.gnu.org>
PR fortran/80156
PR fortran/79382
* gfortran.dg/dtio_23.f90 : Remove the dg-error and add the
testcase for PR80156. Add a main programme that tests that
the typebound generic is accessible.
From-SVN: r246476
PR target/80180
* config/i386/i386.c (ix86_expand_builtin)
<IX86_BUILTIN_RDSEED{16,32,64}_STEP>: Do not expand arg0 between
flags reg setting and flags reg using instructions.
<IX86_BUILTIN_RDRAND{16,32,64}_STEP>: Ditto. Use non-flags reg
clobbering instructions to zero extend op2.
From-SVN: r246475
PR rtl-optimization/80160
PR rtl-optimization/80159
* lra-assigns.c (must_not_spill_p): Tighten new test to also take
reg_alternate_class into account.
* gcc.target/i386/pr80160.c: New test.
From-SVN: r246473
PR c++/80119
* cp-gimplify.c (cp_fold): Strip CLEANUP_POINT_EXPR if the expression
doesn't have side effects.
* g++.dg/warn/Wuninitialized-9.C: New test.
From-SVN: r246461
This patch implements a set of low-level builtins for instruction
which would otherwise not be emitted by the compiler plus a set of
high-level builtins as defined by the IBM XL compiler. The high-level
builtins will be described in a future revision of the z/OS XL C/C++
Programming Guide.
I'll try to come up with a documentation appropriate for the GCC
manual as well (sometimes in the future).
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390-builtins.def: Add VXE builtins. Add a flags
argument to the overloaded builtin variants. Use the new flag to
deprecate certain builtin variants.
* config/s390/s390-builtin-types.def: Add new builtin types.
* config/s390/s390-builtins.h: Support new flags field for
overloaded builtins.
* config/s390/s390-c.c (OB_DEF_VAR): New flags field.
(s390_macro_to_expand): Enable vector float data type.
(s390_cpu_cpp_builtins_internal): Indicate support of the new
builtins by incrementing the __VEC__ version number.
(s390_expand_overloaded_builtin): Support expansion of vec_xl and
vec_xst.
(s390_resolve_overloaded_builtin): Emit error messages depending
on the builtin flags.
* config/s390/s390.c (s390_expand_builtin): Support additional
flags argument. Change error message to match the messages
emitted in s390-c.c.
* config/s390/s390.md: New UNSPEC_* constants.
(op_type): Add new instruction types.
* config/s390/vecintrin.h: Add new builtins and test data class
constants.
* config/s390/vx-builtins.md (V_HW_32_64): Add V4SF.
(V_HW_4, VEC_HW, VECF_HW): New mode iterators.
(VEC_INEXACT, VEC_NOINEXACT): New constants.
("vec_splats<mode>", "vec_insert<mode>", "vec_promote<mode>")
("vec_insert_and_zero<mode>", "vec_mergeh<mode>")
("vec_mergel<mode>"): V_HW -> VEC_HW.
("vlrlrv16qi", "vstrlrv16qi", "vbpermv16qi", "vec_msumv2di")
("vmslg", "*vftci<mode>_cconly", "vftci<mode>_intcconly")
("*vftci<mode>", "vftci<mode>_intcc", "vec_double_s64")
("vec_double_u64", "vfmin<mode>", "vfmax<mode>"): New definition.
("and_av2df3", "and_cv2df3", "vec_andc_av2df3")
("vec_andc_cv2df3", "xor_av2df3", "xor_cv2df3", "vec_nor_av2df3")
("vec_nor_cv2df3", "ior_av2df3", "ior_cv2df3", "vec_nabs")
("*vftcidb", "*vftcidb_cconly", "vftcidb"): Remove definition.
("vec_all_<fpcmpcc:code>v2df", "vec_any_<fpcmpcc:code>v2df")
("vec_scatter_elementv4si_DI", "vec_cmp<fpcmp:code>v2df")
("vec_di_to_df_s64", "vec_di_to_df_u64", "vec_df_to_di_u64")
("vfidb", "*vldeb", "*vledb", "*vec_cmp<insn_cmp>v2df_cconly")
("vec_cmpeqv2df_cc", "vec_cmpeqv2df_cc", "vec_cmphv2df_cc")
("vec_cmphev2df_cc", "*vec_cmpeqv2df_cc")
("*vec_cmphv2df_cc", "*vec_cmphev2df_cc"): Enable new modes as ...
("vec_all_<fpcmpcc:code><mode>", "vec_any_<fpcmpcc:code><mode>")
("vec_scatter_element<V_HW_4:mode>_DI")
("vec_cmp<fpcmp:code><mode>", "vcdgb", "vcdlgb", "vclgdb")
("vec_fpint<mode>", "vflls")
("vflrd", "*vec_cmp<insn_cmp><mode>_cconly", "vec_cmpeq<mode>_cc")
("vec_cmpeq<mode>_cc", "vec_cmph<mode>_cc", "vec_cmphe<mode>_cc")
("*vec_cmpeq<mode>_cc", "*vec_cmph<mode>_cc")
("*vec_cmphe<mode>_cc"): ... these.
("vec_ctd_s64", "vec_ctsl", "vec_ctul", "vec_st2f"): Use rounding
mode constant instead of magic value.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/target-attribute/tattr-3.c: Adjust error message
and remove the high-level builtin. The error message for the
would prevent compilation from reaching the second.
* gcc.target/s390/target-attribute/tattr-4.c: Likewise.
From-SVN: r246459
This patch adds support for the new floating point vector elements (SF
and TF) introduced with arch12.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.c (s390_expand_vec_compare): Support other
vector floating point modes than just V2DF.
(s390_expand_vcond): Likewise.
(s390_hard_regno_mode_ok): Allow SFmode values in VRs.
(s390_cannot_change_mode_class): Prevent mode changes between TF
and V1TF in vector registers.
* config/s390/s390.md (DF, SF): New mode attributes.
("*cmp<mode>_ccs", "add<mode>3", "sub<mode>3", "mul<mode>3")
("fma<mode>4", "fms<mode>4", "div<mode>3", "*neg<mode>2"): Add
SFmode support for VRs.
* config/s390/vector.md (V_HW, V_HW2, VT_HW, ti*, nonvec): Add new
vector fp modes.
(VFT, VF_HW): New mode iterators.
(vw, sdx): New mode attributes.
("addv2df3", "subv2df3", "mulv2df3", "divv2df3", "sqrtv2df2")
("fmav2df4","fmsv2df4", "negv2df2", "absv2df2", "*negabsv2df2")
("smaxv2df3", "sminv2df3", "*vec_cmp<VFCMP_HW_OP:code>v2df_nocc")
("vec_cmpuneqv2df", "vec_cmpltgtv2df", "vec_orderedv2df")
("vec_unorderedv2df"): Adjust the v2df only patterns to support
also the new vector floating point modes. Renaming to ...
("add<mode>3", "sub<mode>3", "mul<mode>3", "div<mode>3")
("sqrt<mode>2", "fma<mode>4", "fms<mode>4", "neg<mode>2")
("abs<mode>2", "negabs<mode>2", "smax<mode>3")
("smin<mode>3", "*vec_cmp<VFCMP_HW_OP:code><mode>_nocc")
("vec_cmpuneq<mode>", "vec_cmpltgt<mode>", "vec_ordered<mode>")
("vec_unordered<mode>"): ... these.
("neg_fma<mode>4", "neg_fms<mode>4", "*smax<mode>3_vxe")
("*smin<mode>3_vxe", "*sminv2df3_vx", "*vec_extendv4sf")
("*vec_extendv2df"): New insn definitions.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/vxe/negfma-1.c: New test.
From-SVN: r246458
This adds support for the branch indirect instruction.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.md ("indirect_jump"): Turn insn definition into
expander.
("*indirect_jump", "*indirect2_jump"): New pattern definitions.
From-SVN: r246456
This adds support for the vector load element and zero instruction and
makes sure it is used when initializing vectors with elements while
setting the rest to 0.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.c (s390_expand_vec_init): Use vllezl
instruction if possible.
* config/s390/vector.md (vec_halfnumelts): New mode
attribute.
("*vec_vllezlf<mode>"): New pattern.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/vxe/vllezlf-1.c: New test.
From-SVN: r246455
arch12 provides pop count vector instructions for bigger elements than
just chars.
gcc/testsuite/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/vxe/popcount-1.c: New test.
gcc/ChangeLog:
2017-03-24 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/vector.md ("popcountv16qi2", "popcountv8hi2")
("popcountv4si2", "popcountv2di2"): Rename to ...
("popcount<mode>2", "popcountv8hi2_vx", "popcountv4si2_vx")
("popcountv2di2_vx"): ... these and add !TARGET_VXE to the
condition.
("popcount<mode>2_vxe"): New pattern.
From-SVN: r246454
Martin Liska
Claudiu Zissulescu
Marek Polacek
Jonathan Wakely
Markus Trippelsdorf
Jeff Law
Jeff Law
GCC Administrator
Jakub Jelinek
Joseph Myers
Michael Meissner
Dominique d'Humieres
Gunther Nikl
Kelvin Nilsen
Pedro Alves
Richard Biener
John David Anglin
Markus Trippelsdorf
Jerry DeLisle
Paul Thomas
Uros Bizjak
Gerald Pfeifer
Bernd Schmidt
Vladimir Makarov
Jason Merrill
Andreas Krebbel