Commit Graph

150219 Commits

Author SHA1 Message Date
Waldemar Brodkorb
80a3051292 * config/bfin/linux.h (CPP_SPEC): Define.
From-SVN: r242976
2016-11-29 14:41:07 -07:00
Martin Sebor
01a4551ceb PR tree-optimization/78512 - [7 Regression] r242674 miscompiles Linux kernel
gcc/ChangeLog:

	PR tree-optimization/78512
	* config/linux.h (TARGET_PRINTF_POINTER_FORMAT): Remove.
	* config/rs6000/linux.h: Same.
	* config/rs6000/linux64.h: Same.
	* config/sol2.h: Same.
	* config/sol2.c (solaris_printf_pointer_format): Remove.
	* doc/tm.texi.in (TARGET_PRINTF_POINTER_FORMAT): Remove.
	* doc/tm.texi: Regenerate.
	* gimple-ssa-sprintf.c (format_pointer): Rempove.
	(pass_sprintf_length::compute_format_length): Return bool.
	(pass_sprintf_length::handle_gimple_call): Adjust.
	* target.def (printf_pointer_format): Remove.
	* targhooks.c (default_printf_pointer_format): Remove.
	(linux_printf_pointer_format): Same.
	* targhooks.h (default_printf_pointer_format): Remove.
	(linux_printf_pointer_format, solaris_printf_pointer_format): Same.

gcc/testsuite/ChangeLog:

	PR tree-optimization/78512
	* gcc.dg/tree-ssa/builtin-sprintf-6.c: Add test cases.
	* gcc.dg/tree-ssa/builtin-sprintf-warn-1.c: Remove test cases.

From-SVN: r242975
2016-11-29 14:08:02 -07:00
Uros Bizjak
a918548079 sse.md (UNSPEC_MASKOP): Move from i386.md.
* config/i386/sse.md (UNSPEC_MASKOP): Move from i386.md.
	(mshift): Ditto.
	(SWI1248_AVX512BWDQ): Ditto.
	(SWI1248_AVX512BW): Ditto.
	(k<any_logic:code><mode>): Ditto.
	(kandn<mode>): Ditto.
	(kxnor<mode>): Ditto.
	(knot<mode>): Ditto.
	(*k<any_lshift:code><mode>): Ditto.
	(kortestzhi, kortestchi): Ditto.
	(kunpckhi, kunpcksi, kunpckdi): Ditto.

testsuite/ChangeLog:

	* gcc.target/i386/avx512f-kmovw-1.c (avx512f_test):
	Force value through k register.

From-SVN: r242971
2016-11-29 20:26:49 +01:00
Andrew Pinski
28ea3e977c tree-vrp.c (simplify_stmt_using_ranges): Use boolean_type_node for the EQ_EXPR.
2016-11-29  Andrew Pinski  <apinski@cavium.com>

        * tree-vrp.c (simplify_stmt_using_ranges): Use boolean_type_node
        for the EQ_EXPR.

From-SVN: r242970
2016-11-29 11:16:15 -08:00
Chen Gang
885cf7d356 re PR target/71331 (target-tilegx: nested-function-4.c: r10 is conflict which is both in function frame and in parameter.)
PR target/71331
	* config/tilegx/tilegx.c (tilegx_function_profiler): Save r10
	to stack before call mcount.
	(tilegx_can_use_return_insn_p): Clean up code.

From-SVN: r242969
2016-11-29 11:33:20 -07:00
David Edelsohn
57e27acf28 re PR libstdc++/68838 (AIX 32 bit wchar_t testsuite failures)
PR libstdc++/68838
* testsuite/lib/libstdc++.exp (DEFAULT_CXXFLAGS): Add -Wl,-bmaxdata on AIX.
* testsuite/23_containers/vector/profile/vector.cc: Remove
dg-additional-options.

From-SVN: r242967
2016-11-29 12:50:27 -05:00
Pitchumani Sivanupandi
6a109bfcec avr-arch.h (avr_mcu_t): Add flash_size member.
* config/avr/avr-arch.h (avr_mcu_t): Add flash_size member.
	* config/avr/avr-devices.c(avr_mcu_types): Add flash size info.
	* config/avr/avr-mcu.def: Likewise.
	* config/avr/gen-avr-mmcu-specs.c (print_mcu): Remove hard-coded prefix
	check to find wrap-around value, instead use MCU flash size. For 8k flash
	devices, update link_pmem_wrap spec string to add --pmem-wrap-around=8k.
	* config/avr/specs.h: Remove link_pmem_wrap from LINK_RELAX_SPEC and
	add to linker specs (LINK_SPEC) directly.

From-SVN: r242966
2016-11-29 19:35:43 +03:00
David Malcolm
8bf3cdff10 spellcheck bugfixes: don't offer the goal string as a suggestion
gcc/cp/ChangeLog:
	PR c++/77922
	* name-lookup.c (lookup_name_fuzzy): Filter out reserved words
	that were filtered out by init_reswords.

gcc/ChangeLog:
	PR c++/72774
	PR c++/72786
	PR c++/77922
	PR c++/78313
	* spellcheck.c (selftest::test_find_closest_string): Verify that
	we don't offer the goal string as a suggestion.
	* spellcheck.h (best_match::get_best_meaningful_candidate): Don't
	offer the goal string as a suggestion.

gcc/testsuite/ChangeLog:
	PR c++/72774
	PR c++/72786
	PR c++/77922
	PR c++/78313
	* g++.dg/spellcheck-c++-11-keyword.C: New test case.
	* g++.dg/spellcheck-macro-ordering.C: New test case.
	* g++.dg/spellcheck-pr78313.C: New test case.

From-SVN: r242965
2016-11-29 16:25:01 +00:00
Nathan Sidwell
8684b29203 * cp-demangle.c (d_print_comp_inner): Fix parameter indentation.
From-SVN: r242963
2016-11-29 15:28:52 +00:00
Tamar Christina
753a952341 2016-11-29 Tamar Christina <tamar.christina@arm.com>
* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
	(AARCH64_ONLY, CHECK_CRYPTO): New macros.
	(Poly64x1_t, Poly64x2_t): Added types.
	* gcc.target/aarch64/advsimd-intrinsics/p64_p128.c
	(vmov_n_p64, vmovq_n_p64): Added.
	(vld2_lane_p64, vld2q_lane_p64): Likewise.
	(vld3_lane_p64, vld3q_lane_p64): Likewise.
	(vld4_lane_p64, vld4q_lane_p64): Likewise.
	(vst2_lane_p64, vst2q_lane_p64): Likewise.
	(vst3_lane_p64, vst3q_lane_p64): Likewise.
	(vst4_lane_p64, vst4q_lane_p64): Likewise.
	(vget_lane_p64, vgetq_lane_p64): Likewise.
	(vget_high_p64): Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c:
	Added AArch64 flags.
	(vreint_vector, vreint_vector_res): Moved to header.
	* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c:
	Added Aarch64 flags.
	(vreint_vector, vreint_vector_res): Moved to header.

From-SVN: r242962
2016-11-29 14:53:46 +00:00
Claudiu Zissulescu
6323c98156 [ARC] Fix compact casesi option.
gcc/
2016-11-29  Claudiu Zissulescu  <claziss@synopsys.com>

        * config/arc/arc.c (arc_override_options): Avoid selection of
        compact casesi for ARCv2.

From-SVN: r242961
2016-11-29 15:26:28 +01:00
Janus Weil
c0fe5a2109 [multiple changes]
2016-11-29  Tobias Burnus  <burnus@net-b.de>

	PR fortran/58175
	* resolve.c (gfc_resolve_finalizers): Properly detect scalar finalizers.

2016-11-29  Janus Weil  <janus@gcc.gnu.org>

	PR fortran/58175
	* gfortran.dg/finalize_30.f90: New test case.

From-SVN: r242960
2016-11-29 15:15:29 +01:00
Richard Biener
00738904f3 tree-cfg.c (lower_phi_internal_fn): Do not look for further PHIs after a regular stmt.
2016-11-29  Richard Biener  <rguenther@suse.de>

	* tree-cfg.c (lower_phi_internal_fn): Do not look for further
	PHIs after a regular stmt.
	(stmt_starts_bb_p): PHIs not preceeded by a PHI or a label
	start a new BB.

From-SVN: r242959
2016-11-29 14:01:32 +00:00
Martin Liska
248cce34f1 Make one extra BB to prevent PHI argument clash (PR
PR gcov-profile/78582
	* gcc.dg/pr78582.c: New test.
	PR gcov-profile/78582
	* tree-profile.c (gimple_gen_time_profiler): Make one extra BB
	to prevent PHI argument clash.

From-SVN: r242958
2016-11-29 13:20:00 +00:00
Markus Trippelsdorf
f4214e239f Remove r242480 from libsanitizer/LOCAL_PATCHES
The fix is now upstream.

	* LOCAL_PATCHES: Remove r242480.

From-SVN: r242957
2016-11-29 13:13:31 +00:00
Claudiu Zissulescu
61e72afb37 [ARC] [COMMITTED] Fix typo in arc.opt
gcc/
2016-11-29  Claudiu Zissulescu  <claziss@synopsys.com>

        * config/arc/arc.opt (marclinux): Fix typo.
        (marclinux_prof): Likewise.

From-SVN: r242956
2016-11-29 13:42:22 +01:00
Jiong Wang
87a5dc2da0 [Patch] New hook TARGET_STACK_PROTECT_RUNTIME_ENABLED_P to disable SSP runtime
gcc/
	* target.def (stack_protect_runtime_enabled_p): New.
	* function.c (expand_function_end): Guard stack_protect_epilogue with
	targetm.stack_protect_runtime_enabled_p.
	* cfgexpand.c (pass_expand::execute): Likewise.
	* calls.c (expand_call): Likewise.
	* doc/tm.texi.in (TARGET_STACK_PROTECT_RUNTIME_ENABLED_P): Add it.
	* doc/tm.texi: Regenerate.

From-SVN: r242955
2016-11-29 11:47:48 +00:00
Senthil Kumar Selvaraj
11edabc2df Fix bogus pr31096-1.c failure for avr
The dump expects literals which would only be present if the target's
int size is 32 bits.

Fix by explicitly using 32 bit ints for targets with __SIZEOF_INT__ < 4.

gcc/testsuite/
2016-11-29  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>

	* testsuite/gcc.dg/pr31096-1.c: Use __{U,}INT32_TYPE__ for
	targets with sizeof(int) < 4.

From-SVN: r242954
2016-11-29 11:21:46 +00:00
Richard Biener
b302f2e058 re PR rtl-optimization/78546 (wrong code at -O2 and above)
2016-11-29  Richard Biener  <rguenther@suse.de>

	PR middle-end/78546
	* match.pd: Add CST1 - (CST2 - A) -> CST3 + A missing case.

	* gcc.dg/tree-ssa/forwprop-36.c: New testcase.

From-SVN: r242953
2016-11-29 07:48:43 +00:00
Janus Weil
e24dcd7d2a contrib.texi: Add a few missing gfortran contributors.
2016-11-29  Janus Weil  <janus@gcc.gnu.org>

	* doc/contrib.texi: Add a few missing gfortran contributors.

From-SVN: r242952
2016-11-29 08:04:44 +01:00
Segher Boessenkool
01a8a37339 rs6000: Testcases for rl*i*
These testcases test that we generate the expected code for all of the
rl*i* instructions, that is, rotate-and-mask and rotate-and-mask-insert
for immediate rotation counts.  All the testcases do rotate, shift left,
as well as shift right; if that results in an instruction that does not
exist the testcases generate a multiplication instead, so that we can
detect if this is handled properly.

Many 32-bit instructions zero-extend their result properly in 64-bit
mode, but the rs6000 port does not yet know.  These testcases test the
status quo, so they will need updating when ever we handle this.


gcc/testsuite/
	* gcc.target/powerpc/rldic-0.c: New testcase.
	* gcc.target/powerpc/rldic-1.c: New testcase.
	* gcc.target/powerpc/rldic-2.c: New testcase.
	* gcc.target/powerpc/rldicl-0.c: New testcase.
	* gcc.target/powerpc/rldicl-1.c: New testcase.
	* gcc.target/powerpc/rldicl-2.c: New testcase.
	* gcc.target/powerpc/rldicr-0.c: New testcase.
	* gcc.target/powerpc/rldicr-1.c: New testcase.
	* gcc.target/powerpc/rldicr-2.c: New testcase.
	* gcc.target/powerpc/rldicx.h: New file.
	* gcc.target/powerpc/rldimi-0.c: New testcase.
	* gcc.target/powerpc/rldimi-1.c: New testcase.
	* gcc.target/powerpc/rldimi-2.c: New testcase.
	* gcc.target/powerpc/rldimi.h: New file.
	* gcc.target/powerpc/rlwimi-0.c: New testcase.
	* gcc.target/powerpc/rlwimi-1.c: New testcase.
	* gcc.target/powerpc/rlwimi-2.c: New testcase.
	* gcc.target/powerpc/rlwimi.h: New file.
	* gcc.target/powerpc/rlwinm-0.c: New testcase.
	* gcc.target/powerpc/rlwinm-1.c: New testcase.
	* gcc.target/powerpc/rlwinm-2.c: New testcase.
	* gcc.target/powerpc/rlwinm.h: New file.

From-SVN: r242951
2016-11-29 06:51:51 +01:00
Segher Boessenkool
452385a720 combine: Tweak change_zero_ext
change_zero_ext handles (zero_extend:M1 (subreg:M2 (reg:M1) ...))
already; this patch extends it to also deal with any
(zero_extend:M1 (subreg:M2 (reg:M3) ...)) where the subreg is not
paradoxical.


	* combine.c (change_zero_ext): Also handle extends from a subreg
	to a mode bigger than that of the operand of the subreg.

From-SVN: r242950
2016-11-29 06:44:32 +01:00
Segher Boessenkool
dfed7971fb rs6000: Make deallocation of a large frame work (PR77687)
If we use ABI_V4 and we have a big stack frame, we end the epilogue
with a "mr 1,11" (or similar) instruction.  This instruction however
has no dependencies on the earlier restores from stack (done via r11),
so sched2 can end up reordering the insns, which is bad because we
have no red zone so that you then restore from stack that is already
deallocated.

This fixes it by making that restore depend on the memory accesses.


	PR target/77687
	* config/rs6000/rs6000.c (rs6000_emit_stack_reset): Emit the
	stack_restore_tie insn instead of stack_tie, for the SVR4 and
	SPE ABIs.
	* config/rs6000/rs6000.md (stack_restore_tie): New define_insn.

From-SVN: r242949
2016-11-29 06:29:47 +01:00
Segher Boessenkool
08dd2b683f shrink-wrap: New spread_components
This patch changes spread_components to use a simpler algorithm that
puts prologue components as early as possible, and epilogue components
as late as possible.  This allows better scheduling, and also saves a
bit of code size.  The blocks that run with some specific component
enabled after this patch is a strict superset of those that had it
before the patch.

It does this by finding for every component the basic blocks where that
component is not needed on some path from the entry block (it reuses
head_components to store this), and similarly the blocks where the
component is not needed on some path to the exit block (or the exit can
not be reached from that block) (stored in tail_components).  Blocks
that then are not in both of those two sets get the component active.


	* shrink-wrap.c (init_separate_shrink_wrap): Do not clear
	head_components and tail_components.
	(spread_components): New algorithm.
	(emit_common_tails_for_components): Clear head_components and
	tail_components.
	(insert_prologue_epilogue_for_components): Write extra output to the
	dump file for sibcalls and abnormal exits.

From-SVN: r242948
2016-11-29 03:19:04 +01:00
Segher Boessenkool
a001d4f9b9 combine: Make code after a new trap unreachable (PR78342)
Combine can turn a conditional trap into an unconditional trap.  If it
does that it should make the code after it unreachable (an unconditional
trap should be the last insn in its bb, and that bb has no successors).

This patch seems to work.  It is hard to be sure, this is very hard to
trigger.  Quite a few other passes look like they need something similar
as well, but I don't see anything else handling it yet either.


	PR rtl-optimization/78342
	* combine.c: Include "cfghooks.h".
	(try_combine): If we create an unconditional trap, break the basic
	block in two just after it, and remove the edge between; also, set
	the *new_direct_jump_p flag so that cleanup_cfg is run.

From-SVN: r242947
2016-11-29 03:02:45 +01:00
Segher Boessenkool
48cf0e51e9 simplify-rtx: Handle truncate of extract
simplify_truncation changes the truncation of many operations into
the operation on the truncation.  This patch makes this code also
handle extracts.


	* simplify-rtx.c (simplify_truncation): Handle truncate of zero_extract
	and sign_extract.

From-SVN: r242946
2016-11-29 02:48:30 +01:00
Joseph Myers
deb2bb610e * es.po, fr.po: Update.
From-SVN: r242943
2016-11-29 00:45:40 +00:00
GCC Administrator
14042ceb41 Daily bump.
From-SVN: r242941
2016-11-29 00:16:20 +00:00
Uros Bizjak
58aa6a736a i386.md (*and<mode>_1): Merge insn pattern from *andsi_1 and *andhi_1 using SWI24 mode iterator.
* config/i386/i386.md (*and<mode>_1): Merge insn pattern from
	*andsi_1 and *andhi_1 using SWI24 mode iterator.  Use multi-line
	output template string.
	(*anddi_1): Use multi-line output template string.
	(*andqi_1): Ditto.

From-SVN: r242938
2016-11-29 00:21:43 +01:00
Jakub Jelinek
a5a4add7aa re PR middle-end/78540 (ICE: in df_refs_verify, at df-scan.c:4062 with -O -march=core2)
PR middle-end/78540
	* rtl.h (remove_reg_equal_equiv_notes): Return bool instead of void.
	* rtlanal.c (remove_reg_equal_equiv_notes): Return true if any
	note has been removed.
	* postreload.c (reload_combine_recognize_pattern): If
	remove_reg_equal_equiv_notes returns true, call df_notes_rescan.

	* gcc.dg/pr78540.c: New test.

From-SVN: r242937
2016-11-28 23:51:29 +01:00
Martin Sebor
de6aa93370 PR middle-end/78521 - [7 Regression] incorrect byte count in -Wformat-length...
PR middle-end/78521 - [7 Regression] incorrect byte count in -Wformat-length warning with non-constant width or precision
PR middle-end/78520 - missing warning for snprintf with size greater than INT_MAX

gcc/ChangeLog:

	PR middle-end/78520
	* gimple-ssa-sprintf.c (target_max_value): Remove.
	(target_int_max, target_size_max): Use TYPE_MAX_VALUE.
	(get_width_and_precision): New function.
	(format_integer, format_floating, get_string_length, format_string):
	Correct handling of width and precision with unknown value.
	(format_directive): Add warning.
	(pass_sprintf_length::compute_format_length): Allow for precision
	to consist of a sole period with no asterisk or digits after it.

gcc/testsuite/ChangeLog:

	PR middle-end/78520
	* gcc.dg/tree-ssa/builtin-sprintf-5.c: Add test cases.
	* gcc.dg/tree-ssa/builtin-sprintf-6.c: New test.
	* gcc.dg/tree-ssa/builtin-sprintf-warn-1.c: Add test cases.
	* gcc.dg/tree-ssa/builtin-sprintf-warn-3.c: Add test cases.

From-SVN: r242935
2016-11-28 14:41:41 -07:00
Thomas Petazzoni
b3a5bff4d7 re PR target/74748 (libgcc_s.so.1 isn't created correctly for Blackfin FDPIC)
PR gcc/74748
	* libgcc/config/bfin/libgcc-glibc.ver, libgcc/config/bfin/t-linux:
	use generic linker version information on Blackfin.

2016-11-27  Iain Sandoe  <iain@codesourcery.com>

From-SVN: r242934
2016-11-28 14:30:40 -07:00
Thomas Petazzoni
7a0d2bce7f re PR target/74748 (libgcc_s.so.1 isn't created correctly for Blackfin FDPIC)
PR gcc/74748
	* libgcc/mkmap-symver.awk: add support for skip_underscore

From-SVN: r242933
2016-11-28 14:27:47 -07:00
David Edelsohn
18df37ec1f Fix typo.
From-SVN: r242931
2016-11-28 14:57:50 -05:00
Jakub Jelinek
f28fd43ea8 re PR c++/72808 (ICE on valid c++ code in verify_type (gcc/tree.c:14047))
PR c++/72808
	* decl.c (finish_enum_value_list): Call fixup_type_variants on
	current_class_type after
	insert_late_enum_def_into_classtype_sorted_fields.

	* g++.dg/debug/pr72808.C: New test.

Co-Authored-By: Jason Merrill <jason@redhat.com>

From-SVN: r242930
2016-11-28 20:20:02 +01:00
Jakub Jelinek
d057004733 re PR rtl-optimization/78546 (wrong code at -O2 and above)
PR rtl-optimization/78546
	* simplify-rtx.c (neg_const_int): When negating most negative
	number in mode wider than HOST_BITS_PER_WIDE_INT, use
	simplify_const_unary_operation to produce CONST_DOUBLE or
	CONST_WIDE_INT.
	(simplify_plus_minus): Hanlde the case where neg_const_int
	doesn't return a CONST_INT.

	* gcc.dg/torture/pr78546-1.c: New test.
	* gcc.dg/torture/pr78546-2.c: New test.

From-SVN: r242929
2016-11-28 20:15:51 +01:00
Markus Trippelsdorf
82979abd86 Fix PR78556 - left shift of negative values
Running bootstrap-ubsan on ppc64le shows many instances of e.g.:
 config/rs6000/rs6000.c:6217:36: runtime error: left shift of negative value -12301

        PR target/78556
	* config/rs6000/rs6000.c (vspltis_constant): Add casts to avoid
	left shifting of negative values.

From-SVN: r242928
2016-11-28 18:33:19 +00:00
Jakub Jelinek
80cf1b8b60 re PR fortran/78298 (ICE in lookup_decl_in_outer_ctx, bei omp-low.c:4115)
PR fortran/78298
	* tree-nested.c (convert_local_reference_stmt): After adding
	shared (FRAME.NN) clause to omp parallel, task or target,
	add it also to all outer omp parallel, task or target constructs.

	* gfortran.dg/gomp/pr78298.f90: New test.

From-SVN: r242926
2016-11-28 18:31:37 +01:00
Uros Bizjak
bf9e8b6b50 i386.md (UNSPEC_KMASKOP): New.
* config/i386/i386.md (UNSPEC_KMASKOP): New.
	(UNSPEC_KMOV): Remove.
	(kmovw): Expand to plain HImode move.
	(k<any_logic:code><mode>): Rename from *k<logic><mode>. Use
	register_operand predicates.  Tag pattern with UNSPEC_KMASKOP.
	Remove corresponding clobber-removing splitter.
	(*anddi_1): Remove mask register alternatives.
	(*andsi_1): Ditto.
	(*andhi_1): Ditto.
	(*andqi_1): Ditto.
	(*<any_or:code><mode>_1): Ditto.
	(*<any_or:code>qi_1): Ditto.
	(kandn<mode>): Use SWI1248_AVX512BW mode iterator.  Remove
	general register alternatives.  Tag pattern with UNSPEC_KMASKOP.
	Remove corresponding splitter to operation with general registers.
	(*andn<SWI38:mode>): Rename from *bmi_andn_<mode>.
	(*andn<SWI12:mode>): New pattern.
	(*kxnor<mode>): Remove general register alternatives.  Tag pattern
	with UNSPEC_KMASKOP.  Remove corresponding splitter to operation
	with general registers.
	(knot<mode>): New insn pattern.
	(*one_cmpl<mode>2_1): Remove mask register alternatives.
	(one_cmplqi2_1): Ditto.
	(*k<any_lshift:code><mode>): Rename from *k<mshift><mode>3.
	Tag pattern with UNSPEC_KMASKOP. Add mode attribute.
	* config/i386/predicates.md (mask_reg_operand): Remove predicate.
	* config/i386/sse.md (vec_unpacks_hi_hi): Update pattern
	to generate kmaskop shift.
	(vec_unpacks_hi_<mode>): Ditto.
	* config/i386/i386-builtin.def (__builtin_ia32_kandhi):
	Use CODE_FOR_kandhi.
	(__builtin_ia32_knothi): Use CODE_FOR_knothi.
	(__builtin_ia32_korhi): Use CODE_FOR_kiorhi.
	(__builtin_ia32_kxorhi): Use CODE_FOR_kxorhi.

testsuite/ChangeLog:

	* gcc.target/i386/bmi-andn-1a.c (dg-final): Update scan string.
	* gcc.target/i386/bmi-andn-2a.c (dg-final): Ditto.

From-SVN: r242925
2016-11-28 17:53:17 +01:00
Jakub Jelinek
f4bb5c171e re PR c++/77591 (decltype(auto) and ternary operator allow returning local reference without a warning)
PR c++/77591
	* typeck.c (maybe_warn_about_returning_address_of_local): Optimize
	whats_returned through fold_for_warn.

	* g++.dg/cpp1y/pr77591.C: New test.

From-SVN: r242924
2016-11-28 16:21:53 +01:00
Nathan Sidwell
21b0f96a82 * MAINTAINERS (nvptx): Remove self.
From-SVN: r242923
2016-11-28 15:18:45 +00:00
David Edelsohn
54856e4f6d * gcc.dg/torture/pr78515.c: Ignore ABI extension warning.
From-SVN: r242922
2016-11-28 10:11:27 -05:00
Richard Biener
1c3099cca5 tree-vrp.c (vrp_visit_assignment_or_call): Handle simplifications to SSA names via extract_range_from_ssa_name if allowed.
2016-11-28  Richard Biener  <rguenther@suse.de>

	* tree-vrp.c (vrp_visit_assignment_or_call): Handle
	simplifications to SSA names via extract_range_from_ssa_name
	if allowed.

From-SVN: r242921
2016-11-28 15:04:45 +00:00
Richard Biener
6522add29b re PR tree-optimization/78542 (wrong code at -Og results in endless loop)
2016-11-28  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/78542
	* tree-ssa-ccp.c (evaluate_stmt): Only valueize simplification
	if allowed.

	* gcc.dg/torture/pr78542.c: New testcase.

From-SVN: r242920
2016-11-28 15:03:55 +00:00
Alexander Monakov
6a6951b1bf libgomp: remove config/nvptx/critical.c
* config/nvptx/critical.c: Delete to use generic implementation.

From-SVN: r242919
2016-11-28 16:50:23 +03:00
Jonas Hahnfeld
c7ac071fd0 libgomp: fix OpenMP offloading to NVPTX and correct location of generic affinity.c
2016-11-28  Jonas Hahnfeld  <Hahnfeld@itc.rwth-aachen.de>

	* config/linux/affinity.c [!HAVE_PTHREAD_AFFINITY_NP]: Include
	../../affinity.c as fallback.
	* config/nvptx/affinity.c: Delete to use fallback implementation.

From-SVN: r242918
2016-11-28 16:42:50 +03:00
Paolo Bonzini
51a07549a9 combine.c (simplify_if_then_else): Simplify IF_THEN_ELSE that isolates a single bit...
gcc:
* combine.c (simplify_if_then_else): Simplify IF_THEN_ELSE
that isolates a single bit, even if the condition involves
subregs.

From-SVN: r242917
2016-11-28 13:21:02 +00:00
Tamar Christina
6383ff9f9e 2016-11-28 Tamar Christina <tamar.christina@arm.com>
* config/aarch64/aarch64-simd-builtins.def
	(BSL_P): Added di and v2di mode.
	* config/aarch64/arm_neon.h
	(vsriq_n_p64, vsri_n_p64): Added poly type.
	(vextq_p64, vext_p64): Likewise.
	(vceq_p64, vbslq_p64, vbsl_p64): Likewise.

From-SVN: r242916
2016-11-28 12:47:02 +00:00
Tamar Christina
159b872453 aarch64-builtins.c (TYPES_SETREGP): Added poly type.
2016-11-28  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-builtins.c (TYPES_SETREGP): Added poly type.
	(TYPES_GETREGP): Likewise.
	(TYPES_SHIFTINSERTP): Likewise.
	(TYPES_COMBINEP): Likewise.
	(TYPES_STORE1P): Likewise.
	* config/aarch64/aarch64-simd-builtins.def
	(combine): Added poly generator.
	(get_dregoi): Likewise.
	(get_dregci): Likewise.
	(get_dregxi): Likewise.
	(ssli_n): Likewise.
	(ld1): Likewise.
	(st1): Likewise.
	* config/aarch64/arm_neon.h
	(poly64x1x2_t, poly64x1x3_t): New.
	(poly64x1x4_t, poly64x2x2_t): Likewise.
	(poly64x2x3_t, poly64x2x4_t): Likewise.
	(poly64x1_t): Likewise.
	(vcreate_p64, vcombine_p64): Likewise.
	(vdup_n_p64, vdupq_n_p64): Likewise.
	(vld2_p64, vld2q_p64): Likewise.
	(vld3_p64, vld3q_p64): Likewise.
	(vld4_p64, vld4q_p64): Likewise.
	(vld2_dup_p64, vld3_dup_p64): Likewise.
	(vld4_dup_p64, vsli_n_p64): Likewise.
	(vsliq_n_p64, vst1_p64): Likewise.
	(vst1q_p64, vst2_p64): Likewise.
	(vst3_p64, vst4_p64): Likewise.
	(__aarch64_vdup_lane_p64, __aarch64_vdup_laneq_p64): Likewise.
	(__aarch64_vdupq_lane_p64, __aarch64_vdupq_laneq_p64): Likewise.
	(vget_lane_p64, vgetq_lane_p64): Likewise.
	(vreinterpret_p8_p64, vreinterpretq_p8_p64): Likewise.
	(vreinterpret_p16_p64, vreinterpretq_p16_p64): Likewise.
	(vreinterpret_p64_f16, vreinterpret_p64_f64): Likewise.
	(vreinterpret_p64_s8, vreinterpret_p64_s16): Likewise.
	(vreinterpret_p64_s32, vreinterpret_p64_s64): Likewise.
	(vreinterpret_p64_f32, vreinterpret_p64_u8): Likewise.
	(vreinterpret_p64_u16, vreinterpret_p64_u32): Likewise.
	(vreinterpret_p64_u64, vreinterpret_p64_p8): Likewise.
	(vreinterpretq_p64_f64, vreinterpretq_p64_s8): Likewise.
	(vreinterpretq_p64_s16, vreinterpretq_p64_s32): Likewise.
	(vreinterpretq_p64_s64, vreinterpretq_p64_f16): Likewise.
	(vreinterpretq_p64_f32, vreinterpretq_p64_u8): Likewise.
	(vreinterpretq_p64_u16, vreinterpretq_p64_u32): Likewise.
	(vreinterpretq_p64_u64, vreinterpretq_p64_p8): Likewise.
	(vreinterpret_f16_p64, vreinterpretq_f16_p64): Likewise.
	(vreinterpret_f32_p64, vreinterpretq_f32_p64): Likewise.
	(vreinterpret_f64_p64, vreinterpretq_f64_p64): Likewise.
	(vreinterpret_s64_p64, vreinterpretq_s64_p64): Likewise.
	(vreinterpret_u64_p64, vreinterpretq_u64_p64): Likewise.
	(vreinterpret_s8_p64, vreinterpretq_s8_p64): Likewise.
	(vreinterpret_s16_p64, vreinterpret_s32_p64): Likewise.
	(vreinterpretq_s32_p64, vreinterpret_u8_p64): Likewise.
	(vreinterpret_u16_p64, vreinterpretq_u16_p64): Likewise.
	(vreinterpret_u32_p64, vreinterpretq_u32_p64): Likewise.
	(vset_lane_p64, vsetq_lane_p64): Likewise.
	(vget_low_p64, vget_high_p64): Likewise.
	(vcombine_p64, vst2_lane_p64): Likewise.
	(vst3_lane_p64, vst4_lane_p64): Likewise.
	(vst2q_lane_p64, vst3q_lane_p64): Likewise.
	(vst4q_lane_p64, vget_lane_p64): Likewise.
	(vget_laneq_p64, vset_lane_p64): Likewise.
	(vset_laneq_p64, vcopy_lane_p64): Likewise.
	(vcopy_laneq_p64, vdup_n_p64): Likewise.
	(vdupq_n_p64, vdup_lane_p64): Likewise.
	(vdup_laneq_p64, vld1_p64): Likewise.
	(vld1q_p64, vld1_dup_p64): Likewise.
	(vld1q_dup_p64, vld1q_dup_p64): Likewise.
	(vmov_n_p64, vmovq_n_p64): Likewise.
	(vst3q_p64, vst4q_p64): Likewise.
	(vld1_lane_p64, vld1q_lane_p64): Likewise.
	(vst1_lane_p64, vst1q_lane_p64): Likewise.
	(vcopy_laneq_p64, vcopyq_laneq_p64): Likewise.
	(vdupq_laneq_p64): Likewise.

From-SVN: r242915
2016-11-28 12:41:03 +00:00
Tamar Christina
f76f4b23a4 arm_neon.h (vget_lane_p64): New.
* config/arm/arm_neon.h (vget_lane_p64): New.

From-SVN: r242914
2016-11-28 12:36:07 +00:00