Commit Graph

142837 Commits

Author SHA1 Message Date
Martin Liska
5cd366f386 Fix memory leak in loop_vec_info
* tree-vect-loop-manip.c (vect_create_cond_for_alias_checks):
	Do not release memory for comp_alias_ddrs.
	* tree-vect-loop.c (destroy_loop_vec_info): Release
	the memory for all loop_vec_info.

From-SVN: r230995
2015-11-27 08:37:23 +00:00
Martin Liska
ed37a6cf23 Fix memory leaks in IPA devirt
* ipa-devirt.c (ipa_devirt): Use auto_vec instead
	of a local-scope vec.
	(struct final_warning_record): Use auto_vec instead
	of vec.

From-SVN: r230994
2015-11-27 08:36:52 +00:00
Richard Biener
2ce2720078 re PR tree-optimization/68553 (gcc.dg/vect/pr68445.c FAILs)
2015-11-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/68553
	* tree-vect-slp.c (vect_get_mask_element): Remove.
	(vect_transform_slp_perm_load): Implement in a simpler way.

	* gcc.dg/vect/pr45752.c: Adjust.
	* gcc.dg/vect/slp-perm-4.c: Likewise.

From-SVN: r230993
2015-11-27 08:31:44 +00:00
GCC Administrator
f0a813f2ad Daily bump.
From-SVN: r230990
2015-11-27 00:16:15 +00:00
Martin Sebor
ed48be0ef3 Correctly handle ARM targets.
* g++.dg/init/new45.C (cookie_size): New constant set to a value
	appropriate for the target.
	(operator new[]): Use it.

From-SVN: r230987
2015-11-26 16:31:32 -07:00
Alexandre Oliva
1e5d7fd638 [PR67753] adjust for padding when bypassing memory in assign_parm_setup_block
Storing a register in memory as a full word and then accessing the
same memory address under a smaller-than-word mode amounts to
right-shifting of the register word on big endian machines.  So, if
BLOCK_REG_PADDING chooses upward padding for BYTES_BIG_ENDIAN, and
we're copying from the entry_parm REG directly to a pseudo, bypassing
any stack slot, perform the shifting explicitly.

This fixes the miscompile of function_return_val_10 in
gcc.target/aarch64/aapcs64/func-ret-4.c for target aarch64_be-elf
introduced in the first patch for 67753.

for  gcc/ChangeLog

	PR rtl-optimization/67753
	PR rtl-optimization/64164
	* function.c (assign_parm_setup_block): Right-shift
	upward-padded big-endian args when bypassing the stack slot.

From-SVN: r230985
2015-11-26 21:57:40 +00:00
Maciej W. Rozycki
4d6ca95b9a MIPS/GCC/doc: Reorder `-mcompact-branches='
Move the `-mcompact-branches=' option out of the middle of a block of
floating-point options.  The option is not related to FP in any way.
Place it immediately below other branch instruction selection options.

	* doc/invoke.texi (Option Summary) <MIPS Options>: Reorder
	`-mcompact-branches='.
	(MIPS Options): Likewise.

From-SVN: r230984
2015-11-26 20:50:54 +00:00
Mike Stump
e78dbb4aa4 Fix whitespacing.
From-SVN: r230983
2015-11-26 20:48:29 +00:00
Jakub Jelinek
1b21256287 * Makefile.in (build/genmatch.o): Depend on internal-fn.def.
From-SVN: r230982
2015-11-26 21:00:33 +01:00
Paolo Carlini
57fbfd5a55 re PR c++/67238 ([C++11][C++14]cc1plus crash for nested decltype expression in parameter pack in trailing return type when '-g' enabled)
2015-11-26  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/67238
	* g++.dg/cpp0x/pr67238.C: New.

From-SVN: r230981
2015-11-26 18:43:47 +00:00
Martin Sebor
83cc5c7a2f pr67876.C: Remove duplicate content.
gcc/testsuite/
	* g++.dg/pr67876.C: Remove duplicate content.

From-SVN: r230980
2015-11-26 11:01:02 -07:00
Andreas Arnez
9daf14d442 cp-gimplify.c (genericize_cp_loop): Change LOOP_EXPR's location to start of loop body instead of start of loop.
gcc/cp/ChangeLog:

2015-11-26  Andreas Arnez  <arnez@linux.vnet.ibm.com>

	* cp-gimplify.c (genericize_cp_loop): Change LOOP_EXPR's location
	to start of loop body instead of start of loop.

gcc/testsuite/ChangeLog:

2015-11-26  Andreas Arnez  <arnez@linux.vnet.ibm.com>

	* g++.dg/guality/pr67192.C: New test.

From-SVN: r230979
2015-11-26 17:52:01 +00:00
David Edelsohn
8b95719a65 install.texi (Prerequisites): Increase ISL requirement to 0.14 or 0.15.
* doc/install.texi (Prerequisites): Increase ISL requirement to
        0.14 or 0.15.

From-SVN: r230978
2015-11-26 11:57:23 -05:00
Jonathan Wakely
5930d87a2d Ensure another pretty-printer test uses C++98 mode
* testsuite/libstdc++-prettyprinters/debug.cc: Add -std=gnu++98 to
	dg-options and avoid use of uniform-init.

From-SVN: r230977
2015-11-26 16:25:55 +00:00
Torvald Riegel
e7f7330fed libitm: Use multiplicative hashing in the multi-lock TM method.
* method-ml.cc (ml_mg): Use multiplicative instead of simple hashing.
	(ml_wt_dispatch::pre_write): Adapt.
	(ml_wt_dispatch::pre_load): Likewise.

From-SVN: r230975
2015-11-26 16:10:54 +00:00
Jonathan Wakely
43a2362b94 Ensure pretty-printer test uses C++98 mode
* testsuite/libstdc++-prettyprinters/simple.cc: Add -std=gnu++98 to
	dg-options and avoid use of uniform-init.

From-SVN: r230973
2015-11-26 15:42:47 +00:00
Matthew Wahab
50469f7503 [AArch64] Add NEON intrinsics vqrdmlah_lane and vqrdmlsh_lane.
gcc/
	* gcc/config/aarch64/arm_neon.h
	(vqrdmlah_laneq_s16, vqrdmlah_laneq_s32): New.
	(vqrdmlahq_laneq_s16, vqrdmlahq_laneq_s32): New.
	(vqrdmlsh_lane_s16, vqrdmlsh_lane_s32): New.
	(vqrdmlshq_laneq_s16, vqrdmlshq_laneq_s32): New.
	(vqrdmlah_lane_s16, vqrdmlah_lane_s32): New.
	(vqrdmlahq_lane_s16, vqrdmlahq_lane_s32): New.
	(vqrdmlahh_s16, vqrdmlahh_lane_s16, vqrdmlahh_laneq_s16): New.
	(vqrdmlahs_s32, vqrdmlahs_lane_s32, vqrdmlahs_laneq_s32): New.
	(vqrdmlsh_lane_s16, vqrdmlsh_lane_s32): New.
	(vqrdmlshq_lane_s16, vqrdmlshq_lane_s32): New.
	(vqrdmlshh_s16, vqrdmlshh_lane_s16, vqrdmlshh_laneq_s16): New.
	(vqrdmlshs_s32, vqrdmlshs_lane_s32, vqrdmlshs_laneq_s32): New.

        gcc/testsuite
	* gcc.target/aarch64/advsimd-intrinsics/vqrdmlXh_lane.inc: New file,
	support code for vqrdml{as}h_lane tests.
	* gcc.target/aarch64/advsimd-intrinsics/vqrdmlah_lane.c: New.
	* gcc.target/aarch64/advsimd-intrinsics/vqrdmlsh_lane.c: New.

From-SVN: r230972
2015-11-26 15:19:57 +00:00
Matthew Wahab
0c6110a126 [AArch64] Add NEON intrinsics vqrdmlah and vqrdmlsh.
gcc/
	* gcc/config/aarch64/arm_neon.h (vqrdmlah_s16, vqrdmlah_s32): New.
	(vqrdmlahq_s16, vqrdmlahq_s32): New.
	(vqrdmlsh_s16, vqrdmlsh_s32): New.
	(vqrdmlshq_s16, vqrdmlshq_s32): New.

        gcc/testsuite
	* gcc.target/aarch64/advsimd-intrinsics/vqrdmlXh.inc: New file,
	support code for vqrdml{as}h tests.
	* gcc.target/aarch64/advsimd-intrinsics/vqrdmlah.c: New.
	* gcc.target/aarch64/advsimd-intrinsics/vqrdmlsh.c: New.

From-SVN: r230971
2015-11-26 15:13:02 +00:00
Matthew Wahab
a1d5d08d25 [AArch64][dejagnu] Dejagnu support for ARMv8.1 Adv.SIMD.
gcc/testsuite
	* lib/target-supports.exp (add_options_for_arm_v8_1a_neon): New.
	(check_effective_target_arm_arch_FUNC_ok)
	(add_options_for_arm_arch_FUNC)
	(check_effective_target_arm_arch_FUNC_multilib): Add "armv8.1-a"
	to the list to be generated.
	(check_effective_target_arm_v8_1a_neon_ok_nocache): New.
	(check_effective_target_arm_v8_1a_neon_ok): New.
	(check_effective_target_arm_v8_1a_neon_hw): New.

From-SVN: r230970
2015-11-26 15:06:04 +00:00
Matthew Wahab
89c9a60c99 [AArch64] Add ACLE feature macro for ARMv8.1 Adv.SIMD instructions.
* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add
	ARM_FEATURE_QRDMX.

From-SVN: r230969
2015-11-26 14:59:10 +00:00
Pierre-Marie de Rodat
ed881c38ad DWARF: fix loc. descr. generation for DW_AT_static_link
gcc/ChangeLog:

	PR debug/53927
	* tree-nested.c (finalize_nesting_tree_1): Append a field to
	hold the frame base address.
	* dwarf2out.c (gen_subprogram_die): Generate for
	DW_AT_static_link a location description that computes the value
	of this field.

From-SVN: r230968
2015-11-26 14:56:24 +00:00
Tom de Vries
09c5c12e56 Revert "Improve verification of loop->latch in verify_loop_structure"
2015-11-26  Tom de Vries  <tom@codesourcery.com>

	revert:
	2015-11-25  Tom de Vries  <tom@codesourcery.com>

	* cfgloop.c (find_single_latch): New function, factored out of ...
	(flow_loops_find): ... here.
	(verify_loop_structure): Improve verification of loop->latch.
	* cfgloop.h (find_single_latch): Declare.
	* omp-low.c (expand_omp_for_generic): Initialize latch of orig_loop.

From-SVN: r230967
2015-11-26 14:35:27 +00:00
Matthew Wahab
941dd9a0ba aarch64-simd-builtins.def: Add missing changes from r230962.
* config/aarch64/aarch64-simd-builtins.def:
	Add missing changes from r230962.

From-SVN: r230966
2015-11-26 14:17:04 +00:00
Nathan Sidwell
863af9a44a nvptx.c (write_func_decl_from_insn): Replace callee arg with name.
* config/nvptx/nvptx.c (write_func_decl_from_insn): Replace callee
	arg with name.  Don't deal with split regs.  Tweak formatting.
	(nvptx_expand_call): Adjust write_func_decl_from_insn call.
	(nvptx_output_call_insn): Don't deal with split regs here.

	testsuite/
	* gcc.target/nvptx/proto-1.c: Adjust expected asm.

From-SVN: r230965
2015-11-26 14:13:28 +00:00
Richard Biener
5977cb070e re PR tree-optimization/68555 (gcc.dg/vect/bb-slp-10.c FAILs)
2015-11-26  Richard Biener  <rguenther@suse.de>

	PR testsuite/68555
	* gcc.dg/vect/bb-slp-10.c: Adjust pattern, use target selector
	and not XFAIL.

From-SVN: r230963
2015-11-26 14:01:26 +00:00
Matthew Wahab
2f50396d05 [AArch64] Add builtins for ARMv8.1 Adv.SIMD instructions.
* config/aarch64/aarch64-simd-builtins.def
	(sqrdmlah, sqrdmlsh): New.
	(sqrdmlah_lane, sqrdmlsh_lane): New.
	(sqrdmlah_laneq, sqrdmlsh_laneq): New.

From-SVN: r230962
2015-11-26 13:57:42 +00:00
Richard Biener
7ec0b0d588 re PR tree-optimization/68554 (gcc.dg/vect/bb-slp-subgroups-2.c FAILs)
2015-11-26  Richard Biener  <rguenther@suse.de>

	PR testsuite/68554
	* gcc.dg/vect/bb-slp-subgroups-2.c: Require vect_perm.

From-SVN: r230961
2015-11-26 13:51:40 +00:00
Matthew Wahab
57b26d65cd [AArch64] Add sqrdmah, sqrdmsh instructions.
* config/aarch64/aarch64-simd.md
	(aarch64_sqmovun<mode>): Fix some white-space.
	(aarch64_<sur>qmovun<mode>): Likewise.
	(aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>): New.
	(aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): New.
	(aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): New.
	* config/aarch64/iterators.md (UNSPEC_SQRDMLAH): New.
	(UNSPEC_SQRDMLSH): New.
	(SQRDMLH_AS): New.
	(rdma_as): New.

From-SVN: r230959
2015-11-26 13:50:47 +00:00
Uros Bizjak
afad440642 * g++.dg/tree-ssa/pr61034.C: Scan tree dumps also for alpha*-*-*.
From-SVN: r230958
2015-11-26 14:50:19 +01:00
Richard Biener
b9e86e2ca1 re PR tree-optimization/66721 (gcc.target/i386/pr61403.c FAILs)
2015-11-26  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/66721
	* tree-vect-loop.c (vect_analyze_loop_2): Compute scalar
	iteration cost earlier.  Re-do analysis without SLP when
	vectorization using SLP fails and without has a chance to succeed.

From-SVN: r230956
2015-11-26 13:46:59 +00:00
Richard Biener
6be52f624e genmatch.c (dt_simplify::gen_1): For generic wrap all multi-result-use captures in a SAVE_EXPR.
2015-11-26  Richard Biener  <rguenther@suse.de>

	* genmatch.c (dt_simplify::gen_1): For generic wrap all
	multi-result-use captures in a SAVE_EXPR.

From-SVN: r230955
2015-11-26 13:45:45 +00:00
David Edelsohn
3e0fb1a3e3 Fix typo
From-SVN: r230954
2015-11-26 08:44:36 -05:00
Matthew Wahab
a3735e01f9 [AArch64] Add support for ARMv8.1 Adv.SIMD instructions.
* config/aarch64/aarch64.h (AARCH64_ISA_RDMA): New.
	(TARGET_SIMD_RDMA): New.

From-SVN: r230953
2015-11-26 13:39:20 +00:00
David Edelsohn
6cfe90e6d7 * configure: Regenerate.
From-SVN: r230950
2015-11-26 08:27:21 -05:00
David Edelsohn
f95207445b * configure: Regenerate.
From-SVN: r230949
2015-11-26 08:24:19 -05:00
David Edelsohn
cc3baaa963 * libtool.m4 (export_symbols_cmds) [AIX]: Add global TLS "L" symbols.
From-SVN: r230948
2015-11-26 08:20:59 -05:00
Paolo Carlini
7070a0fab2 re PR c++/67249 ([concepts] ICE parsing f(pair<auto, concept>))
2015-11-26  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/67249
	* g++.dg/concepts/pr67249.C: New.

From-SVN: r230947
2015-11-26 13:14:45 +00:00
Kyrylo Tkachov
f0e8751330 [combine] Only restrict pure simplification in mult-extend subst case, allow other substitutions
* combine.c (subst): Do not return clobber of zero in widening mult
	case.  Just return x unchanged if it is a no-op substitution.

From-SVN: r230946
2015-11-26 13:07:29 +00:00
Richard Biener
5564c379b0 re PR testsuite/66799 (gcc.dg/vect/pr20122.c FAILs)
2015-11-26  Richard Biener  <rguenther@suse.de>

	PR testsuite/66799
	* gcc.dg/vect/pr20122.c (main): Do not align Kernel, do not
	vectorize init loop and adjust expected outcome.

From-SVN: r230943
2015-11-26 12:15:43 +00:00
Eric Botcazou
89a01fcf4c re PR c++/68527 (ICE with -fdump-ada-spec on invalid C++ 11 code)
PR c++/68527
	* c-ada-spec.c (dump_nested_types): Add guard for error_mark_node.
	(print_ada_struct_decl): Likewise.

From-SVN: r230942
2015-11-26 12:04:50 +00:00
Richard Biener
d083907f1f re PR testsuite/67203 (FAIL: g++.dg/tree-ssa/pr61034.C -std=gnu++11 scan-tree-dump-times fre2 "free" 10)
2015-11-26  Richard Biener  <rguenther@suse.de>

	PR testsuite/67203
	* g++.dg/tree-ssa/pr61034.C: Make expected optimization result
	dependent on PUSH_ARGS_REVERSED.  Drop optimization level and
	also monitor final optimization result.

From-SVN: r230940
2015-11-26 11:53:13 +00:00
Jakub Jelinek
9d465067af re PR rtl-optimization/68249 (wrong code at -O2 and -O3 on x86_64-linux-gnu)
PR rtl-optimization/68249
	PR rtl-optimization/68321
	* gcc.c-torture/execute/pr68249.c: New test.
	* gcc.c-torture/execute/pr68321.c: New test.

From-SVN: r230939
2015-11-26 12:52:11 +01:00
Ilya Enkovich
d0470103a9 re PR target/68416 ([MPX] GCC emits a lot of redundant bndmov instructions)
gcc/

2015-11-26  Vladimir Makarov  <vmakarov@redhat.com>

	PR target/68416
	* config/i386/i386.h (enum reg_class): Add
	bounds registers to ALL_REGS.

gcc/testsuite/

2015-11-26  Ilya Enkovich  <enkovich.gnu@gmail.com>

	PR target/68416
	* gcc.target/i386/mpx/pr68416.c: New test.

From-SVN: r230938
2015-11-26 11:49:20 +00:00
Eric Botcazou
182a997303 Back out latest change.
From-SVN: r230935
2015-11-26 11:17:20 +00:00
Paolo Carlini
a3be0c83f8 re PR c++/67313 (ICE: in vague_linkage_p, at cp/decl2.c:1878 with -fno-weak and variadic template)
2015-11-26  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/67313
	* g++.dg/cpp0x/no-weak1.C: New.

From-SVN: r230934
2015-11-26 10:37:33 +00:00
Jakub Jelinek
1a80d6b87d re PR tree-optimization/68128 (A huge regression in Parboil v2.5 OpenMP CUTCP test (2.5 times lower performance))
PR tree-optimization/68128
	* tree.h (OMP_CLAUSE_SHARED_READONLY): Define.
	* gimplify.c: Include gimple-walk.h.
	(enum gimplify_omp_var_data): Add GOVD_WRITTEN.
	(omp_notice_variable): Set flags to n->value if n already
	exists in target region, but we need to jump to do_outer.
	(omp_shared_to_firstprivate_optimizable_decl_p,
	omp_mark_stores, omp_find_stores_op, omp_find_stores_stmt): New
	functions.
	(gimplify_adjust_omp_clauses_1): Set OMP_CLAUSE_SHARED_READONLY
	on OMP_CLAUSE_SHARED if it is a scalar non-addressable that is
	not modified in the body.  Call omp_mark_stores for outer
	contexts on OMP_CLAUSE_SHARED clauses if they could be written
	in the body or on OMP_CLAUSE_LASTPRIVATE.
	(gimplify_adjust_omp_clauses): Add body argument, call
	omp_find_stores_{stmt,op} on the body through walk_gimple_seq.
	Set OMP_CLAUSE_SHARED_READONLY
	on OMP_CLAUSE_SHARED if it is a scalar non-addressable that is
	not modified in the body.  Call omp_mark_stores for outer
	contexts on OMP_CLAUSE_SHARED clauses if they could be written
	in the body or on OMP_CLAUSE_LASTPRIVATE or on OMP_CLAUSE_LINEAR
	without OMP_CLAUSE_LINEAR_NO_COPYOUT or on OMP_CLAUSE_REDUCTION.
	(gimplify_oacc_cache, gimplify_omp_parallel, gimplify_omp_task,
	gimplify_omp_for, gimplify_omp_workshare, gimplify_omp_target_update,
	gimplify_expr): Adjust gimplify_adjust_omp_clauses callers.
	* tree-nested.c (convert_nonlocal_omp_clauses,
	convert_local_omp_clauses): Clear OMP_CLAUSE_SHARED_READONLY on
	non-local vars or local vars referenced from nested routines.
	* omp-low.c (scan_sharing_clauses): For OMP_CLAUSE_SHARED_READONLY
	attempt to optimize it into OMP_CLAUSE_FIRSTPRIVATE.  Even for
	TREE_READONLY, don't call use_pointer_for_field with non-NULL
	second argument until we are sure we are keeping OMP_CLAUSE_SHARED.

	* gcc.dg/gomp/pr68128-1.c: New test.
	* gcc.dg/gomp/pr68128-2.c: New test.

From-SVN: r230932
2015-11-26 11:18:50 +01:00
Paolo Bonzini
a37a22da2d implement-c.texi (Integers Implementation): Make GCC's promises about signed left shift stronger and clarify the cases when...
2015-11-26  Paolo Bonzini <bonzini@gnu.org>

	* doc/implement-c.texi (Integers Implementation): Make GCC's promises
	about signed left shift stronger and clarify the cases when they're
	broken.

From-SVN: r230931
2015-11-26 10:16:56 +00:00
Kyrylo Tkachov
b3877860a8 [calls.c] PR rtl-optimization/67226: Take into account pretend_args_size when checking stack offsets for sibcall optimisation
2015-11-26  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
            Bernd Schmidt  <bschmidt@redhat.com>

	PR rtl-optimization/67226
	* calls.c (store_one_arg): Take into account
	crtl->args.pretend_args_size when checking for overlap between
	arg->value and argblock + arg->locate.offset during sibcall
	optimization.

	* gcc.c-torture/execute/pr67226.c: New test.


Co-Authored-By: Bernd Schmidt <bernds@redhat.com>

From-SVN: r230929
2015-11-26 09:58:28 +00:00
Jakub Jelinek
62775f0d9a re PR c++/68508 (Internal compiler error with parentheses around return value in C++14 with ASan enabled)
PR c++/68508
	* cp-tree.h (cp_ubsan_maybe_instrument_downcast): Add INTYPE argument.
	* cp-ubsan.c (cp_ubsan_maybe_instrument_downcast): Likewise.  Use
	it instead of or in addition to TREE_TYPE (op).  Use
	is_properly_derived_from, return NULL_TREE if TREE_TYPE (intype) and
	TREE_TYPE (type) are the same type minus qualifiers.
	* typeck.c (build_static_cast_1): Adjust callers.

	* g++.dg/ubsan/pr68508.C: New test.

From-SVN: r230928
2015-11-26 10:52:48 +01:00
Wilco Dijkstra
bf8e1b52f7 [AArch64] Update patterns to support FP zero
2015-11-26  Wilco Dijkstra  <wdijkstr@arm.com>

	* config/aarch64/aarch64.md (cbranch<mode>4): Use
	aarch64_fp_compare_operand.
	(store_pairsf): Use aarch64_reg_or_fp_zero.
	(store_pairdf): Likewise.
	(cstore<mode>4): Use aarch64_fp_compare_operand.
	(cmov<mode>6): Likewise.
	* config/aarch64/aarch64-ldpstp.md: Use aarch64_reg_or_fp_zero.

From-SVN: r230927
2015-11-26 09:46:34 +00:00