Disable USE_PT_GNU_EH_FRAME frame unwinder support for old OS versions,
fixing compilation errors:
.../libgcc/unwind-dw2-fde-dip.c:75:21: error: unknown type name 'Elf_Phdr'
75 | # define ElfW(type) Elf_##type
| ^~~~
.../libgcc/unwind-dw2-fde-dip.c:132:9: note: in expansion of macro 'ElfW'
132 | const ElfW(Phdr) *p_eh_frame_hdr;
| ^~~~
.../libgcc/unwind-dw2-fde-dip.c:75:21: error: unknown type name 'Elf_Phdr'
75 | # define ElfW(type) Elf_##type
| ^~~~
.../libgcc/unwind-dw2-fde-dip.c:133:9: note: in expansion of macro 'ElfW'
133 | const ElfW(Phdr) *p_dynamic;
| ^~~~
.../libgcc/unwind-dw2-fde-dip.c:165:37: warning: 'struct dl_phdr_info' declared inside parameter list will not be visible outside of this definition or declaration
165 | _Unwind_IteratePhdrCallback (struct dl_phdr_info *info, size_t size, void *ptr)
| ^~~~~~~~~~~~
[...]
and producing a working cross-compiler at least with VAX/NetBSD 1.6.2.
libgcc/
* unwind-dw2-fde-dip.c [__OpenBSD__ || __NetBSD__]
(USE_PT_GNU_EH_FRAME): Do not define if !TARGET_DL_ITERATE_PHDR.
Hardware multipliers that support widening 32-bit multiplication can
be used to perform a 64-bit * 64-bit multiplication more efficiently
than a software implementation.
The following equation is used to perform 64-bit multiplication for
devices with "32bit" or "f5series" hardware multiply versions:
64bit_result = (low32_op0 * lop32_op1)
+ ((low32_op0 * high32_op1) << 32)
+ ((high32_op0 * low32_op1) << 32)
libgcc/ChangeLog:
* config/msp430/lib2hw_mul.S (mult64_hw): New.
(if MUL_32): Use mult64_hw for __muldi3.
(if MUL_F5): Use mult64_hw for __muldi3.
* config/msp430/lib2mul.c (__muldi3): New.
* config/msp430/t-msp430 (LIB2FUNCS_EXCLUDE): Define.
This patch retires ppc64-fp.c in favour of using
"LIB2_SIDITI_CONV_FUNCS = yes", which is a lot better solution than
having a copy of selected libgcc2.c functions.
* config/rs6000/t-ppc64-fp (LIB2ADD): Delete.
(LIB2_SIDITI_CONV_FUNCS): Define.
* config/rs6000/ppc64-fp.c: Delete file.
The naming scheme used by GCC to reference MSP430 hardware multiply
library functions is inconsistent.
Sometimes the "GCC" names (e.g. mulsi2) are used, other times the
"MSPABI" names (e.g. __mspabi_mpyl) are used.
Also, sometimes an identifier for the hardware multiply support is
appended to the GCC name, when the functions are defined, but this is
not required.
This patch fixes those issues, so the names used to refer to the
hardware multiply library functions follow a consistent pattern.
gcc/ChangeLog:
* config/msp430/msp430.c (msp430_output_labelref): Don't process mspabi
hwmult library function names into GCC-style names.
libgcc/ChangeLog:
* config/msp430/lib2hw_mul.S: Omit _hw* suffix from GCC names for
hwmult library functions.
gcc/testsuite/ChangeLog:
* gcc.target/msp430/rtx-cost-Os-f5series.c: Adjust test to use new
hwmult library function name.
This adds ${cpu_type}/t-lse and t-slibgcc-libgcc to the tmake_file
list for aarch64-vxworks7* configurations, as the Linux port does.
t-lse is needed by all triplets now anyway and the standard setting
for slibgcc makes sense as we are working on reintroducing PIC support
for RTPs on various targets. The VxWorks7 system environments are leaning
towards more and more similarilties with Linux in general, so the
closer configurations the better.
2020-11-02 Pat Bernardi <bernardi@adacore.com>
libgcc/
* config.host (aarch64-vxworks7*, tmake_file): Add
${cpu_type}/t-lse and t-slibgcc-libgcc.
Co-authored-by: Olivier Hainque <hainque@adacore.com>
Previously, the SEH version of _Unwind_Backtrace did unwind
the stack and call the provided callback function as intended,
but there was little the caller could do within the callback to
actually get any info about that particular level in the unwind.
Set the ra and cfa pointers, which are used by _Unwind_GetIP
and _Unwind_GetCFA, to allow using these functions from the
callacb to inspect the state at each stack frame.
2020-09-08 Martin Storsjö <martin@martin.st>
libgcc/
* unwind-seh.c (_Unwind_Backtrace): Set the ra and cfa pointers
before calling the callback.
This change extends the VxWorks support on intel CPUs to
VxWorks7r2 for x86_64 as well as x86, with a "mcmodel=large"
additional multilib for the 64bit configuration.
The support for fPIC is not functional yet for this model,
so we just don't add the corresponding multilib.
We extend the range of CPU families handled by TARGET_OS_CPP_BUILTINS,
accounting for the fact that archs older than PENTIUM4 are
not supported (any more) by VxWorks 7.
As we did for powerpc, we leverage VX_CPU_PREFIX to emit different
forms of definitions for different families of VxWorks as the system
headers's expectations has evolved between Vx 5, 6 and 7.
2020-10-27 Olivier Hainque <hainque@adacore.com>
gcc/
* config.gcc: Adjust the ix86/x86_64-wrs-vxworks filters
to apply to VxWorks 7 as well.
* config/i386/t-vxworks (MULTILIB_OPTIONS, MULTILIB_DIRNAMES):
Remove the fPIC multilib and add one for the large code model
on x86_64.
* config/i386/vxworks.h: Separate sections for TARGET_VXWORKS7,
other variants and common bits.
(TARGET_OS_CPP_BUILTINS): Augment to support a range of CPU
families. Leverage VX_CPU_PREFIX.
(CC1_SPEC): Add definition.
(STACK_CHECK_PROTECT): Use conditional expression instead of
heavier to read conditioned macro definitions.
libgcc/
* config.host: Adjust the ix86/x86_64-wrs-vxworks filters
to apply to VxWorks 7 as well.
Co-authored-by: Douglas Rupp <rupp@adacore.com>
Co-authored-by: Pat Bernardi <bernardi@adacore.com>
Fix a basic #if/#ifdef confusion which leads to improper
choices in some configurations.
2020-10-28 Olivier Hainque <hainque@adacore.com>
libgcc/
* config/gthr-vxworks-tls.c: Fix preprocessor logic
controlling the definition of VX_ENTER_TLS_DTOR and
VX_LEAVE_TLS_DTOR based on a version major check.
This fixes the name of the macro used to condition the
inclusion of an actual implementation of some of the gthread
support services for VxWorks, to agree with the side
defining that macro based on tests against the targetted
VxWorks version major.
2020-10-28 Olivier Hainque <hainque@adacore.com>
libgcc/
* config/gthr-vxworks-thread.c: Fix name of macro used
to condition the inclusion of an actual implementation.
gcc/ChangeLog:
PR gcov-profile/97461
* gcov-io.h (GCOV_PREALLOCATED_KVP): Pre-allocate 64
static counters.
libgcc/ChangeLog:
PR gcov-profile/97461
* libgcov.h (gcov_counter_add): Use first static counters
as it should help to have malloc wrappers set up.
gcc/testsuite/ChangeLog:
PR gcov-profile/97461
* gcc.dg/tree-prof/pr97461.c: New test.
The tests for macros possibly defined in gthr.h needs to
be performed after the corresponding #include. This was tested
together with the previous updates to gthr-vxworks-thread.c
and gthr-vxworks-cond.c and was meant to be squashed with them.
2010-10-23 Rasmus Villemoes <rv@rasmusvillemoes.dk>
libgcc/
* config/gthr-vxworks-thread.c: #include gthr.h before
testing the guard defined there.
* config/gthr-vxworks-cond.c: Likewise.
As mentioned in the PR, since 2005 we reject if array elements are smaller
than their alignment (i.e. overaligned elements), because such arrays don't
make much sense, only their first element is guaranteed to be aligned as
user requested, but the next element can't be.
The following testcases show something we've been silent about but is
equally bad, the 2005 case is just the most common special case of that
the array element size is not divisible by the alignment. In those arrays
too only the first element is guaranteed to be properly aligned and the
second one can't be.
This patch rejects those cases too, but keeps the existing wording for the
old common case.
Unfortunately, the patch breaks bootstrap, because libbid uses this mess
(forms arrays with 24 byte long elements with 16 byte element alignment).
I don't really see justification for that, so I've decreased the alignment
to 8 bytes instead.
2020-10-23 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/97164
gcc/
* stor-layout.c (layout_type): Also reject arrays where element size
is constant, but not a multiple of element alignment.
gcc/testsuite/
* c-c++-common/pr97164.c: New test.
* gcc.c-torture/execute/pr36093.c: Move ...
* gcc.dg/pr36093.c: ... here. Add dg-do compile and dg-error
directives.
* gcc.c-torture/execute/pr43783.c: Move ...
* gcc.dg/pr43783.c: ... here. Add dg-do compile, dg-options and
dg-error directives.
libgcc/config/libbid/
* bid_functions.h (UINT192): Decrease alignment to 8 bytes.
This change introduces support for the most recent versions
of VxWorks on PowerPC targets, for both 32 and 64 bit thanks
to a bi-arch setup.
The system compilers are essentially configured as Linux
toolchains with only a few specificities and we replicate
that model here.
The most visible specificities are the use of secureplt by
default, the pre-definition of some macros that the system
headers still rely on (_VX_CPU and _VX_CPU_FAMILY, for example),
and of course some variations related to the so VxWorks typical
kernel vs RTP mode distinction.
In addition to the introduction of config.gcc and libgcc
configuration chunks, much inspired by the linux ones, the
change
- Reworks rs6000/vxworks.h file to feature bits common to the
Vx6 and Vx7 port then a separate section for each, where the
Vx7 part is very short as we rely on the Linux definitions
for most things.
- Adjusts the CPU macro predefinitions in CPP_SPEC to resort
to "_VX_CPU" instead of "CPU" for Vx7, to better match the
more recent system headers expectations,
- Adds a cpu definition case for e6500.
- Changes to the use SUB3TARGET_OVERRIDE_OPTIONS instead of
SUBSUBTARGET_OVERRIDE_OPTIONS for specifics, so we don't
override the Linux's version of the latter for vx7.
2020-10-20 Douglas Rupp <rupp@adacore.com>
gcc/
* config.gcc (powerpc*-wrs-vxworks7r*): New case.
* config/rs6000/vxworks.h: Rework to handle VxWorks7.
Refactor as common bits + vx6 vs vx7 ones. For the
latter, rely essentially on the Linux configuration
and adjust CPU to _VX_CPU in CPP_SPEC. Add a case
for e6500. Use SUB3TARGET_OVERRIDE_OPTIONS for specifics
to preserve the Linux SUBSUBTARGET_OVERRIDE_OPTIONS
for vx7.
libgcc/
* config.host (powerpc*-wrs-vxworks7*): New case.
* configure.ac: Handle powerpc*-*-vxworks7* as
powerpc*-*-linux* for ppc-fp_type.
* configure: Regenerate.
Co-authored-by: Olivier Hainque <hainque@adacore.com>
As for condition variables, the C++0x threads support relies on
VxWorks entry points not available in VxWorks versions prior to 6.
We just expose absence of support for C++0x threads on such systems.
2020-10-15 Rasmus Villemoes <rv@rasmusvillemoes.dk>
libgcc/
* config/gthr-vxworks.h: Condition the ___GTHREADS_CXX0X
section on VxWorks >= 6.
* config/gthr-vxworks-thread.c: Condition the entire
implementation on __GTHREAD_CXX0X.
The condition variables support relies on kernel entry points
to enforce critical aspects of it's expected behavior.
Some of these entry points are not available prior to VxWorks 6,
so we just expose absence of support for condition variables on
such systems.
2020-10-15 Rasmus Villemoes <rv@rasmusvillemoes.dk>
libgcc/
* config/gthr-vxworks.h: Condition the __GTHREAD_HAS_COND
section on VxWorks >= 6.
* config/gthr-vxworks-cond.c: Condition the entire
implementation on __GTHREAD_HAS_COND.
This fixes an oversight and addresses a few build time warnings.
2020-10-15 Rasmus Villemoes <rv@rasmusvillemoes.dk>
libgcc/
* config/gthr-vxworks.c: #include <taskLib.h>.
As of today, the __gthread_enter/leave entry points are
only meaningful on VxWorks 6. Refactor the VX_ENTER_TLS_DTOR
macros accordingly.
2020-10-15 Rasmus Villemoes <rv@rasmusvillemoes.dk>
libgcc/
* config/gthr-vxworks-tls.c (VX_ENTER_TLS_DTOR): Nil
except on VxWorks 6.
Co-authored-by: Olivier Hainque <hainque@adacore.com>
The ports that support RTPs achieve the kernel/rtp compilation
and link distinction through the multilib mechanism.
This patch just removes the bogus explicit extraneous
materialization of this distinction in the common VxWorks
configuration files and leaves the rtp specialization all
to the multilib machinery.
2020-10-15 Olivier Hainque <hainque@adacore.com>
libgcc/
* config/t-vxcrtstuff: Remove the -kernel/-rtp specialization.
gcc/
* config/vxworks.h (VX_CRTBEGIN_SPEC): Likewise.
This change reworks the condition variables support for VxWorks
to address the very legit points raised by Rasmus in
https://gcc.gnu.org/pipermail/gcc/2020-May/232524.html
While some of the issues were taken care of by the use of semFlush,
a few others were indeed calling for adjustments.
We first considered resorting to the condvarLib library available
in VxWorks7. Unfortunately, it is vx7 only and we wanted something working
for at least vx 6.9 as well. It also turned out requiring the use of
recursive mutexes for condVarWait, which seemed unnecessarily constraining.
Instead, this change corrects the sequencing logic in a few places and
leverages the semExchange API to ensure the key atomicity requirement on
cond_wait operations.
2020-10-14 Alexandre Oliva <oliva@adacore.com>
libgcc/
* config/gthr-vxworks-thread.c: Include stdlib.h.
(tls_delete_hook): Prototype it.
(__gthread_cond_signal): Return early if no waiters. Consume
signal in case the semaphore got full. Use semInfoGet instead
of kernel-mode-only semInfo.
(__gthread_cond_timedwait): Use semExchange. Always take the
mutex again before returning.
* config/gthr-vxworks-cond.c (__ghtread_cond_wait): Likewise.
This is useful to handle ports where we might arrange to use
different sets of fixed headers for different multilibs, typically
for kernel vs rtp modes.
2020-10-14 Olivier Hainque <hainque@adacore.com>
libgcc/
* config/t-vxworks (LIBGCC2_INCLUDES): Append
$(MULTISUBDIR) to the -I path for fixed headers, as we
arrange to have different sets of such headers for different
multilibs when they are activated.
* config/t-vxworks7: Likewise.
The special vxworks rules for the compilation of libgcc had
-I.../gcc/include and not .../gcc/include-fixed, causing build
failure of our arm-vxworks7r2 port because of indirect dependencies
on limits.h.
The omission was just an oversight and this change just adds the
missing -I.
2020-10-14 Olivier Hainque <hainque@adacore.com>
libgcc/
* config/t-vxworks: Add include-fixed to include search
paths for libgcc on VxWorks.
* config/t-vxworks7: Likewise.
For sources which can't use any vector instructions, <x86intrin.h> and
<immintrin.h> cannot be included for compiler intrinsics:
$ echo "#include <x86intrin.h>" | gcc -S -O2 -mno-sse -mno-mmx -x c -
In file included from /usr/include/stdlib.h:1013,
from /usr/lib/gcc/x86_64-redhat-linux/10/include/mm_malloc.h:27,
from /usr/lib/gcc/x86_64-redhat-linux/10/include/xmmintrin.h:34,
from /usr/lib/gcc/x86_64-redhat-linux/10/include/immintrin.h:29,
from /usr/lib/gcc/x86_64-redhat-linux/10/include/x86intrin.h:32,
from <stdin>:1:
/usr/include/bits/stdlib-float.h: In function ‘atof’:
/usr/include/bits/stdlib-float.h:26:1: error: SSE register return with SSE disabled
26 | {
| ^
$
libgcc/config/i386/shadow-stack-unwind.h has a workaround:
/* NB: We need _get_ssp and _inc_ssp from <cetintrin.h>. But we can't
include <x86intrin.h> which ends up including <mm_malloc.h>, which
includes <stdlib.h> and <errno.h> unconditionally. But we can't
include any libc system headers unconditionally from libgcc. Avoid
including <mm_malloc.h> here by defining _IMMINTRIN_H_INCLUDED. */
#define _IMMINTRIN_H_INCLUDED
#include <cetintrin.h>
#undef _IMMINTRIN_H_INCLUDED
Add a standalone intrinsic header file, <x86gprintrin.h>, to provide
integer only intrinsics. All integer only intrinsics are placed in
<x86gprintrin.h>. <x86intrin.h> and <immintrin.h> simply include
<x86gprintrin.h>.
gcc/
PR target/97148
* config.gcc (extra_headers): Add x86gprintrin.h.
* config/i386/adxintrin.h: Check _X86GPRINTRIN_H_INCLUDED for
<x86gprintrin.h>.
* config/i386/bmi2intrin.h: Likewise.
* config/i386/bmiintrin.h: Likewise.
* config/i386/cetintrin.h: Likewise.
* config/i386/cldemoteintrin.h: Likewise.
* config/i386/clflushoptintrin.h: Likewise.
* config/i386/clwbintrin.h: Likewise.
* config/i386/enqcmdintrin.h: Likewise.
* config/i386/fxsrintrin.h: Likewise.
* config/i386/ia32intrin.h: Likewise.
* config/i386/lwpintrin.h: Likewise.
* config/i386/lzcntintrin.h: Likewise.
* config/i386/movdirintrin.h: Likewise.
* config/i386/pconfigintrin.h: Likewise.
* config/i386/pkuintrin.h: Likewise.
* config/i386/rdseedintrin.h: Likewise.
* config/i386/rtmintrin.h: Likewise.
* config/i386/serializeintrin.h: Likewise.
* config/i386/tbmintrin.h: Likewise.
* config/i386/tsxldtrkintrin.h: Likewise.
* config/i386/waitpkgintrin.h: Likewise.
* config/i386/wbnoinvdintrin.h: Likewise.
* config/i386/xsavecintrin.h: Likewise.
* config/i386/xsaveintrin.h: Likewise.
* config/i386/xsaveoptintrin.h: Likewise.
* config/i386/xsavesintrin.h: Likewise.
* config/i386/xtestintrin.h: Likewise.
* config/i386/immintrin.h: Include <x86gprintrin.h> instead of
<fxsrintrin.h>, <xsaveintrin.h>, <xsaveoptintrin.h>,
<xsavesintrin.h>, <xsavecintrin.h>, <lzcntintrin.h>,
<bmiintrin.h>, <bmi2intrin.h>, <xtestintrin.h>, <cetintrin.h>,
<movdirintrin.h>, <sgxintrin.h, <pconfigintrin.h>,
<waitpkgintrin.h>, <cldemoteintrin.h>, <enqcmdintrin.h>,
<serializeintrin.h>, <tsxldtrkintrin.h>, <adxintrin.h>,
<clwbintrin.h>, <clflushoptintrin.h>, <wbnoinvdintrin.h> and
<pkuintrin.h>.
(_wbinvd): Moved to config/i386/x86gprintrin.h.
(_rdrand16_step): Likewise.
(_rdrand32_step): Likewise.
(_rdpid_u32): Likewise.
(_readfsbase_u32): Likewise.
(_readfsbase_u64): Likewise.
(_readgsbase_u32): Likewise.
(_readgsbase_u64): Likewise.
(_writefsbase_u32): Likewise.
(_writefsbase_u64): Likewise.
(_writegsbase_u32): Likewise.
(_writegsbase_u64): Likewise.
(_rdrand64_step): Likewise.
(_ptwrite64): Likewise.
(_ptwrite32): Likewise.
* config/i386/x86gprintrin.h: New file.
* config/i386/x86intrin.h: Include <x86gprintrin.h>. Don't
include <ia32intrin.h>, <lwpintrin.h>, <tbmintrin.h>,
<popcntintrin.h>, <mwaitxintrin.h> and <clzerointrin.h>.
gcc/testsuite/
* gcc.target/i386/avx-1.c (__builtin_ia32_lwpval32): New to
support <lwpintrin.h> included in <x86gprintrin.h>.
(__builtin_ia32_lwpval64): Likewise.
(__builtin_ia32_lwpins32): Likewise.
(__builtin_ia32_lwpins64): Likewise.
(__builtin_ia32_bextri_u32): New to support <tbmintrin.h>
included in <x86gprintrin.h>.
(__builtin_ia32_bextri_u64): Likewise.
* gcc.target/i386/x86gprintrin-1.c: New test.
* gcc.target/i386/x86gprintrin-2.c: Likewise.
* gcc.target/i386/x86gprintrin-3.c: Likewise.
* gcc.target/i386/x86gprintrin-4.c: Likewise.
* gcc.target/i386/x86gprintrin-4a.c: Likewise.
* gcc.target/i386/x86gprintrin-5.c: Likewise.
* gcc.target/i386/x86gprintrin-5a.c: Likewise.
* gcc.target/i386/x86gprintrin-5b.c: Likewise.
* gcc.target/i386/x86gprintrin-6.c: Likewise.
libgcc/
PR target/97148
* config/i386/shadow-stack-unwind.h: Include <x86gprintrin.h>
instead of <cetintrin.h>.
Generate assembly with .localentry,1 functions using @notoc calls.
This patch makes libgcc.a asm look the same as power10 pcrel as far as
toc/notoc is concerned.
Otherwise calling between functions that advertise as using the TOC
and those that don't, will require linker call stubs in statically
linked code.
gcc/
* config/rs6000/ppc-asm.h: Support __PCREL__ code.
libgcc/
* config/rs6000/morestack.S,
* config/rs6000/tramp.S: Support __PCREL__ code.
libitm/
* config/powerpc/sjlj.S: Support __PCREL__ code.
We've had this hack in the libgcc config to build libgcc with
-mcmodel=small for powerpc64 for a long time. It wouldn't be a bad
thing if someone who knows the multilib machinery well could arrange
for -mcmodel=small to be passed just for ppc64 when building for
earlier than power10. But for now, make -mno-minimal-toc do nothing
when pcrel. Which will do the right thing for any project that has
copied libgcc's trick.
We want this if configuring using --with-cpu=power10 to build a
power10 pcrel libgcc. --mcmodel=small turns off pcrel.
gcc/
* config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Don't
set -mcmodel=small for -mno-minimal-toc when pcrel.
libgcc/
* config/rs6000/t-linux: Document purpose of -mno-minimal-toc.
Use `-fasynchronous-unwind-tables' rather than `-fexceptions
-fnon-call-exceptions' in LIB2_DIVMOD_FUNCS compilation flags so as to
provide unwind tables for the affected functions while not pulling the
unwinder proper, which is not required here.
Beyond saving program space it fixes a RISC-V glibc build error due to
unsatisfied `malloc' and `free' references from the unwinder causing
link errors with `ld.so' where libgcc has been built at -O0.
libgcc/
* config/riscv/t-elf (LIB2_DIVMOD_EXCEPTION_FLAGS): New
variable.
The libgcc HF support routines were being linked into libgcc_s.so,
but weren't being exported.
libgcc/
* config/aarch64/libgcc-softfp.ver: New file.
* config/aarch64/t-softfp (SHLIB_MAPFILES): Add it.
AIX FAT libraries should be built with the version of AR chosen by configure.
The GNU Make $(AR) variable includes the AIX -X32_64 option needed
by the default Makefile rules to accept both 32 bit and 64 bit object files.
The -X32_64 option conflicts with ar archiving objects of the same name
used to build FAT libraries.
This patch changes the Makefile fragments for AIX FAT libraries to use $(AR),
but strips the -X32_64 option from the Make variable.
libgcc/ChangeLog:
2020-09-27 Clement Chigot <clement.chigot@atos.net>
* config/rs6000/t-slibgcc-aix: Use $(AR) without -X32_64.
libatomic/ChangeLog:
2020-09-27 Clement Chigot <clement.chigot@atos.net>
* config/t-aix: Use $(AR) without -X32_64.
libgomp/ChangeLog:
2020-09-27 Clement Chigot <clement.chigot@atos.net>
* config/t-aix: Use $(AR) without -X32_64.
libstdc++-v3/ChangeLog:
2020-09-27 Clement Chigot <clement.chigot@atos.net>
* config/os/aix/t-aix: Use $(AR) without -X32_64.
libgfortran/ChangeLog:
2020-09-27 Clement Chigot <clement.chigot@atos.net>
* config/t-aix: Use $(AR) without -X32_64.
