In the parlance of <https://gcc.gnu.org/wiki/CC0Transition>,
this is a basic "type 2" conversion, without
condition-code-related optimizations (just plain CCmode), but
with "cstore{M}4" defined. CRIS is somewhat similar to the
m68k; most instructions affect condition-codes. To wit, it
lacks sufficient instructions to compose an arbitrary valid
address in a register, specifically from a valid address where
involved registers have to be spilled or adjusted, without
affecting condition-codes in CRIS_CC0_REGNUM aka. dccr.
On the other hand, moving dccr to and from a stackpointer-plus-
constant-offset-address *can* be done without additional register
use, and moving to or from a general register does not affect
it. There's no instruction to add a constant to a register or
to put a constant in a register, without affecting dccr, but
there *is* an instruction to add a register (optionally scaled)
to another without affecting dccr (i.e. "addi"). Also, moves
*to* memory from any register do not affect dccr, and likewise
between another special registers and a general register. Maybe
some of that opens up the solution-space to a better solution
than clobbering dccr until reload_completed; to be investigated.
FAOD: I know what to do in the direction of defining and using
additional CCmodes, but prefer to do the full transition in
smaller steps.
Regarding the similarity to m68k, I didn't follow the steps of
the m68k cc0 transition, making use of the final_postscan_insn
hook as with the a NOTICE_UPDATE_CC machinery. For one, because
it seems to be lacking in that it keeps compare-elimination
restricted to output-time, but also because it seems a bad match
considering that CRIS has delay-slots; better try to eliminate
compares earlier. Another approach which I originally intended
to implement, that of the visium port of defining three variants
for most insns (not counting the define_subst expansions;
unaffecting-before-reload, clobbering and setting), seems
overworked and bloating the machine description. I may be
proven wrong, but I prefer we fix gcc if some something bails on
seeing a parallel with a clobber of that specific hard-register.
Also, I chose to remove most anonymous combination-matching
patterns; matchers, splitters and peepholes instead of
converting them to add clobbers of CRIS_CC0_REGNUM. There are
exclusions: those covered in the test-suite, if trivial enough.
Many of these patterns are used to handle the side-effect-
assignment addressing-modes as put together by combine: a
"prefix instruction" before the main instruction, where the main
instruction uses the post-incremented-register addressing-mode
and the "left-over" instruction-field in the prefixed insn to
assign a register. An example: the hopefully descriptive
"move.d $r9,[$r0=$r1+1234]" compared to "move.d $r9,[$r1+1234]";
both formed by the prefix insn "biap.w 1234,$r1" before
respectively "move.d $r9,[$r0+]" and "move.d $r9,[$r0]". Other
prefix variants exist. Useful, but optional, except where
side-effect assignment was used in a special case in the
function prologue; adjusted to a less optimal combination.
Support like the function cris_side_effect_mode_ok is kept.
I intend to put back as many as I find use for, of those
anonymous patterns in a controlled manner, with self-contained
test-cases proving their usability, rather than symmetry with
other instructions and similar addressing modes, which guided
the original introduction. I've entered pr93372 to track code
performance regressions related to this transition, with focus
on target-side causes and fixes; besides the function prologue
special-case, there were some checking presence of the bit-test
(btstq) instruction.
The now-gone "tst<mode>" patterns deserve a comment too: they
were an artefact from pre-"cbranch" era, now fully folded into
the "cmp<mode>" patterns.
I've left the now-unused "cc" insn attribute in, for the time
being; to be removed, used or transformed to be useful with
further work to fix pr93372. It can't be used as is, because
"normal" doesn't mean "like a compare instruction" but "handled
by NOTICE_UPDATE_CC" and may in fact be reflecting e.g. reverse
operands, something that bit me during the conversion.
gcc:
Move trivially from cc0 to reg:CC model, removing most optimizations.
* config/cris/cris.md: Remove all side-effect patterns and their
splitters. Remove most peepholes. Add clobbers of CRIS_CC0_REGNUM
to all but post-reload control-flow and movem insns. Remove
constraints on all modified expanders. Remove obsoleted cc0-related
references.
(attr "cc"): Remove alternative "rev".
(mode_iterator BWDD, DI_, SI_): New.
(mode_attr sCC_destc, cmp_op1c, cmp_op2c): New.
("tst<mode>"): Remove; fold as "M" alternative into compare insn.
("mstep_shift", "mstep_mul"): Remove patterns.
("s<rcond>", "s<ocond>", "s<ncond>"): Anonymize.
* config/cris/cris.c: Change all non-condition-code,
non-control-flow emitted insns to add a parallel with clobber of
CRIS_CC0_REGNUM, mostly by changing from gen_rtx_SET with
emit_insn to use of emit_move_insn, gen_add2_insn or
cris_emit_insn, as convenient.
(cris_reg_overlap_mentioned_p)
(cris_normal_notice_update_cc, cris_notice_update_cc): Remove.
(cris_movem_load_rest_p): Don't assume all elements in a
PARALLEL are SETs.
(cris_store_multiple_op_p): Ditto.
(cris_emit_insn): New function.
* cris/cris-protos.h (cris_emit_insn): Declare.
Part of the removal of crisv32-* and cris-*-linux* (cris-elf remains).
Essentially everything is gone, including functions and
target-specific definitions and most obvious knock-on effects,
like removing unused functions and arguments.
There's one exception: the register-class effects of the CRIS v32
ACR register are deliberately excluded and left in (i.e. its
use by-number is removed and the ACE_REGS regclass is always
unusable - but present). Changing register class definitions to
remove ACR_REGS and related classes (folding their uses into
remaining classes), causes extra register moves in libgcc (as an
immediate observation; actual net effect unknown), which is
unwanted both for performance reasons and also causing extra
work comparing before/after cc0-machinery-conversion changes
ahead. The actual cause and solution for these negative effects
of cleaning up the register-classes will at the moment have to
remain to-be-investigated.
If CRIS v32 support is reinstated, consider doing the .md part
not as separate patterns with opposite conditions but merged
patterns with necessarily-different alternatives using the
"enabled" attribute (which was not invented back then).
Also, a single ACR-related RTL-dump example in a cris.md
comment, related to a strict_low_part issue is kept, but marked
as obsolete.
Note that the "b" register-constraint (non-ACR registers; can be
used for post-increment) is left in, as that may have extant
uses outside of gcc. Its availability is tested by
gcc.target/cris/asm-b-1.c. When ACR register classes are
removed, it's probably best to make it equal to GENERAL_REGS.
gcc:
* config/cris: Remove shared-library and CRIS v32 support.
Part of the removal of crisv32-* and cris-*-linux* (cris-elf remains).
Uses of "cris*" (as opposed to "cris") are deliberately left unadjusted.
gcc/testsuite:
* gcc.dg/20020919-1.c, gcc.dg/pr31866.c, gcc.dg/pr46647.c,
gcc.dg/sibcall-10.c, gcc.dg/sibcall-3.c, gcc.dg/sibcall-4.c,
gcc.dg/sibcall-9.c, gcc.dg/torture/cris-asm-mof-1.c,
gcc.dg/torture/cris-volatile-1.c, gcc.dg/torture/pr38948.c,
gcc.dg/tree-ssa/20040204-1.c, gcc.dg/tree-ssa/loop-1.c,
gcc.dg/weak/typeof-2.c, lib/target-supports.exp: Remove remaining
traces of crisv32-*.
Part of the removal of crisv32-* and cris-*-linux* (cris-elf remains).
After this, within gcc.target, grep -i v32 and grep -i linux
finds no matches, except for a comment in
gcc.target/cris/asmreg-1.c, now grammar-corrected.
gcc/testsuite:
* gcc.target/cris/: Adjust for removing crisv32-* and cris-linux-*.
Part of the removal of crisv32-* and cris-*-linux* (cris-elf remains).
libgcc:
* config.host: Remove support for crisv32-*-* and cris*-*-linux.
* config/cris/libgcc-glibc.ver, config/cris/t-linux: Remove.
Or really, move from the obsolete targets section, to
unsupported targets section, and remove crisv32-*-* and
cris-*-linux* from the rest.
Part of the removal of crisv32-* and cris-*-linux* (cris-elf remains).
gcc:
* config.gcc: Remove support for crisv32-*-* and cris-*-linux*.
Compared to the cc0 version, I noticed a regression in
delay-slot-filling for CRIS for several functions in libgcc with
a similar layout, one being lshrdi3, where with cc0 all
delay-slots were filled, as exposed by the test-case in
gcc.target/cris/pr93372-1.c.
There's one slot that fails to be filled for the decc0rated CRIS
port. A gdb session shows it is because of the automatic
inclusion of TARGET_FLAGS_REGNUM in "registers needed at the end
of the function" because there are insns in the epilogue that
clobber the condition-code register. I'm not trying to tell a
clobber from a set, as parallels with set instead of clobber
seems likely to happen too, for targets with TARGET_FLAGS_REGNUM
set.
Other targets with delay-slots and one dedicated often-clobbered
condition-code-register should consider defining
TARGET_FLAGS_REGNUM. I noticed it improved delay-slot-filling
also in other situations than this.
(Previously approved by Jeff Law.)
gcc:
* resource.c (init_resource_info): Filter-out TARGET_FLAGS_REGNUM
from end_of_function_needs.
When __CET__ is defined, <cet.h> should be included to add Intel CET
marker to object file and _CET_ENDBR should be placed at function entry
to indicate indirect branch target.
* libdruntime/config/x86/switchcontext.S: Include <cet.h> if
__CET__ is defined.
(_CET_ENDBR): New. Define if __CET__ is not defined.
(fiber_switchContext): Add _CET_ENDBR after .cfi_startproc.
When --enable-cet is used to configure GCC, enable Intel CET in libphobos.
* Makefile.am (AM_MAKEFLAGS): Add $(CET_FLAGS) to GCC FLAGS.
* configure.ac (CET_FLAGS): Add GCC_CET_FLAGS and AC_SUBST.
* Makefile.in: Regenerated.
* aclocal.m4: Likewise.
* configure.ac: Likewise.
There are several places where we insert bind expressions while
making the coroutine AST transforms. These should be marked as
having side-effects where relevant, which had been omitted. This
leads to at least one failure in the cppcoros test suite, where a loop
body is dropped in gimplification because it is not marked.
gcc/cp/ChangeLog:
2020-05-08 Iain Sandoe <iain@sandoe.co.uk>
PR c++/95003
* coroutines.cc (build_actor_fn): Ensure that bind scopes
are marked as having side-effects where necessary.
(replace_statement_captures): Likewise.
(morph_fn_to_coro): Likewise.
gcc/testsuite/ChangeLog:
2020-05-08 Iain Sandoe <iain@sandoe.co.uk>
PR c++/95003
* g++.dg/coroutines/torture/pr95003.C: New test.
The existing directives-only code (a) punched a hole through the
libcpp interface and (b) didn't support raw string literals. This
reimplements this preprocessing mode. I added a proper callback
interface, and adjusted c-ppoutput to use it. Sadly I cannot get rid
of the libcpp/internal.h include for unrelated reasons.
The new scanner is in lex.x, and works doing some backwards scanning
when it finds a charater of interest. This reduces the number of
cases one has to deal with in forward scanning. It may have different
failure mode than forward scanning on bad tokenization.
Finally, Moved some cpp tests from the c-specific dg.gcc/cpp directory
to the c-c++-common/cpp shared directory,
libcpp/
* directives-only.c: Delete.
* Makefile.in (libcpp_a_OBJS, libcpp_a_SOURCES): Remove it.
* include/cpplib.h (enum CPP_DO_task): New enum.
(cpp_directive_only_preprocess): Declare.
* internal.h (_cpp_dir_only_callbacks): Delete.
(_cpp_preprocess_dir_only): Delete.
* lex.c (do_peek_backslask, do_peek_next, do_peek_prev): New.
(cpp_directives_only_process): New implementation.
gcc/c-family/
Reimplement directives only processing.
* c-ppoutput.c (token_streamer): Ne.
(directives_only_cb): New. Swallow ...
(print_lines_directives_only): ... this.
(scan_translation_unit_directives_only): Reimplment using the
published interface.
gcc/testsuite/
* gcc.dg/cpp/counter-[23].c: Move to c-c+_-common/cpp.
* gcc.dg/cpp/dir-only-*: Likewise.
* c-c++-common/cpp/dir-only-[78].c: New.
This delays the SLP permutation check to vectorizable_load and optimizes
permutations only after all SLP instances have been generated and the
vectorization factor is determined.
2020-05-08 Richard Biener <rguenther@suse.de>
* tree-vectorizer.h (vec_info::slp_loads): New.
(vect_optimize_slp): Declare.
* tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do
nothing when there are no loads.
(vect_gather_slp_loads): Gather loads into a vector.
(vect_supported_load_permutation_p): Remove.
(vect_analyze_slp_instance): Do not verify permutation
validity here.
(vect_analyze_slp): Optimize permutations of reductions
after all SLP instances have been gathered and gather
all loads.
(vect_optimize_slp): New function split out from
vect_supported_load_permutation_p. Elide some permutations.
(vect_slp_analyze_bb_1): Call vect_optimize_slp.
* tree-vect-loop.c (vect_analyze_loop_2): Likewise.
* tree-vect-stmts.c (vectorizable_load): Check whether
the load can be permuted. When generating code assert we can.
* gcc.dg/vect/bb-slp-pr68892.c: Adjust for not supported
SLP permutations becoming builds from scalars.
* gcc.dg/vect/bb-slp-pr78205.c: Likewise.
* gcc.dg/vect/bb-slp-34.c: Likewise.
Two aliased objects must have distinct addresses, even if they have
size zero, so we make sure to allocate at least one byte for them.
* gcc-interface/decl.c (gnat_to_gnu_entity) <E_Variable>: Force at
least the unit size for an aliased object of a constrained nominal
subtype whose size is variable.
The first tweak is to remove the TREE_OVERFLOW flag on INTEGER_CSTs
because it prevents them from being uniquized in LTO mode.
The second, unrelated tweak is to canonicalize the packable types made
by gigi so that at most one per type is present in the GENERIC IL.
* gcc-interface/decl.c (gnat_to_gnu_entity) <E_Array_Subtype>: Deal
with artificial maximally-sized types designed by access types.
* gcc-interface/utils.c (packable_type_hash): New structure.
(packable_type_hasher): Likewise.
(packable_type_hash_table): New hash table.
(init_gnat_utils): Initialize it.
(destroy_gnat_utils): Destroy it.
(packable_type_hasher::equal): New method.
(hash_packable_type): New static function.
(canonicalize_packable_type): Likewise.
(make_packable_type): Make sure not to use too small a type for the
size of the new fields. Canonicalize the type if it is named.
The information was missing in cases the front-end was able to turn
the range comparison into a simple comparison.
* gcc-interface/trans.c (Raise_Error_to_gnu): Always compute a lower
bound and an upper bound for use by the -gnateE switch for range and
comparison operators.
We mark the type of In parameters in Ada with the const qualifier, but
it is stripped by free_lang_data_in_type so do not do it in LTO mode.
* gcc-interface/decl.c (gnat_to_gnu_param): Do not make a variant
of the type in LTO mode.
This fixes an issue with redundant store elimination in FRE/PRE
which, when invoked by the DOM elimination walk, ends up using
possibly stale availability data from the RPO walk. It also
fixes a missed optimization during valueization of addresses
by making sure to use get_addr_base_and_unit_offset_1 which can
valueize and adjusting that to also valueize ARRAY_REFs low-bound.
2020-05-08 Richard Biener <rguenther@suse.de>
* tree-ssa-sccvn.c (rpo_avail): Change type to
eliminate_dom_walker *.
(eliminate_with_rpo_vn): Adjust rpo_avail to make vn_valueize
use the DOM walker availability.
(vn_reference_fold_indirect): Use get_addr_base_and_unit_offset_1
with vn_valueize as valueization callback.
(vn_reference_maybe_forwprop_address): Likewise.
* tree-dfa.c (get_addr_base_and_unit_offset_1): Also valueize
array_ref_low_bound.
* gnat.dg/opt83.adb: New testcase.
We already have x - ((x - y) & -(z < w)) and
x + ((y - x) & -(z < w)) simplifications, this one adds
x ^ ((x ^ y) & -(z < w)) (not merged using for because of the
:c that can be present on bit_xor and can't on minus).
2020-05-08 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/94786
* match.pd (A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A): New
simplification.
* gcc.dg/tree-ssa/pr94786.c: New test.
The following peephole2 changes:
- addl (%rdi), %esi
+ xorl %eax, %eax
+ addl %esi, (%rdi)
setc %al
- movl %esi, (%rdi)
- movzbl %al, %eax
ret
on the testcase. *add<mode>3_cc_overflow_1, being an add{l,q} insn, is
commutative, so if TARGET_READ_MODIFY_WRITE we can replace
addl (%rdi), %esi; movl %esi, (%rdi)
with
addl %esi, (%rdi)
if %esi is dead after those two insns.
2020-05-08 Jakub Jelinek <jakub@redhat.com>
PR target/94857
* config/i386/i386.md (peephole2 after *add<mode>3_cc_overflow_1): New
define_peephole2.
* gcc.target/i386/pr94857.c: New test.
On Thu, May 07, 2020 at 02:45:29PM +0200, Thomas Schwinge wrote:
> >>+ for (tree op = win; TREE_CODE (op) == COMPOUND_EXPR;
>
> ..., and new 'op' variable here.
>
> >>+ op = TREE_OPERAND (op, 1))
> >>+ v.safe_push (op);
> >>+ FOR_EACH_VEC_ELT_REVERSE (v, i, op)
> >>+ ret = build2_loc (EXPR_LOCATION (op), COMPOUND_EXPR,
> >>+ TREE_TYPE (win), TREE_OPERAND (op, 0),
> >>+ ret);
> >>+ return ret;
> >> }
> >> while (TREE_CODE (op) == NOP_EXPR)
> >> {
There is no reason for the shadowing and op at this point acts as a
temporary and will be overwritten in FOR_EACH_VEC_ELT_REVERSE anyway.
So, we can just s/tree // here.
2020-05-08 Jakub Jelinek <jakub@redhat.com>
PR middle-end/94724
* tree.c (get_narrower): Reuse the op temporary instead of
shadowing it.
The following patch canonicalizes M = X >> (prec - 1); (X + M) ^ M
for signed integral types into ABS_EXPR (X). For X == min it is already
UB because M is -1 and min + -1 is UB, so we can use ABS_EXPR rather than
say ABSU_EXPR + cast.
The backend might then emit the abs code back using the shift and addition
and xor if it is the best sequence for the target, but could do something
different that is better.
2020-05-08 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/94783
* match.pd ((X + (X >> (prec - 1))) ^ (X >> (prec - 1)) to abs (X)):
New simplification.
* gcc.dg/tree-ssa/pr94783.c: New test.
The ffs expanders on several targets (x86, ia64, aarch64 at least)
emit a conditional move or similar code to handle the case when the
argument is 0, which makes the code longer.
If we know from VRP that the argument will not be zero, we can (if the
target has also an ctz expander) just use ctz which is undefined at zero
and thus the expander doesn't need to deal with that.
2020-05-08 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/94956
* match.pd (FFS): Optimize __builtin_ffs* of non-zero argument into
__builtin_ctz* + 1 if direct IFN_CTZ is supported.
* gcc.target/i386/pr94956.c: New test.
Implemented thusly. The TYPE_OVERFLOW_WRAPS is there just because the
pattern above it has it too, if you want, I can throw it away from both.
2020-05-08 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/94913
* match.pd (A - B + -1 >= A to B >= A): New simplification.
(A - B > A to A < B): Don't test TYPE_OVERFLOW_WRAPS which is always
true for TYPE_UNSIGNED integral types.
* gcc.dg/tree-ssa/pr94913.c: New test.
My recent combine-stack-adj.c change broke df checking bootstrap,
while most of the changes are done through validate_change/confirm_changes
which update df info, the removal of REG_EQUAL notes didn't update df info.
2020-05-08 Jakub Jelinek <jakub@redhat.com>
PR bootstrap/94961
PR rtl-optimization/94516
* rtl.h (remove_reg_equal_equiv_notes): Add a bool argument defaulted
to false.
* rtlanal.c (remove_reg_equal_equiv_notes): Add no_rescan argument.
Call df_notes_rescan if that argument is not true and returning true.
* combine.c (adjust_for_new_dest): Pass true as second argument to
remove_reg_equal_equiv_notes.
* postreload.c (reload_combine_recognize_pattern): Don't call
df_notes_rescan.
setnbc[r] is like setbc[r], but it writes -1 instead of 1 to the GPR.
2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/rs6000.md (*setnbc_<un>signed_<GPR:mode>): New
define_insn.
(*setnbcr_<un>signed_<GPR:mode>): New define_insn.
(*neg_eq_<mode>): Avoid for TARGET_FUTURE; add missing && 1.
(*neg_ne_<mode>): Likewise.
New instructions setbc and setbcr. setbc sets a GPR to 1 if some
condition register bit is set, and 0 otherwise; setbcr does it the
other way around.
2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/rs6000.md (setbc_<un>signed_<GPR:mode>): New
define_insn.
(*setbcr_<un>signed_<GPR:mode>): Likewise.
(cstore<mode>4): Use setbc[r] if available.
(<code><GPR:mode><GPR2:mode>2_isel): Avoid for TARGET_FUTURE.
(eq<mode>3): Use setbc for TARGET_FUTURE.
(*eq<mode>3): Avoid for TARGET_FUTURE.
(ne<mode>3): Replace :P with :GPR; use setbc for TARGET_FUTURE;
else for non-Pmode, use gen_eq and gen_xor.
(*ne<mode>3): Avoid for TARGET_FUTURE.
(*eqsi3_ext<mode>): Avoid for TARGET_FUTURE; fix missing && 1.
* config/h8300/h8300.md: Move expanders and patterns into
files based on functionality.
* config/h8300/addsub.md: New file.
* config/h8300/bitfield.md: New file
* config/h8300/combiner.md: New file
* config/h8300/divmod.md: New file
* config/h8300/extensions.md: New file
* config/h8300/jumpcall.md: New file
* config/h8300/logical.md: New file
* config/h8300/movepush.md: New file
* config/h8300/multiply.md: New file
* config/h8300/other.md: New file
* config/h8300/proepi.md: New file
* config/h8300/shiftrotate.md: New file
* config/h8300/testcompare.md: New file
commit da1de1d91088ac506c1bed0fba9b0f04c5b8c876
* config/h8300/h8300.md (adds/subs splitters): Merge into single
splitter.
(negation expanders and patterns): Simplify and combine using
iterators.
(one_cmpl expanders and patterns): Likewise.
(tablejump, indirect_jump patterns ): Likewise.
(shift and rotate expanders and patterns): Likewise.
(absolute value expander and pattern): Drop expander, rename pattern
to just "abssf2"
(peephole2 patterns): Move into...
* config/h8300/peepholes.md: New file.
Some new algorithms need to use _GLIBCXX_STD_A to refer to the "normal"
version of the algorithm, to workaround the namespace dance done for
parallel mode.
PR libstdc++/94971 (partial)
* include/bits/ranges_algo.h (ranges::__sample_fn): Qualify
std::sample using macro to work in parallel mode.
(__sort_fn): Likewise for std::sort.
(ranges::__nth_element_fn): Likewise for std::nth_element.
* include/bits/stl_algobase.h (lexicographical_compare_three_way):
Likewise for std::__min_cmp.
* include/parallel/algobase.h (lexicographical_compare_three_way):
Add to namespace std::__parallel.
This is a correct fix for the incorrect cppcheck suggestion to make
these parameters const. In order to that, the dereference operators need
to be const. The conversions to the underlying iterator can be const
too.
PR c/92472
* include/parallel/multiway_merge.h (_GuardedIterator::operator*)
(_GuardedIterator::operator _RAIter, _UnguardedIterator::operator*)
(_UnguardedIterator::operator _RAIter): Add const qualifier.
(operator<(_GuardedIterator&, _GuardedIterator&)
(operator<=(_GuardedIterator&, _GuardedIterator&)
(operator<(_UnguardedIterator&, _UnguardedIterator&)
(operator<=(_UnguardedIterator&, _UnguardedIterator&): Change
parameters to const references.
When we have completely missing key information (e.g. the
coroutine_traits) or a partially transformed function body, we
need to try and balance returning useful information about
failures with the possibility that some part of the diagnostics
machinery or following code will not be able to handle the
state.
The PRs (and revised testcase) point to cases where that processing
has failed.
This revises the process to avoid special handling for the
ramp, and falls back on the same code used for regular function
fails.
There are test-cases (in addition to the ones for the PRs) that now
cover all early exit points [where the transforms are considered
to have failed in a manner that does not allow compilation to
continue].
gcc/cp/ChangeLog:
2020-05-07 Iain Sandoe <iain@sandoe.co.uk>
PR c++/94817
PR c++/94829
* coroutines.cc (morph_fn_to_coro): Set unformed outline
functions to error_mark_node. For early error returns suppress
warnings about missing ramp return values. Fix reinstatement
of the function body on pre-existing initial error.
* decl.c (finish_function): Use the normal error path for fails
in the ramp function, do not try to compile the helpers if the
transform fails.
gcc/testsuite/ChangeLog:
2020-05-07 Iain Sandoe <iain@sandoe.co.uk>
PR c++/94817
PR c++/94829
* g++.dg/coroutines/coro-missing-final-suspend.C: New test.
* g++.dg/coroutines/coro-missing-initial-suspend.C: New test.
* g++.dg/coroutines/coro-missing-promise-yield.C: Check for
continuation of compilation.
* g++.dg/coroutines/coro-missing-promise.C: Likewise.
* g++.dg/coroutines/coro-missing-ret-value.C: Likewise
* g++.dg/coroutines/coro-missing-ret-void.C: Likewise
* g++.dg/coroutines/coro-missing-ueh-3.C: Likewise
* g++.dg/coroutines/pr94817.C: New test.
* g++.dg/coroutines/pr94829.C: New test.
This PR points out that we don't detect long double -> double narrowing
when long double happens to have the same precision as double; on x86_64
this can be achieved by -mlong-double-64.
[dcl.init.list]#7.2 specifically says "from long double to double or float,
or from double to float", but check_narrowing only checks
TYPE_PRECISION (type) < TYPE_PRECISION (ftype)
so we need to handle the other cases too, e.g. by same_type_p as in
the following patch.
PR c++/94590 - Detect long double -> double narrowing.
* typeck2.c (check_narrowing): Detect long double -> double
narrowing even when double and long double have the same
precision. Make it handle conversions to float too.
* g++.dg/cpp0x/Wnarrowing18.C: New test.
This is an ICE on invalid, because we're specializing S::foo in the
wrong namespace. cp_parser_class_specifier_1 parses S::foo in M
and then it tries to push the nested-name-specifier of foo, which is
S. By that, we're breaking the assumption of push_inner_scope that
the pushed scope must be a scope nested inside current scope: current
scope is M, but the namespace context of S is N, and N is not nested
in M, so we fell into an infinite loop in push_inner_scope_r.
(cp_parser_class_head called check_specialization_namespace which already
gave a permerror.)
PR c++/94255
* parser.c (cp_parser_class_specifier_1): Check that the scope is
nested inside current scope before pushing it.
* g++.dg/template/spec41.C: New test.
* tree-ssa-operands.c (operands_scanner): New class.
(operands_bitmap_obstack): Remove.
(n_initialized): Remove.
(build_uses): Move to operands_scanner class.
(build_vuse): Same as above.
(build_vdef): Same as above.
(verify_ssa_operands): Same as above.
(finalize_ssa_uses): Same as above.
(cleanup_build_arrays): Same as above.
(finalize_ssa_stmt_operands): Same as above.
(start_ssa_stmt_operands): Same as above.
(append_use): Same as above.
(append_vdef): Same as above.
(add_virtual_operand): Same as above.
(add_stmt_operand): Same as above.
(get_mem_ref_operands): Same as above.
(get_tmr_operands): Same as above.
(maybe_add_call_vops): Same as above.
(get_asm_stmt_operands): Same as above.
(get_expr_operands): Same as above.
(parse_ssa_operands): Same as above.
(finalize_ssa_defs): Same as above.
(build_ssa_operands): Same as above, plus create a C-like wrapper.
(update_stmt_operands): Create an instance of operands_scanner.
