2017-01-27 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
PR target/79170
* gcc.dg/memcmp-1.c: Improved to catch failures seen in PR 79170.
2017-01-27 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
PR target/79170
* config/rs6000/altivec.md (*setb_internal): Rename to setb_signed.
(setb_unsigned) New pattern for setb with CCUNS.
* config/rs6000/rs6000.c (expand_block_compare): Use a different
subfc./subfe sequence to avoid overflow problems. Generate a
shorter sequence with cmpld/setb for power9.
* config/rs6000/rs6000.md (subf<mode>3_carry_dot2): Add a new pattern
for generating subfc. instruction.
(cmpstrsi): Add TARGET_POPCNTD predicate as the generate sequence
now uses this instruction.
From-SVN: r245041
{committed for rearnsha}
It turns out that because the compiler uses a hash table to save the
cl_target_option structures it is unsafe to modify the result of
build_target_option_node() (doing so will cause the hash lookup to
fail). This PR was due to not properly understanding this limitation.
The fix is to create temporary copies of the cl_target_option nodes for
use during target option processing and then only creating the tree node
once the options have been suitably modified.
gcc:
PR target/79239
* arm.c (arm_option_override): Don't call build_target_option_node
until after doing all option overrides.
(arm_valid_target_attribute_tree): Likewise.
gcc/testsuite:
* gcc.target/arm/pr79239.c: New test.
From-SVN: r244965
The attached patch reactivates the setmem_long_and* patterns on S/390
that have not been generated for a while.
gcc/ChangeLog:
2017-01-27 Dominik Vogt <vogt@linux.vnet.ibm.com>
* config/s390/s390.md ("*setmem_long_and")
("*setmem_long_and_31z"): Use zero_extend instead of and.
gcc/testsuite/ChangeLog:
2017-01-27 Dominik Vogt <vogt@linux.vnet.ibm.com>
* gcc.target/s390/md/setmem_long-1.c: Remove xfail, skip with -O0.
From-SVN: r244963
gcc/ChangeLog:
2017-01-26 Carl Love <cel@us.ibm.com>
* config/rs6000/rs6000-c (altivec_overloaded_builtins): Remove
bogus entries for the P8V_BUILTIN_VEC_VGBBD built-ins
From-SVN: r244943
contrib/
* update-copyright.py: Add libhsail-rt to self.default_dirs
and call self.add_dir on it. Add Intel Corporation to external
authors.
gcc/
* brig-builtins.def: Update copyright years.
* config/arm/arm_acle_builtins.def: Update copyright years.
gcc/brig/
Update copyright years.
gcc/testsuite/
* brig.dg/dg.exp: Update copyright years.
* lib/brig-dg.exp: Update copyright years.
* lib/brig.exp: Update copyright years.
libhsail-rt/
Update copyright years.
libstdc++-v3/
* libsupc++/eh_atomics.h: Update copyright years.
* testsuite/20_util/unique_ptr/cons/default.cc: Update copyright years.
From-SVN: r244919
[gcc]
2017-01-25 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/79179
* config/rs6000/vsx.md (vsx_extract_<mode>_store): Use wY
constraint instead of o for the stxsd instruction.
[gcc/testsuite]
2017-01-25 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/79179
* gcc.target/powerpc/pr79179.c: New test.
From-SVN: r244917
gcc/ChangeLog:
2017-01-25 Carl Love <cel@us.ibm.com>
* config/rs6000/rs6000-c (altivec_overloaded_builtins): Fix order
of entries for ALTIVEC_BUILTIN_VEC_PACKS and P8V_BUILTIN_VEC_VGBBD.
gcc/testsuite/ChangeLog:
2017-01-25 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/builtins-3-p8.c: Add missing tests for the
vec_packs built-ins
From-SVN: r244904
PR target/79145
* config/arm/arm.md (xordi3): Force constant operand into a register
for TARGET_IWMMXT.
* gcc.target/arm/pr79145.c: New test.
From-SVN: r244894
gcc/testsuite/ChangeLog:
2017-01-23 Kelvin Nilsen <kelvin@gcc.gnu.org>
* gcc.target/powerpc/bfp/scalar-insert-exp-3.c: New test.
* gcc.target/powerpc/bfp/scalar-insert-exp-4.c: New test.
* gcc.target/powerpc/bfp/scalar-insert-exp-5.c: New test.
* gcc.target/powerpc/bfp/scalar-test-data-class-0.c: Adjust return
type of test function to reflect change in built-in function's
return type.
* gcc.target/powerpc/bfp/scalar-test-data-class-1.c: Likewise.
* gcc.target/powerpc/bfp/scalar-test-data-class-2.c: Likewise.
* gcc.target/powerpc/bfp/scalar-test-data-class-3.c: Likewise.
* gcc.target/powerpc/bfp/scalar-test-data-class-4.c: Adjust return
type and second argument type to reflect change in built-in
function's type signature.
* gcc.target/powerpc/bfp/scalar-test-data-class-5.c: Likewise.
* gcc.target/powerpc/bfp/scalar-test-data-class-6.c: Adjust return
type of test function to reflect change in built-in function's
return type.
* gcc.target/powerpc/bfp/scalar-test-data-class-7.c: Likewise.
* gcc.target/powerpc/bfp/scalar-test-neg-0.c: Likewise.
* gcc.target/powerpc/bfp/scalar-test-neg-1.c: Likewise.
* gcc.target/powerpc/bfp/scalar-test-neg-2.c: Likewise.
* gcc.target/powerpc/bfp/scalar-test-neg-3.c: Likewise.
* gcc.target/powerpc/bfp/vec-extract-exp-0.c: Likewise.
* gcc.target/powerpc/bfp/vec-extract-exp-1.c: Likewise.
* gcc.target/powerpc/bfp/vec-extract-exp-2.c: Likewise.
* gcc.target/powerpc/bfp/vec-extract-exp-3.c: Likewise.
* gcc.target/powerpc/bfp/vec-extract-sig-0.c: Likewise.
* gcc.target/powerpc/bfp/vec-extract-sig-1.c: Likewise.
* gcc.target/powerpc/bfp/vec-extract-sig-2.c: Likewise.
* gcc.target/powerpc/bfp/vec-extract-sig-3.c: Likewise.
* gcc.target/powerpc/bfp/vec-insert-exp-4.c: New test.
* gcc.target/powerpc/bfp/vec-insert-exp-5.c: New test.
* gcc.target/powerpc/bfp/vec-insert-exp-6.c: New test.
* gcc.target/powerpc/bfp/vec-insert-exp-7.c: New test.
* gcc.target/powerpc/bfp/vec-test-data-class-0.c: Adjust return
type of test function to reflect change in built-in function's
return type.
* gcc.target/powerpc/bfp/vec-test-data-class-1.c: Likewise.
* gcc.target/powerpc/bfp/vec-test-data-class-2.c: Likewise.
* gcc.target/powerpc/bfp/vec-test-data-class-3.c: Likewise.
* gcc.target/powerpc/bfp/vec-test-data-class-4.c: Likewise.
* gcc.target/powerpc/bfp/vec-test-data-class-5.c: Likewise.
* gcc.target/powerpc/bfp/vec-test-data-class-6.c: Adjust types of
test function's result and second argument to reflect change in
built-in function's type signature.
* gcc.target/powerpc/bfp/vec-test-data-class-7.c: Likewise.
gcc/ChangeLog:
2017-01-23 Kelvin Nilsen <kelvin@gcc.gnu.org>
* config/rs6000/rs6000-builtin.def (VSIEDPF): Add scalar insert
exponent support with double type for first argument.
* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Changed
type returned by __builtin_vec_extract_sig,
__builtin_vec_extract_sig_sp, and __builtin_vec_extract_sig_dp
functions from "vector int" to "vector unsigned int" or from
"vector long long int" to "vector unsigned long long int".
Changed type returned by __builtin_vec_extract_exp,
__builtin_vec_extract_exp_sp, and __builtin_vec_extract_exp_dp
functions from "vector int" to "vector unsigned int" or from
"vector long long int" to "vector unsigned long long int".
Changed return type of __builtin_vec_test_data_class,
__builtin_vec_test_data_class_sp, and
__builtin_vec_test_data_class_dp from "vector int" to
"vector bool int" or from "vector long long int" to "vector bool
long long int" and changed second argument type from "unsigned
int" to "int". Added new overloaded function forms "vector float
__builtin_vec_insert_exp (vector float, vector unsigned int)" and
"vector float __builtin_vec_insert_exp_sp (vector float, vector
unsigned int)" and "vector double __builtin_vec_insert_exp (vector
double, vector unsigned long long int)" and "vector double
__builtin_vec_insert_exp_dp (vector double, vector unsigned long
long int)". Changed return type of
__builtin_scalar_test_data_class and
__builtin_scalar_test_data_class_sp and
__builtin_scalar_test_data_class_dp from "unsigned int" to "bool
int" and changed second argument from "unsigned int" to "int".
Changed type returned by __builtin_scalar_test_neg,
__builtin_scalar_test_neg_sp, and __builtin_scalar_test_neg_dp
from "int" to "bool int". Added new overloaded function form
"double __builtin_scalar_insert_exp (double, unsigned long long int)".
* config/rs6000/vsx.md (xsiexpdpf): New insn for scalar insert
exponent double-precision with floating point first argument.
* doc/extend.texi (PowerPC AltiVec Built-in Functions): Adjust
documentation of scalar_test_data_class, scalar_test_neg,
scalar_extract_sig, scalar_extract_exp, scalar_insert_exp,
vector_extract_exp, vec_extract_sig, vec_insert_exp, and
vec_test_data_class built-in functions to reflect refinements in
their type signatures.
From-SVN: r244834
The varargs code for SVR4 puts all (integer) arguments in 4-byte slots.
When it then reads an item from there as something not a multiple of 4
bytes, it needs to adjust the address if big endian. We didn't yet do
that.
This fixes the g++.dg/abi/scoped1.C, gcc.dg/compat/scalar-by-value-4,
and gcc.dg/compat/scalar-return-4 testcases.
PR target/61729
PR target/77850
* config/rs6000/rs6000.c (rs6000_gimplify_va_arg): Adjust address to
read from, for big endian.
From-SVN: r244740
PR target/71270
* config/arm/arm.c (neon_valid_immediate): Reject vector constants
in big-endian mode when they are not a single duplicated value.
From-SVN: r244716
I foolishly tested this with r241087 reverted. After that revision
default_stack_protect_guard is no longer called if the compiler defaults
to using the TLS guard, which of course is the wrong thing to do if
there is some other way to enable the global guard.
This fixes it.
PR target/78875
PR target/79140
* config/rs6000/rs6000.c (TARGET_STACK_PROTECT_GUARD): Unconditionally
define to rs6000_init_stack_protect_guard.
(rs6000_init_stack_protect_guard): New function.
From-SVN: r244677
gcc/
* config/aarch64/aarch64-opts.h (aarch64_function_type): New enum.
* config/aarch64/aarch64-protos.h
(aarch64_return_address_signing_enabled): New declaration.
* config/aarch64/aarch64.c (aarch64_return_address_signing_enabled):
New function.
(aarch64_expand_prologue): Sign return address before it's pushed onto
stack.
(aarch64_expand_epilogue): Authenticate return address fetched from
stack.
(aarch64_override_options): Sanity check for ILP32 and ISA level.
(aarch64_attributes): New function attributes for "sign-return-address".
* config/aarch64/aarch64.md (UNSPEC_AUTI1716, UNSPEC_AUTISP,
UNSPEC_PACI1716, UNSPEC_PACISP, UNSPEC_XPACLRI): New unspecs.
("*do_return"): Generate combined instructions according to key index.
("<pauth_mnem_prefix>sp", "<pauth_mnem_prefix1716", "xpaclri"): New.
* config/aarch64/iterators.md (PAUTH_LR_SP, PAUTH_17_16): New integer
iterators.
(pauth_mnem_prefix, pauth_hint_num_a): New integer attributes.
* config/aarch64/aarch64.opt (msign-return-address=): New.
* doc/extend.texi (AArch64 Function Attributes): Documents
"sign-return-address=".
* doc/invoke.texi (AArch64 Options): Documents "-msign-return-address=".
gcc/testsuite/
* gcc.target/aarch64/return_address_sign_1.c: New testcase for no
combined instructions.
* gcc.target/aarch64/return_address_sign_2.c: New testcase for combined
instructions.
* gcc.target/aarch64/return_address_sign_3.c: New testcase for disable
of pointer authentication.
From-SVN: r244666
[gcc]
2017-01-19 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Enable
-mpower9-minmax by default for -mcpu=power9.
(ISA_3_MASKS_IEEE): Require -mvsx-small-integer to enable IEEE
128-bit floating point.
[gcc/testsuite]
2017-01-19 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/float128-hw.c: Do not require IEEE 128-bit
floating point hardware to run test.
From-SVN: r244662
glibc compiled with current gcc-7 fails one test due to strcmp and
strncmp appearing in the PLT. This is because the inline expansion of
those functions falls back to a function call, but doesn't use the asm
name for the call.
PR target/79144
* config/rs6000/rs6000.c (expand_strn_compare): Get the asm name
for strcmp and strncmp from corresponding builtin decl.
From-SVN: r244659
2017-01-18 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
* config/rs6000/rs6000-protos.h (expand_strn_compare): Add arg.
* config/rs6000/rs6000.c (expand_strn_compare): Add ability to expand
strcmp. Fix bug where comparison didn't stop with zero byte. Fix
case where N arg is SIZE_MAX.
* config/rs6000/rs6000.md (cmpstrnsi): Args to expand_strn_compare.
(cmpstrsi): Add pattern.
2017-01-18 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
* gcc.dg/strcmp-1.c: New test.
* gcc.dg/strncmp-1.c: Add test for a bug that escaped.
From-SVN: r244598
SHA1H instructions may be scheduled after a SHA1C instruction
that uses the same input register. However SHA1C updates its input,
so if SHA1H is scheduled after it, it requires an extra move.
Increase the priority of SHA1H to ensure it gets scheduled
earlier, avoiding the move.
gcc/
* config/aarch64/aarch64.c (aarch64_sched_adjust_priority)
New function.
(TARGET_SCHED_ADJUST_PRIORITY): Define target hook.
From-SVN: r244586
[gcc]
2016-01-18 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/altivec.h (vec_bperm): Change #define.
* config/rs6000/altivec.md (UNSPEC_VBPERMD): New enum constant.
(altivec_vbpermq2): New define_insn.
(altivec_vbpermd): Likewise.
* config/rs6000/rs6000-builtin.def (VBPERMQ2): New monomorphic
function interface.
(VBPERMD): Likewise.
(VBPERM): New polymorphic function interface.
* config/rs6000/r6000-c.c (altivec_overloaded_builtins_table):
Add entries for P9V_BUILTIN_VEC_VBPERM.
* doc/extend.texi: Add interfaces for vec_bperm.
[gcc/testsuite]
2016-01-18 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/p8vector-builtin-8.c: Add new form for
vec_bperm.
* gcc.target/powerpc/p9-vbpermd.c: New file.
From-SVN: r244578