Commit Graph

158066 Commits

Author SHA1 Message Date
Thomas Koenig
852f7e6f4a re PR fortran/83224 (creating character array from elements shorter than declared does not pad with whitespace properly and aborts)
2017-12-01  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/83224
	* frontend-passes.c (realloc_string_callback): Handle
	case for which the RHS is an array expression.

2017-12-01  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/83224
	* gfortran.dg/dependency_50.f90: New test.

From-SVN: r255294
2017-12-01 07:35:50 +00:00
Sergey Shalnov
663c725aa2 Fix movdi_internal to return MODE_TI with AVX512
gcc/
	* config/i386/i386.md: Fix AVX512 register width in AVX512 instruction.

From-SVN: r255293
2017-12-01 06:40:27 +00:00
Kirill Yukhin
bddb9bb1c7 Replace __popcntq with two _popcnt32.
gcc/testsuite/
	* gcc.target/i386/avx512f-vpcompressb-2.c: Fix popcnt for 64b case.

From-SVN: r255292
2017-12-01 06:25:26 +00:00
Sergey Shalnov
1d1e69e934 Fix wrong instruction vpcmpeqd generation
gcc/
	* config/i386/i386.c (standard_sse_constant_opcode): Fix wrong form for
	vpcmpeqd instruction.

From-SVN: r255291
2017-12-01 06:22:06 +00:00
Sergey Shalnov
b7f47ecdde Fix registers type for MODE_TI
gcc/
	* config/i386/i386.c (standard_sse_constant_opcode): Fix
	registers type for 128bit mode.

From-SVN: r255290
2017-12-01 05:59:33 +00:00
Michael Meissner
6ae3512c0e _mulkc3.c (__mulkc3): Add forward declaration.
2017-11-30  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/_mulkc3.c (__mulkc3): Add forward declaration.
	* config/rs6000/_divkc3.c (__divkc3): Likewise.

From-SVN: r255289
2017-12-01 05:32:39 +00:00
GCC Administrator
5a1f4e57b6 Daily bump.
From-SVN: r255288
2017-12-01 00:16:19 +00:00
Jakub Jelinek
cc6534d401 re PR c/83222 (Inconsistent "initializer element is not constant" error)
PR c/83222
	* c-tree.h (decl_constant_value_1): Declare.
	* c-typeck.c (decl_constant_value_1): New function.
	(decl_constant_value): Use it.
	* c-fold.c (c_fully_fold_internal): If in_init, use
	decl_constant_value_1 instead of decl_constant_value.

	* gcc.c-torture/compile/pr83222.c: New test.

From-SVN: r255285
2017-12-01 00:43:10 +01:00
Jakub Jelinek
5de73c050e spellcheck-tree.c (test_find_closest_identifier): Use ; instead of ;;.
* spellcheck-tree.c (test_find_closest_identifier): Use ; instead
	of ;;.
	* gengtype-state.c (read_state_pair): Likewise.
	* gimple-fold.c (gimple_fold_builtin_string_compare): Likewise.
	* sel-sched-dump.c (dump_insn_rtx_1): Likewise.
	* ipa-cp.c (intersect_aggregates_with_edge): Likewise.
	* ifcvt.c (noce_try_store_flag_constants): Likewise.
	* tree-ssa-ccp.c (ccp_finalize): Likewise.
	* omp-grid.c (grid_process_kernel_body_copy): Likewise.
	* builtins.c (fold_builtin_3): Likewise.
	* graphite-scop-detection.c
	(scop_detection::stmt_has_simple_data_refs_p): Likewise.
	* hsa-gen.c (hsa_function_representation::hsa_function_representation):
	Likewise.
c/
	* c-parser.c (c_parser_postfix_expression): Use ; instead of ;;.
jit/
	* jit-recording.c
	(recording::memento_of_new_rvalue_from_const <long>::write_reproducer):
	Use ; instead of ;;.
lto/
	* lto.c (create_subid_section_table): Use ; instead of ;;.
objc/
	* objc-next-runtime-abi-01.c (generate_dispatch_table): Use ; instead
	of ;;.

From-SVN: r255284
2017-11-30 23:47:51 +01:00
Maxim Ostapenko
1069dc251b re PR sanitizer/81697 (Incorrect ASan global variables alignment on arm)
gcc/

2017-11-30  Maxim Ostapenko  <m.ostapenko@samsung.com>

	PR sanitizer/81697
	* asan.c (asan_protect_global): Add new ignore_decl_rtl_set_p
	parameter. Return true if ignore_decl_rtl_set_p is true and other
	conditions are satisfied.
	* asan.h (asan_protect_global): Add new parameter.
	* varasm.c (categorize_decl_for_section): Pass true as second parameter
	to asan_protect_global calls.

gcc/testsuite/

2017-11-30  Maxim Ostapenko  <m.ostapenko@samsung.com>

	PR sanitizer/81697
	* c-c++-common/asan/pr81697.c: New test.

From-SVN: r255283
2017-11-30 23:38:16 +02:00
Michael Meissner
75ad35b5c4 re PR libgcc/83112 (Silence warnings from PowerPC libgcc float128-ifunc.c compilation)
2017-11-30  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR libgcc/83112
	* config/rs6000/float128-ifunc.c (__addkf3_resolve): Use the
	correct type for all ifunc resolvers to silence -Wattribute-alias
	warnings.  Eliminate the forward declaration of the resolver
	functions which is no longer needed.
	(__subkf3_resolve): Likewise.
	(__mulkf3_resolve): Likewise.
	(__divkf3_resolve): Likewise.
	(__negkf2_resolve): Likewise.
	(__eqkf2_resolve): Likewise.
	(__nekf2_resolve): Likewise.
	(__gekf2_resolve): Likewise.
	(__gtkf2_resolve): Likewise.
	(__lekf2_resolve): Likewise.
	(__ltkf2_resolve): Likewise.
	(__unordkf2_resolve): Likewise.
	(__extendsfkf2_resolve): Likewise.
	(__extenddfkf2_resolve): Likewise.
	(__trunckfsf2_resolve): Likewise.
	(__trunckfdf2_resolve): Likewise.
	(__fixkfsi_resolve): Likewise.
	(__fixkfdi_resolve): Likewise.
	(__fixunskfsi_resolve): Likewise.
	(__fixunskfdi_resolve): Likewise.
	(__floatsikf_resolve): Likewise.
	(__floatdikf_resolve): Likewise.
	(__floatunsikf_resolve): Likewise.
	(__floatundikf_resolve): Likewise.
	(__extendkftf2_resolve): Likewise.
	(__trunctfkf2_resolve): Likewise.

	PR libgcc/83103
	* config/rs6000/quad-float128.h (TF): Don't define if long double
	is IEEE 128-bit floating point.
	(TCtype): Define as either TCmode or KCmode, depending on whether
	long double is IEEE 128-bit floating point.
	(__mulkc3_sw): Add declarations for software/hardware versions of
	complex multiply/divide.
	(__divkc3_sw): Likewise.
	(__mulkc3_hw): Likewise.
	(__divkc3_hw): Likewise.
	* config/rs6000/_mulkc3.c (_mulkc3): If we are building ifunc
	handlers to switch between using software emulation and hardware
	float128 instructions, build the complex multiply/divide functions
	for both software and hardware support.
	* config/rs6000/_divkc3.c (_divkc3): Likewise.
	* config/rs6000/float128-ifunc.c (__mulkc3_resolve): Likewise.
	(__divkc3_resolve): Likewise.
	(__mulkc3): Likewise.
	(__divkc3): Likewise.
	* config/rs6000/t-float128-hw (fp128_hardfp_src): Likewise.
	(fp128_hw_src): Likewise.
	(fp128_hw_static_obj): Likewise.
	(fp128_hw_shared_obj): Likewise.
	(_mulkc3-hw.c): Create _mulkc3-hw.c and _divkc3-hw.c from
	_mulkc3.c and _divkc3.c, changing the function name.
	(_divkc3-hw.c): Likewise.
	* config/rs6000/t-float128 (clean-float128): Delete _mulkc3-hw.c
	and _divkc3-hw.c.

From-SVN: r255282
2017-11-30 20:52:27 +00:00
Jim Wilson
fb0e72c8c0 Cleanup riscv option docs.
gcc/
	* doc/invoke.texi (RISC-V Options): Delete nonexistent -mmemcpy and
	-mno-memcpy options.  For -mplt, -mfdiv, -mdiv, -msave-restore, and
	-mstrict-align, add info on default value.  Delete redundant lines for
	-mabi.  Add missing -mexplicit-relocs docs.

From-SVN: r255280
2017-11-30 10:03:46 -08:00
Jason Merrill
2d11897a77 PR c++/82219 - bogus -Wignored-qualifiers with template
* pt.c (tsubst_copy_and_build) [STATIC_CAST_EXPR]: Suppress
	-Wignored-qualifiers.

From-SVN: r255279
2017-11-30 12:43:08 -05:00
Jonathan Wakely
d44e1abee5 PR libstdc++/65927 Fix -Wunused-but-set-parameter warning
PR libstdc++/65927
	* include/bits/locale_facets_nonio.h (__timepunct::_M_am_pm_format):
	Remove statement with no effect.

From-SVN: r255278
2017-11-30 17:29:08 +00:00
Glen Joseph Fernandes
6b590c7a64 Move assertion from to_address to __to_address
2017-11-30  Glen Joseph Fernandes  <glenjofe@gmail.com>

	* include/bits/ptr_traits.h (__to_address, to_address): Move static
	assertion.
	* testsuite/20_util/to_address/1_neg.cc: New test.

From-SVN: r255277
2017-11-30 15:07:21 +00:00
Claudiu Zissulescu
f521d500fc [ARC] Add trap instruction.
2017-11-07  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.md (trap): New pattern.

From-SVN: r255276
2017-11-30 15:42:22 +01:00
Claudiu Zissulescu
a09202439b [ARC] Don't allow the last ZOL insn to be in a delay slot.
The ARC ZOL implementation doesn't allow the last instruction to be a
control instruction or part of a delay slot.  Thus, we add a note to
the last ZOL instruction which will prevent it to finish into a delay
slot.

2017-10-20  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.c (hwloop_optimize): Prevent the last
        ZOL instruction to end into a delay slot.
	* config/arc/arc.md (cond_delay_insn): Check if the instruction
	can be placed into a delay slot against reg_note.
	(in_delay_slot): Likewise.

testsuite/
2017-10-20  Claudiu Zissulescu  <claziss@synopsys.com>

	* gcc.target/arc/loop-3.c: New test.
	* gcc.target/arc/loop-4.c: Likewise.

[FIX][ZOL] fix checking for jumps

From-SVN: r255275
2017-11-30 15:42:12 +01:00
Claudiu Zissulescu
5d4c34aaad [ARC] Update uses for hw-loop labels.
Make sure we mark the hw-loop labels as beeing used.

gcc/
2017-09-19  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.c (hwloop_optimize): Update hw-loop's end/start
	labels number of usages.

gcc/testsuite
2017-09-19  Claudiu Zissulescu  <claziss@synopsys.com>

	* gcc.target/arc/loop-2.cpp: New test.

From-SVN: r255274
2017-11-30 15:42:01 +01:00
Claudiu Zissulescu
31e72f4f37 [ARC] Use TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV.
Sometimes the memory equivalent is not valid due to a large offset.
For example replacing the ap register with its fp/sp-equivalent during
LRA step. To solve this we introduced TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV.

gcc/
2017-08-08  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.c (arc_cannot_substitute_mem_equiv_p): New function.
	(TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.

gcc/testsuite
2017-08-08  Claudiu Zissulescu  <claziss@synopsys.com>

	* gcc.target/arc/lra-1.c: New test.

From-SVN: r255273
2017-11-30 15:41:49 +01:00
Will Schmidt
e47b37ca82 fold-vec-abs-char-fwrapv.c: Add xxspltib insn to expected output.
[testsuite]

2017-11-29  Will Schmidt  <will_schmidt@vnet.ibm.com>

	* gcc.target/powerpc/fold-vec-abs-char-fwrapv.c: Add xxspltib insn
	to expected output.
	* gcc.target/powerpc/fold-vec-abs-char.c: Add xxspltib insn
	to expected output.

From-SVN: r255272
2017-11-30 14:38:33 +00:00
Jonathan Wakely
5f939178ec PR libstdc++/83226 avoid forming pointer-to-reference type
PR libstdc++/83226
	* include/bits/node_handle.h (_Node_handle::__pointer): Avoid forming
	pointer-to-reference types.
	* testsuite/23_containers/map/modifiers/insert/83226.cc: New test.

From-SVN: r255271
2017-11-30 13:45:37 +00:00
Julia Koval
b0da403432 Remove inv_list.
gcc/c-family/
	* c-common.h (inv_list): Remove.

From-SVN: r255270
2017-11-30 13:17:16 +01:00
Jakub Jelinek
89b1427f86 re PR target/83210 (__builtin_mul_overflow() generates suboptimal code when exactly one argument is the constant 2)
PR target/83210
	* internal-fn.c (expand_mul_overflow): Optimize unsigned
	multiplication by power of 2 constant into two shifts + comparison.

	* gcc.target/i386/pr83210.c: New test.

From-SVN: r255269
2017-11-30 11:29:58 +01:00
Jan Hubicka
7c080ade9d re PR target/81616 (Update -mtune=generic for the current Intel and AMD processors)
PR target/81616
	* x86-tnue-costs.h (generic_cost): Revise for modern CPUs
	* gcc.target/i386/l_fma_double_1.c: Update count of fma instructions.
	* gcc.target/i386/l_fma_double_2.c: Update count of fma instructions.
	* gcc.target/i386/l_fma_double_3.c: Update count of fma instructions.
	* gcc.target/i386/l_fma_double_4.c: Update count of fma instructions.
	* gcc.target/i386/l_fma_double_5.c: Update count of fma instructions.
	* gcc.target/i386/l_fma_double_6.c: Update count of fma instructions.
	* gcc.target/i386/l_fma_float_1.c: Update count of fma instructions.
	* gcc.target/i386/l_fma_float_2.c: Update count of fma instructions.
	* gcc.target/i386/l_fma_float_3.c: Update count of fma instructions.
	* gcc.target/i386/l_fma_float_4.c: Update count of fma instructions.
	* gcc.target/i386/l_fma_float_5.c: Update count of fma instructions.
	* gcc.target/i386/l_fma_float_6.c: Update count of fma instructions.

From-SVN: r255268
2017-11-30 09:36:36 +00:00
Richard Biener
a52206ae28 re PR tree-optimization/83202 (Try joining operations on consecutive array elements during tree vectorization)
2017-11-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/83202
	* tree-ssa-loop-ivcanon.c (try_unroll_loop_completely): Add
	allow_peel argument and guard peeling.
	(canonicalize_loop_induction_variables): Likewise.
	(canonicalize_induction_variables): Pass false.
	(tree_unroll_loops_completely_1): Pass unroll_outer to disallow
	peeling from cunrolli.

	* gcc.dg/vect/pr83202-1.c: New testcase.
	* gcc.dg/tree-ssa/pr61743-1.c: Adjust.

From-SVN: r255267
2017-11-30 07:53:31 +00:00
Ian Lance Taylor
222353edef compiler: don't make map zero value constant
The map zero value is a common symbol, and it doesn't really make
    sense to have a constant common symbol. Current GCC has started to
    reject this case, probably as part of the fix for PR 83100.
    
    Reviewed-on: https://go-review.googlesource.com/80877

From-SVN: r255266
2017-11-30 05:03:29 +00:00
John David Anglin
3be30be2c3 baseline_symbols.txt: Update.
* config/abi/post/hppa-linux-gnu/baseline_symbols.txt: Update.

From-SVN: r255265
2017-11-30 00:53:16 +00:00
GCC Administrator
bd881a003d Daily bump.
From-SVN: r255264
2017-11-30 00:16:18 +00:00
Segher Boessenkool
3d985316b8 combine: Print to dump if some insn cannot be combined into i3
Eventually we should print the reason that any combination fails.
This is a good start (these happen often).


	* combine.c (try_combine): Print a message to dump file whenever
	I0, I1, or I2 cannot be combined into I3.

From-SVN: r255261
2017-11-29 23:51:16 +01:00
Segher Boessenkool
4a01617886 combine: Do not throw away unneeded arms of parallels (PR83156)
The fix for PR82621 makes us not split an I2 if one of the results of
those SETs is unused, since combine does not handle that properly.  But
this results in degradation for i386 (or more in general, for any
target that does not have patterns for parallels with an unused result
as a CLOBBER instead of a SET for that result).

This patch instead makes us not split only if one of the results is set
again before I3.  That fixes PR83156 and also fixes PR82621.

Unfortunately it undoes the nice optimisations that the previous patch
did on powerpc.


	PR rtl-optimization/83156
	PR rtl-optimization/82621
	* combine.c (try_combine): Don't split an I2 if one of the dests is
	set again before I3.  Allow unused dests.

From-SVN: r255260
2017-11-29 23:42:37 +01:00
Segher Boessenkool
18b776e936 rs6000: Add second variant of adde
This adds a second variant of the adde insn pattern, this one with the
CA register as the second operand.  The existing pattern has it as the
third operand.  It would be ideal if RTL was always canonicalised like
that, but it isn't (and that is not trivial), and this is a simple and
harmless patch.


	* config/rs6000/rs6000.md (*add<mode>3_carry_in_internal2): New.

From-SVN: r255259
2017-11-29 23:30:24 +01:00
Vladimir Makarov
561c58b4d9 re PR rtl-optimization/80818 (LRA clobbers live hard reg clobbered during rematerialization)
2017-11-29  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/80818
	* lra.c (collect_non_operand_hard_regs): New arg insn.  Pass it
	recursively.  Use insn code for clobber.
	(lra_set_insn_recog_data): Pass the new arg to
	collect_non_operand_hard_regs.
	(add_regs_to_insn_regno_info): Pass insn instead of uid.  Use insn
	code for clobber.
	(lra_update_insn_regno_info): Pass insn to
	add_regs_to_insn_regno_info.

From-SVN: r255258
2017-11-29 22:19:25 +00:00
Jim Wilson
08539f3e94 Riscv patterns to optimize away some redundant zero/sign extends.
gcc/
	* config/riscv/riscv.c (SINGLE_SHIFT_COST): New.
	(riscv_rtx_costs): Case ZERO_EXTRACT, match new pattern, and return
	SINGLE_SHIFT_COST.  Case LT and ZERO_EXTEND, likewise.  Case ASHIFT,
	use SINGLE_SHIFT_COST.
	* config/riscv/riscv.md (lshrsi3_zero_extend_1): New.
	(lshrsi3_zero_extend_2, lshrsi3_zero_extend_3): New.

	gcc/testsuite/
	* gcc.target/riscv/riscv.exp: New.
	* gcc.target/riscv/zero-extend-1.c: New.
	* gcc.target/riscv/zero-extend-2.c: New.
	* gcc.target/riscv/zero-extend-3.c: New.
	* gcc.target/riscv/zero-extend-4.c: New.


Co-Authored-By: Andrew Waterman <andrew@sifive.com>

From-SVN: r255257
2017-11-29 14:14:17 -08:00
David Malcolm
591996bad7 C++: improve location of static_assert errors
gcc/cp/ChangeLog:
	* parser.c (cp_parser_unary_expression): Generate a location for
	"noexcept".
	(cp_parser_trait_expr): Generate and return a location_t,
	converting the return type from tree to cp_expr.
	(cp_parser_static_assert): Pass location of the condition to
	finish_static_assert, rather than that of the "static_assert"
	token, where available.

gcc/testsuite/ChangeLog:
	* g++.dg/cpp1y/static_assert3.C: New test case.

libstdc++-v3/ChangeLog:
	* testsuite/20_util/duration/literals/range.cc: Update expected
	line of a static_assert failure.

From-SVN: r255255
2017-11-29 22:07:32 +00:00
Paolo Carlini
cc6fe78448 re PR c++/82293 (ICE in nonlambda_method_basetype at gcc/cp/lambda.c:886)
/cp
2017-11-29  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/82293
	* lambda.c (nonlambda_method_basetype): Don't use LAMBDA_TYPE_P
	on a null type.

/testsuite
2017-11-29  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/82293
	* g++.dg/cpp0x/lambda/lambda-ice24.C: New.

From-SVN: r255254
2017-11-29 21:54:18 +00:00
Jason Merrill
e3704417fa PR c++/82760 - memory corruption with aligned new.
* call.c (build_operator_new_call): Update *args if we add the
	align_arg.

From-SVN: r255253
2017-11-29 16:01:23 -05:00
Will Schmidt
edaa6eb53a fold-vec-ld-char.c: Add lxv insn to expected output.
[testsuite]

2017-11-29  Will Schmidt  <will_schmidt@vnet.ibm.com>

    * gcc.target/powerpc/fold-vec-ld-char.c: Add lxv insn to expected output.
    * gcc.target/powerpc/fold-vec-ld-double.c: Add lxv insn to expected output.
    * gcc.target/powerpc/fold-vec-ld-float.c: Add lxv insn to expected output.
    * gcc.target/powerpc/fold-vec-ld-int.c: Add lxv insn to expected output.
    * gcc.target/powerpc/fold-vec-ld-longlong.c: Add lxv insn to expected output.
    * gcc.target/powerpc/fold-vec-ld-short.c: Add lxv insn to expected output.

From-SVN: r255252
2017-11-29 20:10:52 +00:00
Will Schmidt
faf08cc798 fold-vec-splat-8.c: Add vspltisb to expected output.
[testsuite]
2017-11-29  Will Schmidt  <will_schmidt@vnet.ibm.com>

    * gcc.target/powerpc/fold-vec-splat-8.c: Add vspltisb to expected output.
    * gcc.target/powerpc/fold-vec-splats-int.c: Add mtvsrws to expected output.
    * gcc.target/powerpc/fold-vec-splats-longlong.c: Add mtvsrdd to expected output.

From-SVN: r255251
2017-11-29 19:58:29 +00:00
Julia Koval
3d2aff3de0 nable VBMI2 support [7/7]
gcc/
	* config/i386/avx512vbmi2intrin.h (_mm512_shldv_epi16,
	_mm512_mask_shldv_epi16, _mm512_maskz_shldv_epi16, _mm512_shldv_epi32,
	_mm512_mask_shldv_epi32, _mm512_maskz_shldv_epi32, _mm512_shldv_epi64,
	_mm512_mask_shldv_epi64, _mm512_maskz_shldv_epi64): New intrinsics.
	* config/i386/avx512vbmi2vlintrin.h (_mm256_shldv_epi16,
	_mm256_mask_shldv_epi16, _mm256_maskz_shldv_epi16, _mm256_shldv_epi32,
	_mm256_mask_shldv_epi32, _mm256_maskz_shldv_epi32, _mm256_shldv_epi64,
	_mm256_mask_shldv_epi64, _mm256_maskz_shldv_epi64, _mm_shldv_epi16,
	_mm_mask_shldv_epi16, _mm_maskz_shldv_epi16, _mm_shldv_epi32,
	_mm_mask_shldv_epi32, _mm_maskz_shldv_epi32, _mm_shldv_epi64,
	_mm_mask_shldv_epi64, _mm_maskz_shldv_epi64): Ditto.
	* config/i386/i386-builtin.def (__builtin_ia32_vpshldv_v32hi,
	__builtin_ia32_vpshldv_v32hi_mask, __builtin_ia32_vpshldv_v32hi_maskz,
	__builtin_ia32_vpshldv_v16hi, __builtin_ia32_vpshldv_v16hi_mask,
	__builtin_ia32_vpshldv_v16hi_maskz, __builtin_ia32_vpshldv_v8hi,
	__builtin_ia32_vpshldv_v8hi_mask, __builtin_ia32_vpshldv_v8hi_maskz,
	__builtin_ia32_vpshldv_v16si, __builtin_ia32_vpshldv_v16si_mask,
	__builtin_ia32_vpshldv_v16si_maskz, __builtin_ia32_vpshldv_v8si,
	__builtin_ia32_vpshldv_v8si_mask, __builtin_ia32_vpshldv_v8si_maskz,
	__builtin_ia32_vpshldv_v4si, __builtin_ia32_vpshldv_v4si_mask,
	__builtin_ia32_vpshldv_v4si_maskz, __builtin_ia32_vpshldv_v8di,
	__builtin_ia32_vpshldv_v8di_mask, __builtin_ia32_vpshldv_v8di_maskz,
	__builtin_ia32_vpshldv_v4di, __builtin_ia32_vpshldv_v4di_mask,
	__builtin_ia32_vpshldv_v4di_maskz, __builtin_ia32_vpshldv_v2di,
	__builtin_ia32_vpshldv_v2di_mask,
	__builtin_ia32_vpshldv_v2di_maskz): New builtins.
	* config/i386/sse.md (vpshldv_<mode>, vpshldv_<mode>_mask,
	vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): New patterns.

gcc/testsuite/
	* gcc.target/i386/avx512f-vpshldv-1.c: New test.
	* gcc.target/i386/avx512f-vpshldvd-2.c: Ditto.
	* gcc.target/i386/avx512f-vpshldvq-2.c: Ditto.
	* gcc.target/i386/avx512f-vpshldvw-2.c: Ditto.
	* gcc.target/i386/avx512vl-vpshldv-1.c: Ditto.
	* gcc.target/i386/avx512vl-vpshldvd-2.c: Ditto.
	* gcc.target/i386/avx512vl-vpshldvq-2.c: Ditto.
	* gcc.target/i386/avx512vl-vpshldvw-2.c: Ditto.

From-SVN: r255250
2017-11-29 18:45:28 +00:00
Julia Koval
8d4f237b9f Enable VBMI2 support [6/7]
gcc/
	* config/i386/avx512vbmi2intrin.h (_mm512_shrdv_epi16,
	_mm512_mask_shrdv_epi16, _mm512_maskz_shrdv_epi16, _mm512_shrdv_epi32,
	_mm512_mask_shrdv_epi32, _mm512_maskz_shrdv_epi32, _mm512_shrdv_epi64,
	_mm512_mask_shrdv_epi64, _mm512_maskz_shrdv_epi64): New intrinsics.
	* config/i386/avx512vbmi2vlintrin.h (_mm256_shrdv_epi16,
	_mm256_mask_shrdv_epi16, _mm256_maskz_shrdv_epi16, _mm256_shrdv_epi32,
	_mm256_mask_shrdv_epi32, _mm256_maskz_shrdv_epi32, _mm256_shrdv_epi64,
	_mm256_mask_shrdv_epi64, _mm256_maskz_shrdv_epi64, _mm_shrdv_epi16,
	_mm_mask_shrdv_epi16, _mm_maskz_shrdv_epi16, _mm_shrdv_epi32,
	_mm_mask_shrdv_epi32, _mm_maskz_shrdv_epi32, _mm_shrdv_epi64,
	_mm_mask_shrdv_epi64, _mm_maskz_shrdv_epi64): Ditto.
	* config/i386/i386-builtin-types.def (V32HI_FTYPE_V32HI_V32HI_V32HI,
	V32HI_FTYPE_V32HI_V32HI_V32HI_INT, V16HI_FTYPE_V16HI_V16HI_V16HI_INT,
	V8HI_FTYPE_V8HI_V8HI_V8HI_INT, V8SI_FTYPE_V8SI_V8SI_V8SI_INT,
	V4SI_FTYPE_V4SI_V4SI_V4SI_INT, V8DI_FTYPE_V8DI_V8DI_V8DI,
	V8DI_FTYPE_V8DI_V8DI_V8DI_INT, V4DI_FTYPE_V4DI_V4DI_V4DI_INT,
	V16SI_FTYPE_V16SI_V16SI_V16SI, V16SI_FTYPE_V16SI_V16SI_V16SI_INT,
	V2DI_FTYPE_V2DI_V2DI_V2DI_INT): New types.
	* config/i386/i386.c (ix86_expand_args_builtin): Handle new types.
	* config/i386/sse.md (vpshrdv_<mode>, vpshrdv_<mode>_mask,
	vpshrdv_<mode>_maskz, vpshrdv_<mode>_maskz_1): New pattern.

gcc/testsuite/
	* gcc.target/i386/avx512f-vpshrdv-1.c: New test.
	* gcc.target/i386/avx512f-vpshrdvd-2.c: Ditto.
	* gcc.target/i386/avx512f-vpshrdvq-2.c: Ditto.
	* gcc.target/i386/avx512f-vpshrdvw-2.c: Ditto.
	* gcc.target/i386/avx512f-vpshrdw-2.c: Ditto.
	* gcc.target/i386/avx512vl-vpshrdv-1.c: Ditto.
	* gcc.target/i386/avx512vl-vpshrdvd-2.c: Ditto.
	* gcc.target/i386/avx512vl-vpshrdvq-2.c: Ditto.
	* gcc.target/i386/avx512vl-vpshrdvw-2.c: Ditto.
	* gcc.target/i386/avx512vl-vpshrdw-2.c: Ditto.

From-SVN: r255249
2017-11-29 18:19:34 +00:00
Qing Zhao
1d0a8ae9d4 Add myself as GCC maintainer
From-SVN: r255248
2017-11-29 17:55:42 +00:00
Jakub Jelinek
8746a2153f re PR tree-optimization/83195 (pr82929.c scan for "Merging successful" fail)
PR tree-optimization/83195
	* gcc.dg/pr82929.c: Don't check for "Merging successful" on arm.
	* gcc.dg/pr82929-2.c: New test.

From-SVN: r255247
2017-11-29 18:38:54 +01:00
Daniel Cederman
9d52da2f21 [SPARC] Recognize the load when accessing the GOT
Needed for the UT699 errata workaround to function correctly when
compiling with -fPIC.

2017-11-29  Daniel Cederman  <cederman@gaisler.com>

gcc/
	* config/sparc/sparc.c (sparc_do_work_around_errata): Treat the
        movsi_pic_gotdata_op instruction as a load for the UT699 errata
        workaround.

From-SVN: r255239
2017-11-29 16:45:41 +01:00
Martin Aberg
6f9bc5a70f [SPARC] Prevent -mfix-ut699 from generating b2bst errata sequences
The sequence
  st
  fdivd / fsqrtd
  std
was generated in some cases with -mfix-ut699 when there was
a st before the div/sqrt. This sequence could trigger the b2bst errata.

Now the following safe sequence is generated instead:
  st
  nop
  fdivd / fsqrtd
  std

2017-11-29  Martin Aberg  <maberg@gaisler.com>

gcc/
	* config/sparc/sparc.md (divdf3_fix): Add NOP and adjust length
        to prevent b2bst errata sequence.
        (sqrtdf2_fix): Likewise.

From-SVN: r255238
2017-11-29 16:41:45 +01:00
Daniel Cederman
97c30075e8 [SPARC] Errata workaround for GRLIB-TN-0013
This patch provides a workaround for the errata described in GRLIB-TN-0013.

If the workaround is enabled it will:

* Prevent div and sqrt instructions in the delay slot.

* Insert NOPs to prevent the sequence (div/sqrt) -> (two or three floating
  point operations or loads) -> (div/sqrt).

* Not insert NOPs if any of the floating point operations have a dependency
  on the destination register of the first (div/sqrt).

* Not insert NOPs if one of the floating point operations is a (div/sqrt).

* Insert NOPs to prevent (div/sqrt) followed by a branch.

It is applicable to GR712RC, UT700, and UT699.

2017-11-29  Daniel Cederman  <cederman@gaisler.com>

gcc/
	* config/sparc/sparc.c (fpop_reg_depend_p): New function.
	(div_sqrt_insn_p): New function.
	(sparc_do_work_around_errata): Insert NOP instructions to
	prevent sequences that could trigger the TN-0013 errata for
	certain LEON3 processors.
	(pass_work_around_errata::gate): Also test sparc_fix_lost_divsqrt.
	(sparc_option_override): Set sparc_fix_lost_divsqrt appropriately.
	* config/sparc/sparc.md (fix_lost_divsqrt): New attribute.
	(in_branch_delay): Prevent div and sqrt in delay slot if
	fix_lost_divsqrt.
	* config/sparc/sparc.opt (sparc_fix_lost_divsqrt): New variable.

From-SVN: r255237
2017-11-29 16:37:19 +01:00
Daniel Cederman
47c72733ab [SPARC] Errata workaround for GRLIB-TN-0010
This patch provides a workaround for the errata described in GRLIB-TN-0010.

If the workaround is enabled it will:

 * Insert a NOP between load instruction and atomic
   instruction (swap, ldstub, casa).

 * Insert a NOP at branch target if load in delay slot
   and atomic instruction at branch target.

It is applicable to UT700.

2017-11-29  Daniel Cederman  <cederman@gaisler.com>

gcc/
	* config/sparc/sparc.c (atomic_insn_p): New function.
	(sparc_do_work_around_errata): Insert NOP instructions to
	prevent sequences that could trigger the TN-0010 errata for
	UT700.
	* config/sparc/sync.md (atomic_compare_and_swap_leon3_1): Make
	instruction referable in atomic_insns_p.

From-SVN: r255236
2017-11-29 16:23:40 +01:00
Daniel Cederman
aed173734d [SPARC] Errata workaround for GRLIB-TN-0011
This patch provides a workaround for the errata described in GRLIB-TN-0011.

If the workaround is enabled it will:

 * Insert .align 16 before atomic instructions (swap, ldstub, casa).

It is applicable to GR712RC.

2017-11-29  Daniel Cederman  <cederman@gaisler.com>

gcc/
	* config/sparc/sync.md (swapsi): 16-byte align if sparc_fix_gr712rc.
	(atomic_compare_and_swap_leon3_1): Likewise.
	(ldstub): Likewise.

From-SVN: r255235
2017-11-29 16:20:48 +01:00
Daniel Cederman
dcacda0cc1 [SPARC] Errata workaround for GRLIB-TN-0012
This patch provides a workaround for the errata described in GRLIB-TN-0012.

If the workaround is enabled it will:

 * Prevent any floating-point operation from being placed in the
   delay slot of an annulled integer branch.

 * Place a NOP at the branch target of an integer branch if it is
   a floating-point operation or a floating-point branch.

It is applicable to GR712RC.

2017-11-29  Daniel Cederman  <cederman@gaisler.com>

gcc/
	* config/sparc/sparc.c (fpop_insn_p): New function.
	(sparc_do_work_around_errata): Insert NOP instructions to
	prevent sequences that could trigger the TN-0012 errata for
	GR712RC.
	(pass_work_around_errata::gate): Also test sparc_fix_gr712rc.
	* config/sparc/sparc.md (fix_gr712rc): New attribute.
	(in_branch_annul_delay): Prevent floating-point instructions
	in delay slot of annulled integer branch.

From-SVN: r255234
2017-11-29 16:15:48 +01:00
Richard Biener
f7300fff74 re PR tree-optimization/83202 (Try joining operations on consecutive array elements during tree vectorization)
2017-11-29  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/83202
	* tree-vect-slp.c (scalar_stmts_set_t): New typedef.
	(bst_fail): Use it.
	(vect_analyze_slp_cost_1): Add visited set, do not account SLP
	nodes vectorized to the same stmts multiple times.
	(vect_analyze_slp_cost): Allocate a visited set and pass it down.
	(vect_analyze_slp_instance): Adjust.
	(scalar_stmts_to_slp_tree_map_t): New typedef.
	(vect_schedule_slp_instance): Add a map recording the SLP node
	representing the vectorized stmts for a set of scalar stmts.
	Avoid code-generating redundancies.
	(vect_schedule_slp): Allocate map and pass it down.

	* gcc.dg/vect/costmodel/x86_64/costmodel-pr83202.c: New testcase.

From-SVN: r255233
2017-11-29 14:38:06 +00:00
Nathan Sidwell
d5ed6a87ed Fix PR number 83817->83187
From-SVN: r255232
2017-11-29 13:39:23 +00:00