cp/
PR c++/77812
* name-lookup.c (set_namespace_binding_1): An overload of 1 decl
is a new overload.
testsuite/
PR c++/77812
* g++.dg/pr77812.C: New.
From-SVN: r244335
PR c++/71537
* fold-const.c (maybe_nonzero_address): Return 1 for function
local objects.
(tree_single_nonzero_warnv_p): Don't handle function local objects
here.
* g++.dg/cpp1y/constexpr-71537.C: New test.
From-SVN: r244333
Add containing Bfunction to Backend::conditional_expression
method signature, since the back end might need to create a
temporary when generating IR for this construct.
Reviewed-on: https://go-review.googlesource.com/35056
From-SVN: r244330
PR c++/72813
* gcc.c (default_compilers): Don't add -o %g.s for -S -save-temps
of c-header.
* c-decl.c (pop_file_scope): Set flag_syntax_only to 1 after writing
PCH file.
* decl2.c (c_parse_final_cleanups): Set flag_syntax_only to 1 after
writing PCH file.
From-SVN: r244328
The recent change to generate type functions for more types with
identity comparisons caused us to generate some unnecessary functions,
and even caused a compiler crash on Solaris due to phase ordering.
Avoid this by marking all generated and uncompared struct and array
types as incomparable, so that we don't try to generate type functions
for them.
Reviewed-on: https://go-review.googlesource.com/35110
From-SVN: r244327
gcc/ChangeLog:
PR driver/78877
* opts.c: Include "spellcheck.h"
(struct string_fragment): New struct.
(struct edit_distance_traits<const string_fragment &>): New
struct.
(get_closest_sanitizer_option): New function.
(parse_sanitizer_options): Offer suggestions for unrecognized arguments.
gcc/testsuite/ChangeLog:
PR driver/78877
* gcc.dg/spellcheck-options-14.c: New test case.
* gcc.dg/spellcheck-options-15.c: New test case.
* gcc.dg/spellcheck-options-16.c: New test case.
* gcc.dg/spellcheck-options-17.c: New test case.
From-SVN: r244325
* dwarf2out.c (DWARF_COMPILE_UNIT_HEADER_SIZE): For DWARF5 decrease
by 12.
(DWARF_COMDAT_TYPE_UNIT_HEADER_SIZE): Always
DWARF_COMPILE_UNIT_HEADER_SIZE plus 12.
(DWARF_COMPILE_UNIT_SKELETON_HEADER_SIZE): Define.
(calc_base_type_die_sizes): Use DWARF_COMPILE_UNIT_SKELETON_HEADER_SIZE
for initial die_offset if dwarf_split_debug_info.
(output_comp_unit): Use DWARF_COMPILE_UNIT_SKELETON_HEADER_SIZE for
initial next_die_offset if dwo_id is non-NULL. Don't emit padding
fields.
(output_skeleton_debug_sections): Formatting fix. Use
DWARF_COMPILE_UNIT_SKELETON_HEADER_SIZE instead of
DWARF_COMPILE_UNIT_HEADER_SIZE. Don't emit padding.
From-SVN: r244323
My previous change to the Cortex-A53 scheduler resulted in a 13% regression on a
proprietary benchmark. This turned out to be due to non-optimal scheduling of int
to float conversions. This patch separates int to FP transfers from int to float
conversions based on experiments to determine the best schedule. As a result of
these tweaks the performance of the benchmark improves by 20%.
gcc/
* config/arm/cortex-a53.md: Add bypasses for
cortex_a53_r2f_cvt.
(cortex_a53_r2f): Only use for transfers.
(cortex_a53_f2r): Likewise.
(cortex_a53_r2f_cvt): Add reservation for conversions.
(cortex_a53_f2r_cvt): Likewise.
From-SVN: r244322
2017-01-09 Tamar Christina <tamar.christina@arm.com>
* config/arm/arm_neon.h: Add __artificial__ and gnu_inline
to all inlined functions, change static to extern.
From-SVN: r244321
PR libstdc++/78273
* include/bits/stl_map.h (map::count<_Kt>(const _Kt&)): Don't assume
the heterogeneous comparison can only find one match.
* include/bits/stl_set.h (set::count<_Kt>(const _Kt&)): Likewise.
* testsuite/23_containers/map/operations/2.cc: Test count works with
comparison function that just partitions rather than sorting.
* testsuite/23_containers/set/operations/2.cc: Likewise.
From-SVN: r244317
The files arm-cores.def, arm-fpus.def and arm-arches.def are parsed and
used in several places and the format is slightly awkward to maintain
as they must be parsable in C and by certain scripts. Furthermore,
changes to the content that affects every entry is particularly awkward for
dealing with merges.
This patch replaces all three files with a single file that specifies all
the command-line related definitions in a new format that allows for better
checking for consistency as well as (hopefully) easier to merge changes.
The awk script used to parse it is relatively complicated, but should be
pretty portable. It works by parsing in all the data and then operating
one of a number of possible sub-commands to generate the desired output.
The new method picked up one error. The CPU descriptions referred to an
architecture ARMv5tej which was not supported by -march. This has been
fixed by adding the relevant entry to the architecture list.
gcc:
* config.gcc: Use new awk script to check CPU, FPU and architecture
parameters for --with-... options.
* config/arm/parsecpu.awk: New file
* config/arm/arm-cpus.in: New file.
* config/arm/arm-opts.h: Include arm-cpu.h instead of processing .def
files.
* config/arm/arm.c: Include arm-cpu-data.h instead of processing .def
files.
* config/arm/t-arm: Update dependency rules.
* common/config/arm/arm-common.c: Include arm-cpu-cdata.h instead
of processing .def files.
* config/arm/genopt.sh: Deleted.
* config/arm/gentune.sh: Deleted.
* config/arm/arm-cores.def: Deleted.
* config/arm/arm-arches.def: Deleted.
* config/arm/arm-fpus.def: Deleted.
* config/arm/arm-tune.md: Regenerated.
* config/arm/arm-tables.opt: Regenerated.
* config/arm/arm-cpu.h: New generated file.
* config/arm/arm-cpu-data.h: New generated file.
* config/arm/arm-cpu-cdata.h: New generated file.
Contrib:
* gcc_update: Adjust touch list.
From-SVN: r244316
PR rtl-optimization/79032
* lra-constraints.c (simplify_operand_subreg): In the MEM case, test
the alignment of the adjusted memory reference against that of MODE,
instead of the alignment of the original memory reference.
From-SVN: r244311
Reduce the size of variant, it doesn't need an index of
type size_t internally.
* include/std/variant (parse_numbers.h): New include.
(__select_index): New.
(_Variant_storage<false, _Types...>::_M_reset_impl): Use
_index_type for comparison with variant_npos.
(_Variant_storage<false, _Types...>::__index_type): New.
(_Variant_storage<false, _Types...>::_M_index): Change the
type from size_t to __index_type.
(_Variant_storage<true, _Types...>::__index_type): New.
(_Variant_storage<true, _Types...>::_M_index): Change the
type from size_t to __index_type.
(_Variant_base::_M_valid): Use _Storage::__index_type
for comparison with variant_npos.
(variant::index): Use _Base::_Storage::__index_type
for comparison with variant_npos.
* testsuite/20_util/variant/index_type.cc: New.
From-SVN: r244309
2017-01-11 Richard Biener <rguenther@suse.de>
* tree-vrp.c (evrp_dom_walker::before_dom_children): Also
set range/nonnull info for PHI results. Do not set it on
stmts marked for removal.
* gcc.dg/tree-ssa/pr61743-1.c: Adjust.
From-SVN: r244305
* expr.c (store_field): In the bitfield case, fetch the return value
from the registers before applying a single big-endian adjustment.
Always do a final load for a BLKmode value not larger than a word.
From-SVN: r244299
PR c++/77949 identifies an ICE when the C++ frontend attempts to emit a
fix-it hint inserting a missing semicolon at column 4097 of a source file.
This column value exceeds LINE_MAP_MAX_COLUMN_NUMBER and hence isn't
representable using a location_t.
Attempting to do so leads to these problems, which this patch fixes:
(a) when encountering a column number > LINE_MAP_MAX_COLUMN_NUMBER we
create a new linemap with m_column_and_range_bits == 0, but
linemap_position_for_column doesn't check for this, and hence can emit
a bogus location_t value that's calculated relative to the previous
linemap start, but which will be decoded relative to the new linemap,
leading to very large incorrect line values.
(b) when encountering a column number that can't be represented, and
for which the linemap was pre-existing, the code would hit this assertion:
if (linemap_assert_fails (column < (1u << map->m_column_and_range_bits)))
around a bail-out condition. The patch replaces this assertion with a
simple conditional, to stop the ICE when this occurs, and fixes the
bit count (effective column bits, vs column+range bits)
(c) the C++ frontend wasn't checking for failure of
linemap_position_for_loc_and_offset when considering emitting the fix-it
hint. The patch adds a conditional, so that no fix-it hint is emitted
if the location is bogus.
gcc/cp/ChangeLog:
PR c++/77949
* parser.c (cp_parser_class_specifier_1): Only suggest inserting
a missing semicolon if we have a valid insertion location for
the fix-it hint.
gcc/ChangeLog:
PR c++/77949
* input.c (selftest::test_accessing_ordinary_linemaps): Verify
that we correctly handle column numbers greater than
LINE_MAP_MAX_COLUMN_NUMBER.
gcc/testsuite/ChangeLog:
PR c++/77949
* g++.dg/diagnostic/pr77949.C: New test case.
libcpp/ChangeLog:
PR c++/77949
* line-map.c (linemap_position_for_column): When calling
linemap_start_line, detect if a new linemap was created with
0 column bits, and bail out early if this is the case.
(linemap_position_for_loc_and_offset): Replace overzealous
linemap_assert_fails with a simple conditional; use correct
bit count.
From-SVN: r244292
I looked at a diff of proc.go between Go 1.7 and gccgo, and copied
over all the easy stuff.
Reviewed-on: https://go-review.googlesource.com/35090
From-SVN: r244291
2017-01-10 Joe Seymour <joe.s@somniumtech.com>
* config/msp430/driver-msp430.c (msp430_mcu_data): Sync with data
from TI's devices.csv file as of September 2016.
* config/msp430/msp430.c (msp430_mcu_data): Likewise.
From-SVN: r244289
