gcc/ChangeLog:
2020-05-15 Martin Liska <mliska@suse.cz>
* cfgexpand.c: Move the enum to ...
* coretypes.h (enum stack_protector): ... here.
* function.c (assign_parm_adjust_stack_rtl): Use the stack_protector
enum.
gcc/c-family/ChangeLog:
2020-05-15 Martin Liska <mliska@suse.cz>
* c-cppbuiltin.c (c_cpp_builtins): Use the stack_protector enum.
- Support expansion operator (*) in the multilib config string.
- Motivation of this patch is reduce the complexity when we deal multilib with
sub-extension, expand the combinations by hand would be very painful and
error prone, no one deserve to experience this[1] again!
[1] f4d7facafb/Makefile (L348)
gcc/ChangeLog:
* config/riscv/multilib-generator: Add TODO, import itertools
and functools.reduce.
Handle expantion operator.
(LONG_EXT_PREFIXES): New.
(arch_canonicalize): Update comment and improve python3
debuggability/compatibility.
(add_underline_prefix): New.
(_expand_combination): Ditto.
(unique): Ditto.
(expand_combination): Ditto.
> this broke sparc-sun-solaris2.11 bootstrap
>
> /vol/gcc/src/hg/master/local/gcc/tree-ssa-phiopt.c: In function 'bool cond_removal_in_popcount_clz_ctz_pattern(basic_block, basic_block, edge, edge, gimple*, tree, tree)':
> /vol/gcc/src/hg/master/local/gcc/tree-ssa-phiopt.c:1858:27: error: variable 'mode' set but not used [-Werror=unused-but-set-variable]
> 1858 | scalar_int_mode mode = SCALAR_INT_TYPE_MODE (TREE_TYPE (arg));
> | ^~~~
>
>
> and doubtlessly several other targets that use the defaults.h definition of
>
> #define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) 0
Ugh, seems many of those macros do not evaluate the first argument.
This got broken by the change to direct_internal_fn_supported_p, previously
it used mode also in the optab test.
2020-10-22 Jakub Jelinek <jakub@redhat.com>
* tree-ssa-phiopt.c (cond_removal_in_popcount_clz_ctz_pattern):
For CLZ and CTZ tests, use type temporary instead of mode.
> + {"x86-64", PROCESSOR_K8, CPU_K8, PTA_X86_64_BASELINE, 0, P_NONE},
> + {"x86-64-v2", PROCESSOR_K8, CPU_GENERIC, PTA_X86_64_V2 | PTA_NO_TUNE,
> + 0, P_NONE},
> + {"x86-64-v3", PROCESSOR_K8, CPU_GENERIC, PTA_X86_64_V3 | PTA_NO_TUNE,
> + 0, P_NONE},
> + {"x86-64-v4", PROCESSOR_K8, CPU_GENERIC, PTA_X86_64_V4 | PTA_NO_TUNE,
> + 0, P_NONE},
> {"eden-x2", PROCESSOR_K8, CPU_K8,
> PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_FXSR,
> 0, P_NONE},
I have noticed that one can't configure gcc to default to these.
I've also found various other 32-bit or 64-bit -march= arguments for which
it wasn't possible to configure gcc to default to those.
The x86-64-v* the patch only allows in --with-arch_64=, because otherwise
it fails build miserably - as
./xgcc -B ./ -S -march=x86-64-v2 -m32 test.c
cc1: error: ‘x86-64-v2’ architecture level is only defined for the x86-64 psABI
when building 32-bit multilibs. Even if multilibs are disallowed, I think
the compiler still supports -m32 and so --with-arch_64= seems to be the only
option in which we can support that.
2020-10-22 Jakub Jelinek <jakub@redhat.com>
* config.gcc (x86_archs): Add samuel-2, nehemiah, c7 and esther.
(x86_64_archs): Add eden-x2, nano, nano-1000, nano-2000, nano-3000,
nano-x2, eden-x4, nano-x4, x86-64-v2, x86-64-v3 and x86-64-v4.
(i[34567]86-*-* | x86_64-*-*): Only allow x86-64-v* as argument
to --with-arch_64=.
> Therefore, I think until omp_get_initial_device () value is changed, we
The following so far untested patch implements that change.
OpenMP 4.5 said for omp_get_initial_device:
The value of the device number is implementation defined. If it is between 0 and one less than
omp_get_num_devices() then it is valid for use with all device constructs and routines; if it is
outside that range, then it is only valid for use with the device memory routines and not in the
device clause.
and OpenMP 5.0 similarly, but OpenMP 5.1 says:
The value of the device number is the value returned by the omp_get_num_devices routine.
As the new value is compatible with what has been required earlier, I think
we can change it already now.
2020-10-22 Jakub Jelinek <jakub@redhat.com>
* icv.c (omp_get_initial_device): Remove including corresponding
ialias.
* icv-device.c (omp_get_initial_device): New function. Return
gomp_get_num_devices (). Add ialias.
* target.c (resolve_device): Don't fail with
OMP_TARGET_OFFLOAD=mandatory if device_id is equal to
gomp_get_num_devices ().
(omp_target_alloc, omp_target_free, omp_target_is_present,
omp_target_memcpy, omp_target_memcpy_rect, omp_target_associate_ptr,
omp_target_disassociate_ptr, omp_pause_resource): Use
gomp_get_num_devices () instead of GOMP_DEVICE_HOST_FALLBACK on the
first use in the functions, in uses dominated by the
gomp_get_num_devices call use num_devices_openmp instead.
* libgomp.texi (omp_get_initial_device): Document.
* config/gcn/icv-device.c (omp_get_initial_device): New function.
Add ialias.
* config/nvptx/icv-device.c (omp_get_initial_device): Likewise.
* testsuite/libgomp.c/target-40.c: New test.
Its libc does not offer *f or *l elementary functions, so rely on the
C double ones only.
for gcc/ada/ChangeLog
* Makefile.rtl (LIBGNAT_TARGET_PAIRS) <lynxos178>: Rely on
Aux_Long_Float for all real types.
Some acats-4 tests that check the precision of Float elementary
functions fail with vxworks 7.2's implementations of single-precision
math functions.
This patch arranges for us to bypass the single-precision functions,
and use the Aux_Long_Float implementation, based on the double-typed
calls from the C library, for Float and Short_Float.
for gcc/ada/ChangeLog
* Makefile.rtl (LIBGNAT_TARGET_PAIRS): Use Long Float-based
variant of Aux_Short_Float and Aux_Float on vxworks targets.
* libgnat/a-nashfl__wraplf.ads: New.
* libgnat/a-nuaufl__wraplf.ads: New.
Like aarch64-* and ppc*-linux-gnu, sparc*-sun-solaris has
Long_Long_Float mapped to double rather than long double, so the
intrinsics in the default version of a-nallfl.ads have mismatching
types. Adopt the wraplf workaround for it as well.
for gcc/ada/ChangeLog
* Makefile.rtl (LIBGNAT_TARGET_PAIRS) <sparc*-sun-solaris>:
Use wraplf version of a-nallfl.
Some platforms have failed to build because long long float is mapped
to double rather than long double, and then the attempts to import
intrinsics for long double in Aux_Long_Long_Float raise warnings
turned into errors.
This patch is a work around for the mismatch, arranging for
Aux_Long_Long_Float to map to Aux_Long_Float.
for gcc/ada/ChangeLog
* Makefile.rtl (LIBGNAT_TARGET_PAIRS): Use
a-nallfl__wraplf.ads on aarch64-* and ppc*-linux-gnu targets.
* libgnat/a-nallfl__wraplf.ads: New.
Only compile the __go_ptrace varargs shim on Linux to avoid compilation
failures on some other platforms. The C ptrace function is not entirely
portable (e.g., NetBSD has `int data` instead of `void* data`), and so
far Linux is the only platform that needs the varargs shim.
Additionally, make the types in the ptrace and raw_ptrace function
declarations match. This makes it more clear that the only difference
between the two is that calls via the former are allowed to block while
calls via the latter are not.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/263517
this patch moves nested function information out of symbol table (to a summary).
This saves memory (especially at WPA time) and also makes nested function
support more contained.
gcc/ChangeLog:
2020-10-22 Jan Hubicka <hubicka@ucw.cz>
* cgraph.c: Include tree-nested.h
(cgraph_node::create): Call maybe_record_nested_function.
(cgraph_node::remove): Do not remove function from nested function
infos.
(cgraph_node::dump): Update.
(cgraph_node::unnest): Move to tree-nested.c
(cgraph_node::verify_node): Update.
(cgraph_c_finalize): Call nested_function_info::release.
* cgraph.h (struct symtab_node): Remove nested function info.
* cgraphclones.c (cgraph_node::create_clone): Do not clone nested
function info.
* cgraphunit.c (cgraph_node::analyze): Update.
(cgraph_node::expand): Do not worry about nested functions; they are
lowered.
(symbol_table::finalize_compilation_unit): Call
nested_function_info::release.
* gimplify.c: Include tree-nested.h
(unshare_body): Update.
(unvisit_body): Update.
* omp-offload.c (omp_discover_implicit_declare_target): Update.
* tree-nested.c: Include alloc-pool.h, tree-nested.h, symbol-summary.h
(nested_function_sum): New static variable.
(nested_function_info::get): New member function.
(nested_function_info::get_create): New member function.
(unnest_function): New function.
(nested_function_info::~nested_function_info): New member function.
(nested_function_info::release): New function.
(maybe_record_nested_function): New function.
(lookup_element_for_decl): Update.
(check_for_nested_with_variably_modified): Update.
(create_nesting_tree): Update.
(unnest_nesting_tree_1): Update.
(gimplify_all_functions): Update.
(lower_nested_functions): Update.
* tree-nested.h (class nested_function_info): New class.
(maybe_record_nested_function): Declare.
(unnest_function): Declare.
(first_nested_function): New inline function.
(next_nested_function): New inline function.
(nested_function_origin): New inline function.
gcc/ada/ChangeLog:
2020-10-22 Jan Hubicka <hubicka@ucw.cz>
* gcc-interface/trans.c: Include tree-nested.h
(walk_nesting_tree): Update for new nested function info.
gcc/c-family/ChangeLog:
2020-10-22 Jan Hubicka <hubicka@ucw.cz>
* c-gimplify.c: Include tree-nested.h
(c_genericize): Update for new nested function info.
gcc/d/ChangeLog:
2020-10-22 Jan Hubicka <hubicka@ucw.cz>
* decl.cc: Include tree-nested.h
(get_symbol_decl): Update for new nested function info.
gcc/ChangeLog
PR rtl-optimization/97249
* simplify-rtx.c (simplify_binary_operation_1): Simplify
vec_select of a subreg of X to a vec_select of X.
gcc/testsuite/ChangeLog
* gcc.target/i386/pr97249-1.c: New test.
For operand with special_memory_constraint, there could be a wrapper
for memory_operand. Extract mem for operand for conditional judgement
like MEM_P, also for record_address_regs.
gcc/ChangeLog:
PR target/87767
* ira-costs.c (record_operand_costs): Extract memory operand
from recog_data.operand[i] for record_address_regs.
(record_reg_classes): Extract memory operand from OP for
conditional judgement MEM_P.
* ira.c (ira_setup_alts): Ditto.
* lra-constraints.c (extract_mem_from_operand): New function.
(satisfies_memory_constraint_p): Extract memory operand from
OP for decompose_mem_address, return false when there's no
memory operand inside OP.
(process_alt_operands): Remove MEM_P (op) since it would be
judged in satisfies_memory_constraint_p.
* recog.c (asm_operand_ok): Extract memory operand from OP for
judgement of memory_operand (OP, VOIDmode).
(constrain_operands): Don't unwrapper unary operator when
there's memory operand inside.
* rtl.h (extract_mem_from_operand): New decl.
This patch enables MVE vmin/vmax instructions for auto-vectorization.
MVE target is included in expander smin<mode>3, umin<mode>3, smax<mode>3
and umax<mode>3 for vectorization. Related insns for vmin/vmax in mve.md
are modified to use smin, umin, smax and umax expressions instead of
unspec to support the expanders.
gcc/ChangeLog:
2020-10-22 Dennis Zhang <dennis.zhang@arm.com>
* config/arm/mve.md (mve_vmaxq_<supf><mode>): Replace with ...
(mve_vmaxq_s<mode>, mve_vmaxq_u<mode>): ... these new insns to
use smax/umax instead of VMAXQ.
(mve_vminq_<supf><mode>): Replace with ...
(mve_vminq_s<mode>, mve_vminq_u<mode>): ... these new insns to
use smin/umin instead of VMINQ.
(mve_vmaxnmq_f<mode>): Use smax instead of VMAXNMQ_F.
(mve_vminnmq_f<mode>): Use smin instead of VMINNMQ_F.
* config/arm/vec-common.md (smin<mode>3): Use the new mode macros
ARM_HAVE_<MODE>_ARITH.
(umin<mode>3, smax<mode>3, umax<mode>3): Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/arm/simd/mve-vminmax_1.c: New test.
when processing assignments, we were using the type of b instead of type
of &b when computing a range. This was usually filtered out by FRE.
turning it off exposed it.
gcc/
PR tree-optimization/97520
* gimple-range.cc (range_of_non_trivial_assignment): Handle x = &a
by returning a non-zero range.
gcc/testsuite/
* gcc.dg/pr97520.c: New.
This patch enables MVE vmul instructions for auto-vectorization.
It includes MVE in expander mul<mode>3 to enable vectorization for MVE.
Related MVE vmul insns are modified to support the expander by using
expression 'mult' instead of unspec.
The mul<mode>3 for vectorization in vec-common.md uses mode iterator
VDQWH instead of VALLW to cover all supported modes.
The macros ARM_HAVE_NEON_<MODE>_ARITH are used to select supported
modes for different targets.
The redundant mul<mode>3 in neon.md is removed.
gcc/ChangeLog:
2020-10-22 Dennis Zhang <dennis.zhang@arm.com>
* config/arm/mve.md (mve_vmulq<mode>): New entry for vmul instruction
using expression 'mult'.
(mve_vmulq_f<mode>): Use mult instead of VMULQ_F.
* config/arm/neon.md (mul<mode>3): Removed.
* config/arm/vec-common.md (mul<mode>3): Use the new mode macros
ARM_HAVE_<MODE>_ARITH. Use mode iterator VDQWH instead of VALLW.
gcc/testsuite/ChangeLog:
* gcc.target/arm/simd/mve-vmul_1.c: New test.
Don't return UNDEFINED for a range in an unreachable block if the global
value evaluates to a constant. Return that constant instead.
PR tree-optimization/97515
* value-query.cc (range_query::value_of_expr): If the result is
UNDEFINED, check to see if the global value is a constant.
(range_query::value_on_edge): Ditto.
this patch makes builtin_constant_p hint to combine with other loop hints
we already support.
gcc/ChangeLog:
2020-10-22 Jan Hubicka <hubicka@ucw.cz>
PR ipa/97445
* ipa-inline.c (inline_insns_single): Add hint2 parameter.
(inline_insns_auto): Add hint2 parameter.
(can_inline_edge_by_limits_p): Update.
(want_inline_small_function_p): Update.
(wrapper_heuristics_may_apply): Update.
This patch enables the p9-lxvx-stxvx testcases with appropriate
requirements. It also adjusts the expected matching instructions
in the fold-vec-extract testcases for BE.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/fold-vec-extract-float.p9.c: rldicl and
subfic only for target LE.
* gcc.target/powerpc/fold-vec-extract-longlong.p9.c: xori only
for target LE. Adjust mfvsrd and add mfvsrld for BE.
* gcc.target/powerpc/fold-vec-extract-short.p9.c: vextuhrx for LE.
vextuhlx for BE.
* gcc.target/powerpc/p9-lxvx-stxvx-1.c: Remove target.
* gcc.target/powerpc/p9-lxvx-stxvx-2.c: Remove target.
* gcc.target/powerpc/p9-lxvx-stxvx-3.c: Remove target. Require
float128
The _M_add_ref_lock() and _M_add_ref_lock_nothrow() members of
_Sp_counted_base are very similar, except that the former throws an
exception when the use count is zero and the latter returns false. The
former (and its callers) can be implemented in terms of the latter.
This results in a small reduction in code size, because throwing an
exception now only happens in one place.
libstdc++-v3/ChangeLog:
* include/bits/shared_ptr.h (shared_ptr(const weak_ptr&, nothrow_t)):
Add noexcept.
* include/bits/shared_ptr_base.h (_Sp_counted_base::_M_add_ref_lock):
Remove specializations and just call _M_add_ref_lock_nothrow.
(__shared_count, __shared_ptr): Use nullptr for null pointer
constants.
(__shared_count(const __weak_count&)): Use _M_add_ref_lock_nothrow
instead of _M_add_ref_lock.
(__shared_count(const __weak_count&, nothrow_t)): Add noexcept.
(__shared_ptr::operator bool()): Add noexcept.
(__shared_ptr(const __weak_ptr&, nothrow_t)): Add noexcept.
PR97360 shows a problem in how we create our PXI and POI modes that cause
an ICE in the ranger pass. The problem seems to be that the extra call
to build_distinct_type_copy() also creates new TYPE_{MIN,MAX}_VALUEs that
are not compatible/the same as the base type itself. The simple "fix" is
to actually remove the unneeded build_distinct_type_copy(), since according
to richi, the types returned from make_unsigned_type() are already distinct.
gcc/
2020-10-21 Richard Biener <rguenther@suse.de>
PR target/97360
* config/rs6000/rs6000-call.c (rs6000_init_builtins): Remove call to
build_distinct_type_copy().
gcc/testsuite/
2020-10-21 Martin Liska <mliska@suse.cz>
PR target/97360
* gcc.target/powerpc/pr97360.c: New test.
Co-authored-by: Andrew MacLeod <amacleod@redhat.com>
Co-authored-by: Martin Liska <mliska@suse.cz>
This patch implements heuristics that increases inline limits (by the hints
mechanism) for inline functions that use builtin_constant_p on parameter. Those
are very likely intended to be always inlined and simplify after inlining.
The PR is about a function that we used to inline with
--param inline-insns-single=200 but with new default of 70 for -O2 we no longer
do so. Hints are currently configured to bump the bound up twice, so we
get limit of 140 that is still not enough to inline the particular testcase
but it should help in general. I can implement a stronger bump if that seems
useful (maybe it is). The example is bit operation written as a decision chain
with 64 conditions.
This blows up the limit on number of conditions we track per funtion (which is
30) and thus the size/time estimates are not working that well.
gcc/ChangeLog:
PR ipa/97445
* ipa-fnsummary.c (ipa_dump_hints): Add INLINE_HINT_builtin_constant_p.
(ipa_fn_summary::~ipa_fn_summary): Free builtin_constant_p_parms.
(ipa_fn_summary_t::duplicate): Duplicate builtin_constant_p_parms.
(ipa_dump_fn_summary): Dump builtin_constant_p_parms.
(add_builtin_constant_p_parm): New function
(set_cond_stmt_execution_predicate): Update builtin_constant_p_parms.
(ipa_call_context::estimate_size_and_time): Set
INLINE_HINT_builtin_constant_p..
(ipa_merge_fn_summary_after_inlining): Merge builtin_constant_p_parms.
(inline_read_section): Read builtin_constant_p_parms.
(ipa_fn_summary_write): Write builtin_constant_p_parms.
* ipa-fnsummary.h (enum ipa_hints_vals): Add
INLINE_HINT_builtin_constant_p.
* ipa-inline.c (want_inline_small_function_p): Use
INLINE_HINT_builtin_constant_p.
(edge_badness): Use INLINE_HINT_builtin_constant_p.
gcc/testsuite/ChangeLog:
PR ipa/97445
* gcc.dg/ipa/inlinehint-5.c: New test.
undef'ing LIB_SPEC and especially LINK_SPEC here is unneccesary and
inteferes with the definition of LINK_SPEC for the bi-arch'd ppc*-vx7r2
target which uses the linux64 LINK_SPEC
2020-10-21 Douglas Rupp <rupp@adacore.com>
gcc/
* config/vx-common.h (LINK_SPEC, LIB_SPEC): Remove #undef.
This change introduces support for the most recent versions
of VxWorks on PowerPC targets, for both 32 and 64 bit thanks
to a bi-arch setup.
The system compilers are essentially configured as Linux
toolchains with only a few specificities and we replicate
that model here.
The most visible specificities are the use of secureplt by
default, the pre-definition of some macros that the system
headers still rely on (_VX_CPU and _VX_CPU_FAMILY, for example),
and of course some variations related to the so VxWorks typical
kernel vs RTP mode distinction.
In addition to the introduction of config.gcc and libgcc
configuration chunks, much inspired by the linux ones, the
change
- Reworks rs6000/vxworks.h file to feature bits common to the
Vx6 and Vx7 port then a separate section for each, where the
Vx7 part is very short as we rely on the Linux definitions
for most things.
- Adjusts the CPU macro predefinitions in CPP_SPEC to resort
to "_VX_CPU" instead of "CPU" for Vx7, to better match the
more recent system headers expectations,
- Adds a cpu definition case for e6500.
- Changes to the use SUB3TARGET_OVERRIDE_OPTIONS instead of
SUBSUBTARGET_OVERRIDE_OPTIONS for specifics, so we don't
override the Linux's version of the latter for vx7.
2020-10-20 Douglas Rupp <rupp@adacore.com>
gcc/
* config.gcc (powerpc*-wrs-vxworks7r*): New case.
* config/rs6000/vxworks.h: Rework to handle VxWorks7.
Refactor as common bits + vx6 vs vx7 ones. For the
latter, rely essentially on the Linux configuration
and adjust CPU to _VX_CPU in CPP_SPEC. Add a case
for e6500. Use SUB3TARGET_OVERRIDE_OPTIONS for specifics
to preserve the Linux SUBSUBTARGET_OVERRIDE_OPTIONS
for vx7.
libgcc/
* config.host (powerpc*-wrs-vxworks7*): New case.
* configure.ac: Handle powerpc*-*-vxworks7* as
powerpc*-*-linux* for ppc-fp_type.
* configure: Regenerate.
Co-authored-by: Olivier Hainque <hainque@adacore.com>
The definition of ranges::subrange was moved to the new
<bits/ranges_util.h> header so that it could be used in <algorithm>
without including the whole of <ranges>. However, the tuple-like support
that enables subrange to be used with structured bindings was left in
<ranges>. This is arguably conforming (to use a subrange you should
include <ranges>) but it's inconvenient and probably confusing.
This change makes the tuple-like support available whenever subrange
itself is available.
libstdc++-v3/ChangeLog:
PR libstdc++/97512
* include/bits/ranges_util.h (tuple_size<subrange>)
(tuple_element<I, cv subrange>): Move here from ...
* include/std/ranges: ... here.
* testsuite/std/ranges/subrange/97512.cc: New test.
Inductions are not vectorized as cycle but materialized from SCEV data.
Filling in backedge SLP nodes confuses this process.
2020-10-21 Richard Biener <rguenther@suse.de>
PR tree-optimization/97500
* tree-vect-slp.c (vect_analyze_slp_backedges): Do not
fill backedges for inductions.
* gfortran.dg/pr97500.f90: New testcase.
While we have at the RTL level noce_try_ifelse_collapse combined with
simplify_cond_clz_ctz, that optimization doesn't always trigger because
e.g. on powerpc there is an define_insn to compare a reg against zero and
copy that register to another one and so we end up with a different pseudo
in the simplify_cond_clz_ctz test and punt.
For targets that define C?Z_DEFINED_VALUE_AT_ZERO to 2 for certain modes,
we can optimize it already in phiopt though, just need to ensure that
we transform the __builtin_c?z* calls into .C?Z ifns because my recent
VRP changes codified that the builtin calls are always undefined at zero,
while ifns honor C?Z_DEFINED_VALUE_AT_ZERO equal to 2.
And, in phiopt we already have popcount handling that does pretty much the
same thing, except for always using a zero value rather than the one set
by C?Z_DEFINED_VALUE_AT_ZERO.
So, this patch extends that function to handle not just popcount, but also
clz and ctz.
2020-10-21 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/97503
* tree-ssa-phiopt.c: Include internal-fn.h.
(cond_removal_in_popcount_pattern): Rename to ...
(cond_removal_in_popcount_clz_ctz_pattern): ... this. Handle not just
popcount, but also clz and ctz if it has C?Z_DEFINED_VALUE_AT_ZERO 2.
* gcc.dg/tree-ssa/pr97503.c: New test.
This simplifies the maps between original and new basic blocks and
loops as used for CFG copying. Instead of using a pointer hash
table to allocated mapping entries use a hash_map with int_hash,
removing the indirection and code duplication. We can use -1 and
-2 as empty/deleted values as those are not valid basic-block
indices or loop numbers.
2020-10-21 Richard Biener <rguenther@suse.de>
* cfg.c (htab_bb_copy_original_entry): Remove.
(bb_copy_hasher): Likewise.
(bb_original, bb_copy, loop_copy): Use
hash_map<int_hash<int, -1, -2>, int>.
(original_copy_bb_pool): Remove.
(initialize_original_copy_tables): Adjust.
(reset_original_copy_tables): Likewise.
(free_original_copy_tables): Likewise.
(original_copy_tables_initialized_p): Likewise.
(copy_original_table_clear): Simplify.
(copy_original_table_set): Likewise.
(get_bb_original): Likewise.
(get_bb_copy): Likewise.
(get_loop_copy): Likewise.
This separates out a loop finding new_edges from edges in copy_bbs,
making its complexity cheaper overall from total number of succs in
copied bbs times num_edges to num_edges times the complexity of
find_edge.
2020-10-21 Richard Biener <rguenther@suse.de>
* cfghooks.c (copy_bbs): Split out loop computing new_edges.
Invariants returned from SCEV can have TREE_OVERFLOW set. Clear the
overflow as we do with the rest of the values returned from this
function.
gcc/ChangeLog:
* gimple-range.cc (gimple_ranger::range_of_ssa_name_with_loop_info):
Remove TREE_OVERFLOW special case.
* vr-values.c (bounds_of_var_in_loop): Adjust overflow for
invariants.
> the patch also breaks bootstrap on both i386-pc-solaris2.11 and
> sparc-sun-solaris2.11:
>
> /vol/gcc/src/hg/master/local/libgomp/env.c: In function 'initialize_env':
> /vol/gcc/src/hg/master/local/libgomp/env.c:414:16: error: 'new_offload' may be used uninitialized in this function [-Werror=maybe-uninitialized]
> 414 | *offload = new_offload;
> | ~~~~~~~~~^~~~~~~~~~~~~
> /vol/gcc/src/hg/master/local/libgomp/env.c:384:30: note: 'new_offload' was declared here
> 384 | enum gomp_target_offload_t new_offload;
> | ^~~~~~~~~~~
I can't reproduce that, but I fail to see why we need two separate
variables, one with actual value and one tracking if the value is valid.
So, I'm going with:
2020-10-21 Jakub Jelinek <jakub@redhat.com>
* env.c (parse_target_offload): Change new_offload var type to int,
preinitialize to -1, remove found var and test new_offload != -1
instead of found.
This was slated to be moved last year, as its only use is in tree-vrp.c
There are no functional changes. It's just a move and a rename.
gcc/ChangeLog:
* vr-values.h: Remove simplify_cond_using_ranges_2.
(range_fits_type_p): New.
* vr-values.c (range_fits_type_p): Remove static qualifier.
(vrp_simplify_cond_using_ranges): Move...
* tree-vrp.c (vrp_simplify_cond_using_ranges): ...to here.
Do not crash when AsanThread::GetStackVariableShadowStart does not find
a variable for a pointer on a shadow stack.
Cherry-pick from ad2be02a833e56f7fe280797280b219eb3312621.
Differential Revision: https://reviews.llvm.org/D89552
gcc/ada/
* sem_ch12.adb (Freeze_Subprogram_Body): Do not move the freeze
node of the package body enclosing the instance when its parent
is in the same declarative part as the freeze node of the parent.
gcc/ada/
* exp_ch6.adb (Insert_Post_Call_Actions): When a function's
result type requires finalization and we decide to make copy of
a call to the function and subsequently refer only to the copy,
then don't forget to finalize the original function result
object.
gcc/ada/
* set_targ.adb (DTN): Fix oversight.
(Read_Target_Dependent_Values): Do not error out on missing
Long_Long_Long_Size entry and reuse Long_Long_Size for it.
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