Final check on PCI options; for Darwin these are not dependent on the PIE
ones, although PIE does require PIC to support it. Specifically, for Darwin,
"fPIC fno-PIE" should result in the same as "-fno-PIE -fPIC".
2019-07-07 Iain Sandoe <iain@sandoe.co.uk>
* config/darwin.c (darwin_override_options): Make a final check on PIC
options.
From-SVN: r273181
For PPC Darwin, we need the JBSR long jump code to be enabled when generating
kernel code. Now we have that handled in rs6000.c, we can drop the conflated
setting in the common code. Symbol stubs are not generated for any X86 case.
2019-07-07 Iain Sandoe <iain@sandoe.co.uk>
* config/darwin.c (darwin_override_options): Don't jam symbol stubs
on for kernel code.
From-SVN: r273180
2019-07-07 Paul Thomas <pault@gcc.gnu.org>
PR fortran/91077
* trans-array.c (gfc_conv_scalarized_array_ref) Delete code
that gave symbol backend decl for subref arrays and deferred
length variables.
2019-07-07 Paul Thomas <pault@gcc.gnu.org>
PR fortran/91077
* gfortran.dg/pointer_array_11.f90 : New test.
From-SVN: r273176
PR91068 is a case in which we have (ignoring non-LRA alternatives):
[(set (match_operand:SI 0 "register_operand" "=l,d?")
(plus:SI (mult:SI (match_operand:SI 1 "register_operand" "d,d")
(match_operand:SI 2 "register_operand" "d,d"))
(match_operand:SI 3 "register_operand" "0,d")))
(clobber (match_scratch:SI 4 "=X,l"))
(clobber (match_scratch:SI 5 "=X,&d"))]
where the first alternative is one instruction but the second is two.
This is very similar to the case that my recent IRA patches were
supposed to help. The crucial difference is that the cheap
alternative requires a single-register class while the expensive
alternative uses general registers.
This makes a difference when one of operand 0 or 3 can naturally be
allocated to LO but the other can't. If IRA makes that allocation,
both alternatives require one reload of equal cost and so the first
alternative clearly wins.
However, if we say that tying operands 0 and 3 saves the cost of a full
move, then all other things being equal, IRA will prefer to allocate
both registers to the same GPR. The registers will then naturally
fit the second alternative.
This has a more drastic effect in the MIPS case than it should because
using the GPR alternative is much more expensive there than it appears
to the RA. But that's really a separate problem and something we were
able to live with before my IRA patch.
What makes tying less useful here is the fact that the tied register is
a single-register class. I think in those circumstances it's better not
to use tied operands at all and instead use "l" for the inputs.
Allocating the input to LO, and allocating the output to LO, then depend
naturally on class costs. If we decide to allocate at least one of them
to LO, we'll use the cheap alternative, otherwise we'll (correctly) use
the expensive alternative. This effectively restores the situation
before my IRA patch, but this time making the preference on the input
register more explicit.
I originally wrote the patterns in the early days of IRA, and certainly
well before LRA. I think they were largely influened by reload rather
than RA proper (see the comment above *mul_acc_si, which is all about
the reload behaviour). LRA copes with the two-"l" case just fine.
The patch may well cause problems for -mno-lra, but I think we should
cull that option anyway.
2019-07-07 Richard Sandiford <richard.sandiford@arm.com>
gcc/
PR target/91068
* config/mips/mips.md (*mul_acc_si, *mul_acc_si_r3900, *macc)
(*msac, *msac_using_macc, *mul_sub_si): Use "l" for input operands
instead of matching them to "l" output operands.
From-SVN: r273175
While testing the fix for PR91068, I hit an rtl checking failure
while building newlib. mips_split_move was decomposing an address that
happened to be symbolic and then tried to access the REGNO of the base
register field, which wasn't initialised but which by chance pointed to
valid memory.
2019-07-07 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/mips/mips.c (mips_split_move): Zero-initialize addr
and check whether addr.reg is nonnull before using it.
From-SVN: r273174
* omp-low.c (lower_rec_input_clauses): For lastprivate clauses in
ctx->for_simd_scan_phase simd copy the outer var to the privatized
variable(s). For conditional lastprivate look through outer
GIMPLE_OMP_SCAN context.
(lower_omp_1): For conditional lastprivate look through outer
GIMPLE_OMP_SCAN context.
* testsuite/libgomp.c/scan-19.c: New test.
* testsuite/libgomp.c/scan-20.c: New test.
From-SVN: r273169
* omp-low.c (struct omp_context): Rename combined_into_simd_safelen0
member to combined_into_simd_safelen1.
(lower_rec_input_clauses, lower_omp_1): Adjust uses.
(lower_lastprivate_clauses): Likewise. For conditional lastprivate
clauses if ctx->combined_into_simd_safelen1 put statements after the
predicate conditionalized block rather than into it.
From-SVN: r273168
This patch is part of a series that fixes ambiguous attribute
uses in .md files, i.e. cases in which attributes didn't use
<ITER:ATTR> to specify an iterator, and in which <ATTR> could
have different values depending on the iterator chosen.
The vx-builtins.md part changes the choice of <mode> from the
implicit <VFCMP:mode> to an explicit <VF_HW:mode> (i.e. from the
mode of the comparison result to the mode of the operands being
compared). That seemed like the intended behaviour given later
patterns like vec_cmpeq<mode>_cc.
The use of BFP in the s390.md LNDFR pattern looks like a typo,
since the operand to (abs ...) has to have the same mode as the result.
The only effect before this series was to create some extra variants
that would never match, making it harmless apart from very minor code
bloat.
2019-07-06 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/s390/s390.md (*negabs<FP:mode>2_nocc): Use FP for
operand 1.
* config/s390/vx-builtins.md (*vec_cmp<insn_cmp><mode>_cconly):
Make the choice of <mode> explicit, giving...
(*vec_cmp<insn_cmp><VF_HW:mode>_cconly): ...this.
From-SVN: r273162
This patch is part of a series that fixes ambiguous attribute
uses in .md files, i.e. cases in which attributes didn't use
<ITER:ATTR> to specify an iterator, and in which <ATTR> could
have different values depending on the iterator chosen.
No behavioural change except for dropping the unused *andnot<mode>3_bcst
permutations.
2019-07-06 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/i386/i386.md (*fop_<X87MODEF:mode>_3_i387)
(l<rounding_insn><MODEF:mode><SWI48:mode>2): Fix ambiguous uses
of .md attributes.
* config/i386/sse.md (*avx512pf_gatherpf<mode>sf_mask)
(*avx512pf_gatherpf<mode>df_mask, *avx512pf_scatterpf<mode>sf_mask)
(*avx512pf_scatterpf<mode>df_mask, *avx2_gathersi<mode>)
(*avx2_gathersi<mode>_2, *avx2_gatherdi<mode>)
(*avx2_gatherdi<mode>_2, *avx2_gatherdi<mode>_3): Likewise.
(*avx2_gatherdi<mode>_4, *avx512f_gathersi<mode>): Likewise.
(*avx512f_gathersi<mode>_2, *avx512f_gatherdi<mode>): Likewise.
(*avx512f_gatherdi<mode>_2, *avx512f_scattersi<mode>): Likewise.
(*avx512f_scatterdi<mode>): Likewise.
(*andnot<mode>3_bcst): Fix VI/VI48_AVX512VL typo.
From-SVN: r273161
This patch is part of a series that fixes ambiguous attribute
uses in .md files, i.e. cases in which attributes didn't use
<ITER:ATTR> to specify an iterator, and in which <ATTR> could
have different values depending on the iterator chosen.
No behavioural change -- produces the same code as before.
2019-07-06 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/h8300/h8300.md (*push1_h8300hs_<mode>): Explicitly
specify the mode iterator referenced by <mode>, giving...
(*push1_h8300hs_<QHI:mode>): ...this.
From-SVN: r273160
This patch is part of a series that fixes ambiguous attribute
uses in .md files, i.e. cases in which attributes didn't use
<ITER:ATTR> to specify an iterator, and in which <ATTR> could
have different values depending on the iterator chosen.
I think this is a genuine bugfix for the case in which the 1REG_MODE
and 1REG_ALT are different, since previously we would use the 1REG_MODE
for both the comparison and the select, even though the operands being
compared are 1REG_ALT rather than 1REG_MODE.
2019-07-06 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/gcn/gcn-valu.md
(vcond<VEC_1REG_MODE:mode><VEC_1REG_ALT:mode>): Use
gen_vec_cmp<VEC_1REG_ALT:mode>di rather than (implicitly)
gen_vec_cmp<VEC_1REG_MODE:mode>di. Explicitly use
gen_vcond_mask_<VEC_1REG_MODE:mode>di.
(vcond<VEC_1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Likewise,
but using the _exec comparison patterns.
(vcondu<VEC_1REG_INT_MODE:mode><VEC_1REG_INT_ALT:mode>): Use
gen_vec_cmp<VEC_1REG_INT_ALT:mode>di rather than (implicitly)
gen_vec_cmp<VEC_1REG_INT_MODE:mode>di. Explicitly use
gen_vcond_mask_<VEC_1REG_INT_MODE:mode>di.
(vcondu<VEC_1REG_INT_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Likewise,
but using the _exec comparison patterns.
From-SVN: r273159
This patch is part of a series that fixes ambiguous attribute
uses in .md files, i.e. cases in which attributes didn't use
<ITER:ATTR> to specify an iterator, and in which <ATTR> could
have different values depending on the iterator chosen.
I think this is a genuine bugfix for Thumb-1, since previously the
LDREX width was taken from the SImode success result rather than the
memory mode:
-#define HAVE_atomic_compare_and_swapt1qi_1 ((TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))
-#define HAVE_atomic_compare_and_swapt1hi_1 ((TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))
-#define HAVE_atomic_compare_and_swapt1di_1 ((TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))
+#define HAVE_atomic_compare_and_swapt1qi_1 ((TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))
+#define HAVE_atomic_compare_and_swapt1hi_1 ((TARGET_HAVE_LDREXBH && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))
+#define HAVE_atomic_compare_and_swapt1di_1 ((TARGET_HAVE_LDREXD && ARM_DOUBLEWORD_ALIGN \
+ && TARGET_HAVE_MEMORY_BARRIER) && (TARGET_THUMB1))
The same goes for the predicate and constraints in
@atomic_compare_and_swapt1di_1, which previously used the
SI values from the success result.
2019-07-06 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/arm/sync.md
(@atomic_compare_and_swap<CCSI:arch><NARROW:mode>_1): Use
<NARROW:sync_predtab> instead of (implicitly) <CCSI:sync_predtab>.
(@atomic_compare_and_swap<CCSI:arch><SIDI:mode>_1): Likewise
<SIDI:sync_predtab>. Use <SIDI:cas_cmp_operand> and
<SIDI:cas_cmp_str>.
From-SVN: r273158
* omp-low.c (struct omp_context): Add for_simd_scan_phase member.
(maybe_lookup_ctx): Add forward declaration.
(omp_find_scan): Likewise. Walk into body of simd if composited
with worksharing loop.
(scan_omp_simd_scan): New function.
(scan_omp_1_stmt): Call it.
(lower_rec_simd_input_clauses): Don't create rvar nor rvar2 if
ctx->for_simd_scan_phase.
(lower_rec_input_clauses): Do much less work for inscan reductions
in ctx->for_simd_scan_phase is_simd regions.
(lower_omp_scan): Set is_simd also on simd constructs composited
with worksharing loop, unless ctx->for_simd_scan_phase. Never emit
a sorry message. Don't change GIMPLE_OMP_SCAN stmts into nops and
emit their body after in simd constructs composited with worksharing
loop.
(lower_omp_for_scan): Handle worksharing loop composited with simd.
* c-c++-common/gomp/scan-4.c: Don't expect sorry message.
* testsuite/libgomp.c/scan-11.c: New test.
* testsuite/libgomp.c/scan-12.c: New test.
* testsuite/libgomp.c/scan-13.c: New test.
* testsuite/libgomp.c/scan-14.c: New test.
* testsuite/libgomp.c/scan-15.c: New test.
* testsuite/libgomp.c/scan-16.c: New test.
* testsuite/libgomp.c/scan-17.c: New test.
* testsuite/libgomp.c/scan-18.c: New test.
* testsuite/libgomp.c++/scan-9.C: New test.
* testsuite/libgomp.c++/scan-10.C: New test.
* testsuite/libgomp.c++/scan-11.C: New test.
* testsuite/libgomp.c++/scan-12.C: New test.
* testsuite/libgomp.c++/scan-13.C: New test.
* testsuite/libgomp.c++/scan-14.C: New test.
* testsuite/libgomp.c++/scan-15.C: New test.
* testsuite/libgomp.c++/scan-16.C: New test.
From-SVN: r273157
PR tree-optimization/91096
* gcc.dg/vect/vect-simd-10.c (FLT_MIN_VALUE): Define.
(bar, main): Use it instead of -__builtin_inff ().
* gcc.dg/vect/vect-simd-14.c (FLT_MIN_VALUE): Define.
(bar, main): Use it instead of -__builtin_inff ().
From-SVN: r273156
* omp-low.c (omp_find_scan): Make static.
(lower_omp_for_scan): Fix order of merge arguments in input phase of
the second loop, var2 represents the first partial sum and so needs
to go before rprivb[ivar].
From-SVN: r273155
TARGET_LINK_STACK is unused on Darwin, and only relevant to a processor on
which the port was never released.
2019-07-05 Iain Sandoe <iain@sandoe.co.uk>
* config/rs6000/rs6000-logue.c: Remove unused code.
From-SVN: r273148
Because the inline versions of __exchange_and_add and __atomic_add are
also marked static, they cannot be used from templates or other inline
functions without ODR violations. This change gives them external
linkage, but adds the always_inline attribute.
* include/ext/atomicity.h [_GLIBCXX_ATOMIC_BUILTINS] (__atomic_add)
(__exchange_and_add): Replace static specifier with always_inline
attribute.
(__exchange_and_add_single, __atomic_add_single): Likewise.
(__exchange_and_add_dispatch, __atomic_add_dispatch): Likewise. Also
combine !__gthread_active_p() and !__GTHREADS branches.
From-SVN: r273144
DR 1813
PR c++/83374 - __is_standard_layout wrong for a class with repeated bases.
* class.c (check_bases): Set CLASSTYPE_NON_STD_LAYOUT for a class if
CLASSTYPE_REPEATED_BASE_P is true.
* g++.dg/ext/is_std_layout3.C: New test.
* g++.dg/ext/is_std_layout4.C: New test.
From-SVN: r273139
gcc/
2019-07-05 Sam Tebbs <sam.tebbs@arm.com>
PR target/90712
* aarch64/aarch64.c (aarch64_post_cfi_startproc): Replace thunk check
with a frame laid out check.
From-SVN: r273138
2019-07-05 Richard Biener <rguenther@suse.de>
* tree-ssa-sccvn.c (vn_reference_lookup_3): Valueize RHS
when comparing against a store with possibly the same value.
* gcc.dg/tree-ssa/ssa-fre-77.c: New testcase.
From-SVN: r273136
2019-07-05 Richard Biener <rguenther@suse.de>
PR tree-optimization/91091
* tree-ssa-sccvn.c (vn_reference_lookup_3): Overlap of
accesses can happen with -fno-strict-aliasing.
* gcc.dg/tree-ssa/pr91091-1.c: New testcase.
* gcc.dg/tree-ssa/ssa-fre-61.c: Adjust.
From-SVN: r273134
* tree-ssa-alias.c (alias_stats): Add
nonoverlapping_component_refs_since_match_p_must_overlap.
(dump_alias_stats): Print it.
(nonoverlapping_component_refs_since_match_p): Add early exit.
(nonoverlapping_component_refs_p): Do not account early exit.
From-SVN: r273133
* except.c (emit_to_new_bb_before): Make sure to put a location on SEQ.
* tree-eh.c (replace_goto_queue_1) <GIMPLE_GOTO>: Propagate location.
(emit_eh_dispatch): Delete.
(lower_catch): Emit the eh_dispatch manually and set the location of
the first catch statement onto it.
(lower_eh_filter): Emit the eh_dispatch manually and set location.
(lower_eh_dispatch): Propagate location.
* tree-outof-ssa.c (set_location_for_edge): Handle EH edges specially.
(eliminate_build): Likewise.
From-SVN: r273132
* tree-cfg.c (gimple_make_forwarder_block): Propagate location info on
phi nodes if possible.
* tree-scalar-evolution.c (final_value_replacement_loop): Propagate
location info on the newly created statement.
* tree-ssa-loop-manip.c (create_iv): Propagate location info on the
newly created increment if needed.
From-SVN: r273131
This patch fixes an issue whereby anonymous access result types were
treated as having the same accessibility level as typed results instead
of having the level determined by the "master of the call" as per RM
3.10.2 (10).
------------
-- Source --
------------
-- main.adb
with Pack_12; use Pack_12;
with Pack_05; use Pack_05;
procedure Main is
Obj : aliased Integer;
begin
Test_Alloc
(new Rec_T'(Disc => Id_A (Obj'Access))); -- OK
Id_A (Obj'Access).all := 0; -- OK
Id_B (Obj'Access).all := 0; -- OK
Id_C (Obj'Access).all := 0; -- ERROR
end Main;
-- pack_12.ads
pragma Ada_2012;
with Ada.Unchecked_Conversion;
package Pack_12 is
function Id_A (I : access Integer)
return access Integer
is (I);
type Obj_Ptr is access all Integer;
function Id_C (I : access Integer)
return Obj_Ptr
is (I.all'Access);
type Rec_T (Disc : access Integer) is null record;
procedure Test_Alloc (Access_Param : access Rec_T);
end Pack_12;
-- pack_12.adb
package body Pack_12 is
Dummy : Integer;
procedure Test_Alloc (Access_Param : access Rec_T) is
begin
Dummy := Access_Param.Disc.all;
end Test_Alloc;
end Pack_12;
-- pack_05.ads
pragma Ada_2005;
with Pack_12; use Pack_12;
package Pack_05 is
function Id_B (I : access Integer)
return access Integer
renames Id_A;
end Pack_05;
-----------------
-- Compilation --
-----------------
$ gnatmake -q main.adb
$ main
raised PROGRAM_ERROR : pack_12.ads:14 accessibility check failed
2019-07-05 Justin Squirek <squirek@adacore.com>
gcc/ada/
* checks.adb (Apply_Accessibility_Check): Add logic to fetch the
function result accessibility level if one is required within
the generated check.
* exp_ch6.adb (Needs_Result_Accessibility_Level): Modify
controlling elsif block to handle more cases such as anonymous
access results and disable checking for coextensions.
From-SVN: r273130
This patch fixes a "Compilation abandoned" message in a compiler built
with assertions, or a compiler loop otherwise, when an accept statement
contains an illegal accept statement for the same entry.
Compiling accept_in_accept.adb must yield:
accept_in_accept.adb:12:13:
duplicate accept statement for same entry (RM 9.5.2 (15))
----
procedure accept_in_accept is
task a_in_a is
entry a (i : Integer);
end a_in_a;
task body a_in_a is
begin
select
accept a (i : Integer) do
null;
accept a (i : integer) do
null;
end a;
end a;
or
terminate;
end select;
end a_in_a;
begin
a_in_a.a (1);
end accept_in_accept;
2019-07-05 Ed Schonberg <schonberg@adacore.com>
gcc/ada/
* sem_ch9.adb (Analyze_Accept_Statement): If this is an illegal
accept statement for an enclosing entry abandon analysis to
prevent scope mismatches and potential infinite loops in
compiler.
From-SVN: r273129
This patch introduces several changes to the new elaboration order
mechanism:
* Instantiations processed in the context of invocation graph
encoding now yield a relation which is later transformed into an
invocation edge. This ensures that the unit where the instantiation
resides properly depends on the unit where the body of the generic
is.
* The diagnostics of cycles that involve invocation edges now use a
set to avoid infinite recursion when visiting paths that represent
recursive code.
* Various diagnostics that suggest the use of switches have been
updated to indicate which tool the switches apply to.
* Bindo can now output the dependencies of various units that specify
why a predecessor unit must be elaborated prior to a successor
unit. This functionality implements binder switch -e (output
complete list of elaboration order dependencies).
* The output of the elaboration order is now identical to that
emitted by Binde.
* The nature of the invocation graph encoding is now recorded in the
ALI record rather than the Unit record of a unit. This ensures that
both the spec and body share the same encoding kind.
* A section on debugging elaboration order issues is now available in
Bindo.
2019-07-05 Hristian Kirtchev <kirtchev@adacore.com>
gcc/ada/
* ali.adb (For_Each_Invocation_Construct,
For_Each_Invocation_Relation): New version.
(Scan_ALI): Initialize field Invocation_Graph_Encoding.
(Set_Invocation_Graph_Encoding): Update the setting of the
invocation graph encoding.
* ali.ads: Move field Invocation_Graph_Encoding from Unit_Record
to ALI_Record because the encoding applies to the whole ALI,
rather than one of the units (spec or body) for which the ALI
file was created.
(For_Each_Invocation_Construct, For_Each_Invocation_Relation):
New version.
* bindo.adb: Update the section on switches. Complete the
section of debugging elaboration order issues.
(Find_Elaboration_Order): Prepare the routine for the switch
from the old to the new elaboration order mechanism.
* bindo-diagnostics.adb (Find_And_Output_Invocation_Paths):
Manage a visited set used by Visit_Vertex.
(Output_All_Cycles_Suggestions,
Output_Dynamic_Model_Suggestions): Clarify the nature of the
suggested switch.
(Output_Elaborate_Body_Transition): Update the diagnostic to
emit a better message.
(Output_Forced_Suggestions, Output_Full_Encoding_Suggestions):
Clarify the nature of the suggested switch.
(Visit_Vertex): Update the parameter profile to add a set of
invokers visited during the transition. This set prevents
infinite exploration of the graph in case the invocations are
recursive.
* bindo-elaborators.adb: Add a use clause for
Bindo.Writers.Dependency_Writers.
(Elaborate_Units_Common): Output the library graph after it has
been augmented with invocation edges. Output just the components
instead of outputting the whole library graph again.
(Elaborate_Units_Dynamic, Elaborate_Units_Static): Output the
dependencies as expressed in the library graph.
* bindo-units.adb (Invocation_Graph_Encoding): Update the
extraction of the invocation graph encoding.
* bindo-writers.adb: Add with and use clauses for Binderr and
Butil.
(palgc, plgc): New debug routine.
(Write_Components): Moved to the spec. Add a header for the
output.
(Write_Dependencies, Write_Dependencies_Of_Vertex,
Write_Dependency_Edge): New routine.
(Write_Elaboration_Order): Update the logic to follow the format
of Binde's order output.
(Write_Library_Graph): Do not output the components every time
the graph is written.
(Write_Unit): Output the invocation graph encoding of the unit.
Output the invocation constructs and relations for the unit
only.
* bindo-writers.ads (Write_Components): Moved from the body.
(Write_Dependencies): New routine.
* bindusg.adb: Prepare the routine for the switch from the old
to the new elaboration order mechanism.
* debug.adb: Binder switch -d_O is now not associated with any
functionality.
* einfo.adb (Is_Elaboration_Target): The attribute applies to
packages, as specified by the comment on the attribute usage.
* opt.ads: Add a global flag which controls the choice between
the new and the legacy elaboration order mechanism.
* sem_elab.adb: Add Package_Target to type Target_Kind.
(Build_Elaborate_Body_Procedure, Build_Elaborate_Procedure,
Build_Elaborate_Spec_Procedure, Check_Elaboration_Scenarios,
Check_SPARK_Model_In_Effect): Use Main_Unit_Entity to obtain the
entity of the main unit.
(Create_Package_Rep): New routine.
(Create_Target_Rep): Add processing for packages.
(Declaration_Placement_Of_Node, Has_Prior_Elaboration): Use
Main_Unit_Entity to obtain the entity of the main
unit.
(Invocation_Graph_Recording_OK): Prepare the routine for the
switch from the old to the new elaboration order mechanism.
(Main_Unit_Entity): New routine.
(Meet_Elaboration_Requirement,
Process_Conditional_ABE_Variable_Reference): Use
Main_Unit_Entity to obtain the entity of the main unit.
(Process_Invocation_Instantiation): New routine.
(Process_Invocation_Scenario): Add processing for
instantiations.
* switch-b.adb (Scan_Binder_Switches): Prepare the routine for
the switch from the old to the new elaboration order mechanism.
From-SVN: r273128
This change removes the warnings returned when using Ada.Text_IO library
in SPARK. An abstract state and global contracts were added to modelize
the action of Text_IO procedures and function on the memory and the
files.
2019-07-05 Joffrey Huguet <huguet@adacore.com>
gcc/ada/
* libgnat/a-textio.adb: Add abstract state refinment.
* libgnat/a-textio.ads: Add File_System abstract state. Add
global contracts, contract cases, preconditions and
postconditions to procedures and functions.
(Set_Input, Set_Output, Set_Error, Standard_Input,
Standard_Output, Standard_Error, Current_Input, Current_Output,
Current_Error): Turn SPARK_Mode off.
(Get_Line): Turn SPARK_Mode off on Get_Line functions.
* libgnat/a-tideio.ads, libgnat/a-tienio.ads,
libgnat/a-tifiio.ads, libgnat/a-tiflio.ads,
libgnat/a-tiinio.ads, libgnat/a-timoio.ads: Add global
contracts, contract cases, preconditions and postconditions to
procedures and functions.
From-SVN: r273127
2019-07-05 Arnaud Charlet <charlet@adacore.com>
gcc/ada/
* doc/gnat_ugn/platform_specific_information.rst: Refresh doc on
installing from the command line on Windows. Remove obsolete
part.
* gnat_ugn.texi: Regenerate.
From-SVN: r273126
This fixes an issue introduced in Ada 2012 for calls to functions taking
an In/Out parameter and for which the actual is the component of a
packed array. In this case, the front-end needs to create a temporary
for the actual, initialize it before the call and assign it back after
it, because operations on bit-packed arrays are converted into
mask-and-shift sequences.
2019-07-05 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* exp_ch4.adb (Expand_N_Indexed_Component): Do not expand actual
parameters of function calls here either.
gcc/testsuite/
* gnat.dg/pack23.adb, gnat.dg/pack23_pkg.ads: New testcase.
From-SVN: r273124
2019-07-05 Ed Schonberg <schonberg@adacore.com>
gcc/ada/
* sem_ch13.adb (Build_Predicate_Functions): If a subtype that
carries a static predicate aspect is frozen immediately after
its declaration, ensure that the generated function body created
for predicate checking is inserted after the corresponding
subprogram declaration, which is created at the point the
declaration is elaborated.
From-SVN: r273122
This patch modifies the generation of task deallocation code to examine
the underlying type for task components.
2019-07-05 Hristian Kirtchev <kirtchev@adacore.com>
gcc/ada/
* exp_ch7.adb (Cleanup_Record): Use the underlying type when
checking for components with tasks.
gcc/testsuite/
* gnat.dg/task3.adb, gnat.dg/task3.ads, gnat.dg/task3_pkg1.ads,
gnat.dg/task3_pkg2.ads: New testcase.
From-SVN: r273121
This patch adds an explicit range check on an assignment to a component
of a bit-packed array, when the index type of the array is an
enumeration type with a non-standard representation,
Executing the following:
gnatmake -f -gnata -q main
./main
must yield:
1 is invalid
4097 is invalid
4116 is invalid
4117 is invalid
4118 is invalid
4119 is invalid
4120 is invalid
4121 is invalid
----
with Example; use Example;
with My_Types; use My_Types;
with Text_IO; use Text_IO;
procedure main is
begin
--We try to access an invalid array location.
begin
dummy(idx => 1, action => DISABLE);
exception
when others => Text_IO.Put_Line ("1 is invalid");
end;
for I in typ_uint32'(16#1000#) .. 16#101E# loop
declare
begin
-- Text_IO.Put_Line (typ_uint32'image(I) & " OK");
Dummy (Idx => I, action => Enable);
exception
when others => put_line (typ_uint32'Image (I) & " is invalid");
end;
end loop;
end;
----
with Interfaces; use Interfaces;
package My_Types is
subtype typ_bool is boolean;
type typ_uint32 is new Interfaces.Unsigned_32;
subtype typ_uint16 is typ_uint32 range 0..2**16 - 1;
type typ_dis_en is ( DISABLE, ENABLE );
for typ_dis_en'size use 32;
for typ_dis_en use ( DISABLE => 0, ENABLE => 1 );
type typ_rid is
(
RID_0,
RID_2,
RID_3,
RID_4,
RID_5,
RID_6,
RID_7,
RID_8,
RID_9,
RID_10,
RID_11,
RID_12,
RID_13,
RID_14,
RID_15,
RID_16,
RID_17,
RID_18,
RID_19,
RID_26,
RID_27,
RID_28,
RID_29,
RID_30
);
for typ_rid use
(
RID_0 => 16#1000#,
RID_2 => 16#1002#,
RID_3 => 16#1003#,
RID_4 => 16#1004#,
RID_5 => 16#1005#,
RID_6 => 16#1006#,
RID_7 => 16#1007#,
RID_8 => 16#1008#,
RID_9 => 16#1009#,
RID_10 => 16#100A#,
RID_11 => 16#100B#,
RID_12 => 16#100C#,
RID_13 => 16#100D#,
RID_14 => 16#100E#,
RID_15 => 16#100F#,
RID_16 => 16#1010#,
RID_17 => 16#1011#,
RID_18 => 16#1012#,
RID_19 => 16#1013#,
RID_26 => 16#101A#,
RID_27 => 16#101B#,
RID_28 => 16#101C#,
RID_29 => 16#101D#,
RID_30 => 16#101E#
);
for typ_rid'size use 16;
end My_Types;
----
with My_Types;
package Example is
procedure Check;
procedure dummy
(
idx : in My_Types.typ_uint32;
action : in My_Types.typ_dis_en
);
end Example;
----
with Text_IO; use Text_IO;
with Unchecked_Conversion;
with my_types; use my_types;
package body Example is
type typ_rid_sts is array (My_Types.typ_rid)
of My_Types.typ_bool;
for typ_rid_sts'component_size use 1;
is_rid_en : typ_rid_sts :=
(TRUE, false, True, False, true, False, True, false, True, False,
TRUE, false, True, False, true, False, True, false, True, False,
TRUE, false, True, False);
procedure Check is
begin
pragma Assert (for all I in is_rid_en'range => is_rid_en (I));
end Check;
function toRidEvt is new Unchecked_Conversion
(
-- Defining source and target types
source => My_Types.typ_uint16,
target => My_Types.typ_rid
);
procedure dummy (
idx : in My_Types.typ_uint32;
action : in My_Types.typ_dis_en)
is
rid_evt : My_Types.typ_rid;
begin
rid_evt := toRidEvt(idx);
if action = My_Types.ENABLE
then
is_rid_en(rid_evt) := TRUE;
else
is_rid_en(rid_evt) := FALSE;
end if;
end dummy;
end Example;
2019-07-05 Ed Schonberg <schonberg@adacore.com>
gcc/ada/
* exp_pakd.adb (Expand_Bit_Packed_Element_Set): Add explicit
range checks when the index type of the bit-packed array is an
enumeration type with a non-standard representation,
From-SVN: r273119
This patch includes delay statements in the set of control flow
statements since their expressions may have side effects, which in turn
may affect an infinite recursion.
2019-07-05 Hristian Kirtchev <kirtchev@adacore.com>
gcc/ada/
* sem_res.adb (Is_Control_Flow_Statement): Delay statements
contain an expression, which in turn may have side effects and
affect the infinite recursion. As a result, delay statements
should not be treated specially.
From-SVN: r273118
This patch reimplements the detection of trivial infinite recursion to
remove the implicit assumptions concenring the structure and contents of
the enclosing subprogram statements.
------------
-- Source --
------------
-- infinite.adb
procedure Infinite with SPARK_Mode is
function Func_1 (Val : Integer) return Integer;
function Func_2 (Val : Integer) return Integer;
function Func_3 (Val : Integer) return Integer;
function Func_4 (Val : Integer) return Integer;
function Func_5 (Val : Integer) return Integer;
function Func_6 (Val : Integer) return Integer;
function Func_7 (Val : Integer) return Integer;
function Func_8 (Val_1 : Integer; Val_2 : Integer) return Integer;
procedure Proc_1 (Val : Integer);
function Func_1 (Val : Integer) return Integer is
begin
return Func_1 (Val); -- WARN
end Func_1;
function Func_2 (Val : Integer) return Integer is
begin
return Func_2 (123); -- none
end Func_2;
function Func_3 (Val : Integer) return Integer is
Temp : Integer;
begin
Temp := Func_3 (Val); -- WARN
return Temp;
end Func_3;
function Func_4 (Val : Integer) return Integer is
Temp : Integer;
begin
Temp := Func_4 (123); -- none
return Temp;
end Func_4;
function Func_5 (Val : Integer) return Integer is
begin
Proc_1 (Val);
return Func_5 (Val); -- none
end Func_5;
function Func_6 (Val : Integer) return Integer is
begin
Proc_1 (Val);
return Func_6 (123); -- none
end Func_6;
function Func_7 (Val : Integer) return Integer is
begin
raise Program_Error;
return Func_7 (Val); -- none
end Func_7;
function Func_8 (Val_1 : Integer; Val_2 : Integer) return Integer is
begin
return Func_8 (Val_1, 123); -- none
end Func_8;
procedure Proc_1 (Val : Integer) is
begin
Proc_1 (Val); -- WARN
end Proc_1;
begin null; end Infinite;
----------------------------
-- Compilation and output --
----------------------------
$ gcc -c infinite.adb
infinite.adb:14:14: infinite recursion
infinite.adb:14:14: Storage_Error would have been raised at run time
infinite.adb:25:15: infinite recursion
infinite.adb:25:15: Storage_Error would have been raised at run time
infinite.adb:61:07: infinite recursion
infinite.adb:61:07: Storage_Error would have been raised at run time
2019-07-05 Hristian Kirtchev <kirtchev@adacore.com>
gcc/ada/
* sem_res.adb (Check_Infinite_Recursion): Reimplemented.
(Enclosing_Declaration_Or_Statement,
Invoked_With_Different_Arguments, Is_Conditional_Statement,
Is_Control_Flow_Statement, Is_Immediately_Within_Body,
Is_Raise_Idiom, Is_Raise_Statement, Is_Sole_Statement,
Preceded_By_Control_Flow_Statement,
Within_Conditional_Statement): New routines.
From-SVN: r273116
