Commit Graph

167279 Commits

Author SHA1 Message Date
Tamar Christina
99cf78cf2e Arm: Update Armv8.4-a's FP16 FML intrinsics
This patch updates the Armv8.4-a FP16 FML intrinsics's suffixes from u32 to f16
to be more consistent with the naming convention for intrinsics.

The specifications for these intrinsics have not been published yet so we do
not need to maintain the old names.

The patch was created with the following script:

grep -lIE "(vfml[as].+)_u32" -r gcc/ | grep -iEv ".+Changelog.*" \
  | xargs sed -i -E -e "s/(vfml[as].+)_u32/\1_f16/g" 

gcc/ChangeLog:

	* config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
	vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32, vfmlslq_low_u32,
	vfmlalq_high_u32, vfmlslq_high_u32, vfmlal_lane_low_u32,
	vfmlal_lane_high_u32, vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32,
	vfmlal_laneq_low_u32, vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32,
	vfmlal_laneq_high_u32, vfmlsl_lane_low_u32, vfmlsl_lane_high_u32,
	vfmlslq_laneq_low_u32, vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32,
	vfmlslq_laneq_high_u32, vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32):
	Rename ...
	(vfmlal_low_f16, vfmlsl_low_f16, vfmlal_high_f16, vfmlsl_high_f16,
	vfmlalq_low_f16, vfmlslq_low_f16, vfmlalq_high_f16, vfmlslq_high_f16,
	vfmlal_lane_low_f16, vfmlal_lane_high_f16, vfmlalq_laneq_low_f16,
	vfmlalq_lane_low_f16, vfmlal_laneq_low_f16, vfmlalq_laneq_high_f16,
	vfmlalq_lane_high_f16, vfmlal_laneq_high_f16, vfmlsl_lane_low_f16,
	vfmlsl_lane_high_f16, vfmlslq_laneq_low_f16, vfmlslq_lane_low_f16,
	vfmlsl_laneq_low_f16, vfmlslq_laneq_high_f16, vfmlslq_lane_high_f16,
	vfmlsl_laneq_high_f16): ... To this.
	* config/arm/neon.md: Update comments.

gcc/testsuite/ChangeLog:

	* gcc.target/arm/simd/fp16fml_high.c (test_vfmlal_high_u32,
	test_vfmlalq_high_u32, test_vfmlsl_high_u32, test_vfmlslq_high_u32):
	Rename ....
	(test_vfmlal_high_f16, test_vfmlalq_high_f16, test_vfmlsl_high_f16,
	test_vfmlslq_high_f16): ... To this.
	* gcc.target/arm/simd/fp16fml_lane_high.c (test_vfmlal_lane_high_u32,
	tets_vfmlsl_lane_high_u32, test_vfmlal_laneq_high_u32,
	test_vfmlsl_laneq_high_u32, test_vfmlalq_lane_high_u32,
	test_vfmlslq_lane_high_u32, test_vfmlalq_laneq_high_u32,
	test_vfmlslq_laneq_high_u32): Rename ...
	(test_vfmlal_lane_high_f16, tets_vfmlsl_lane_high_f16,
	test_vfmlal_laneq_high_f16, test_vfmlsl_laneq_high_f16,
	test_vfmlalq_lane_high_f16, test_vfmlslq_lane_high_f16,
	test_vfmlalq_laneq_high_f16, test_vfmlslq_laneq_high_f16): ... To this.
	* gcc.target/arm/simd/fp16fml_lane_low.c (test_vfmlal_lane_low_u32,
	test_vfmlsl_lane_low_u32, test_vfmlal_laneq_low_u32,
	test_vfmlsl_laneq_low_u32, test_vfmlalq_lane_low_u32,
	test_vfmlslq_lane_low_u32, test_vfmlalq_laneq_low_u32,
	test_vfmlslq_laneq_low_u32): Rename ...
	(test_vfmlal_lane_low_f16, test_vfmlsl_lane_low_f16,
	test_vfmlal_laneq_low_f16, test_vfmlsl_laneq_low_f16,
	test_vfmlalq_lane_low_f16, test_vfmlslq_lane_low_f16,
	test_vfmlalq_laneq_low_f16, test_vfmlslq_laneq_low_f16): ... To this.
	* gcc.target/arm/simd/fp16fml_low.c (test_vfmlal_low_u32,
	test_vfmlalq_low_u32, test_vfmlsl_low_u32, test_vfmlslq_low_u32):
	Rename ...
	(test_vfmlal_low_f16, test_vfmlalq_low_f16, test_vfmlsl_low_f16,
	test_vfmlslq_low_f16): ... To this.

From-SVN: r269192
2019-02-25 17:48:55 +00:00
Tamar Christina
9d04c986b6 AArch64: Update Armv8.4-a's FP16 FML intrinsics
This patch updates the Armv8.4-a FP16 FML intrinsics's suffixes from u32 to f16
to be more consistent with the naming convention for intrinsics.

The specifications for these intrinsics have not been published yet so we do
not need to maintain the old names.

The patch was created with the following script:

grep -lIE "(vfml[as].+)_u32" -r gcc/ | grep -iEv ".+Changelog.*" \
  | xargs sed -i -E -e "s/(vfml[as].+)_u32/\1_f16/g"

gcc/ChangeLog:

	* config/aarch64/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
	vfmlalq_low_u32, vfmlslq_low_u32, vfmlal_high_u32, vfmlsl_high_u32,
	vfmlalq_high_u32, vfmlslq_high_u32, vfmlal_lane_low_u32,
	vfmlsl_lane_low_u32, vfmlal_laneq_low_u32, vfmlsl_laneq_low_u32,
	vfmlalq_lane_low_u32, vfmlslq_lane_low_u32, vfmlalq_laneq_low_u32,
	vfmlslq_laneq_low_u32, vfmlal_lane_high_u32, vfmlsl_lane_high_u32,
	vfmlal_laneq_high_u32, vfmlsl_laneq_high_u32, vfmlalq_lane_high_u32,
	vfmlslq_lane_high_u32, vfmlalq_laneq_high_u32, vfmlslq_laneq_high_u32):
	Rename ...
	(vfmlal_low_f16, vfmlsl_low_f16, vfmlalq_low_f16, vfmlslq_low_f16,
	vfmlal_high_f16, vfmlsl_high_f16, vfmlalq_high_f16, vfmlslq_high_f16,
	vfmlal_lane_low_f16, vfmlsl_lane_low_f16, vfmlal_laneq_low_f16,
	vfmlsl_laneq_low_f16, vfmlalq_lane_low_f16, vfmlslq_lane_low_f16,
	vfmlalq_laneq_low_f16, vfmlslq_laneq_low_f16, vfmlal_lane_high_f16,
	vfmlsl_lane_high_f16, vfmlal_laneq_high_f16, vfmlsl_laneq_high_f16,
	vfmlalq_lane_high_f16, vfmlslq_lane_high_f16, vfmlalq_laneq_high_f16,
	vfmlslq_laneq_high_f16): ... To this.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/fp16_fmul_high.h (test_vfmlal_high_u32,
	test_vfmlalq_high_u32, test_vfmlsl_high_u32, test_vfmlslq_high_u32):
	Rename ...
	(test_vfmlal_high_f16, test_vfmlalq_high_f16, test_vfmlsl_high_f16,
	test_vfmlslq_high_f16): ... To this.
	* gcc.target/aarch64/fp16_fmul_lane_high.h (test_vfmlal_lane_high_u32,
	tets_vfmlsl_lane_high_u32, test_vfmlal_laneq_high_u32,
	test_vfmlsl_laneq_high_u32, test_vfmlalq_lane_high_u32,
	test_vfmlslq_lane_high_u32, test_vfmlalq_laneq_high_u32,
	test_vfmlslq_laneq_high_u32): Rename ...
	(test_vfmlal_lane_high_f16, tets_vfmlsl_lane_high_f16,
	test_vfmlal_laneq_high_f16, test_vfmlsl_laneq_high_f16,
	test_vfmlalq_lane_high_f16, test_vfmlslq_lane_high_f16,
	test_vfmlalq_laneq_high_f16, test_vfmlslq_laneq_high_f16): ... To this.
	* gcc.target/aarch64/fp16_fmul_lane_low.h (test_vfmlal_lane_low_u32,
	test_vfmlsl_lane_low_u32, test_vfmlal_laneq_low_u32,
	test_vfmlsl_laneq_low_u32, test_vfmlalq_lane_low_u32,
	test_vfmlslq_lane_low_u32, test_vfmlalq_laneq_low_u32,
	test_vfmlslq_laneq_low_u32): Rename ...
	(test_vfmlal_lane_low_f16, test_vfmlsl_lane_low_f16,
	test_vfmlal_laneq_low_f16, test_vfmlsl_laneq_low_f16,
	test_vfmlalq_lane_low_f16, test_vfmlslq_lane_low_f16,
	test_vfmlalq_laneq_low_f16, test_vfmlslq_laneq_low_f16): ... To this.
	* gcc.target/aarch64/fp16_fmul_low.h (test_vfmlal_low_u32,
	test_vfmlalq_low_u32, test_vfmlsl_low_u32, test_vfmlslq_low_u32):
	Rename ...
	(test_vfmlal_low_f16, test_vfmlalq_low_f16, test_vfmlsl_low_f16,
	test_vfmlslq_low_f16): ... To This.
	* lib/target-supports.exp
	(check_effective_target_arm_fp16fml_neon_ok_nocache): Update test.

From-SVN: r269191
2019-02-25 17:46:16 +00:00
Dominique d'Humieres
6388eda068 re PR fortran/89282 (Garbage arithmetics results in fortran with -O3 and overloaded operators)
2019-02-25  Dominique d'Humieres  <dominiq@gcc.gnu.org>

	PR fortran/89282
	* gfortran.dg/overload_3.f90: New test.

From-SVN: r269190
2019-02-25 16:19:45 +01:00
Alexander Monakov
74a4de687d df-scan: fix use of mw_order in df_mw_compare (PR 86096)
PR rtl-optimization/86096
	* df-scan.c (df_mw_compare): Do not check mw_reg fields when
	comparing mw_order values.

From-SVN: r269189
2019-02-25 18:14:39 +03:00
Jakub Jelinek
ea229aa8a1 re PR c++/89285 (ICE after casting the this pointer in the constructor in C++17 mode)
PR c++/89285
	* g++.dg/cpp1y/constexpr-89285-2.C: New test.

From-SVN: r269188
2019-02-25 16:01:01 +01:00
Dominique d'Humieres
b8f412849b re PR libfortran/89274 (Inconsistent list directed output of INTEGER(16))
2019-02-25  Dominique d'Humieres  <dominiq@gcc.gnu.org>

	PR libfortran/89274
	* gfortran.dg/list_directed_large.f90: New test. 

2019-02-25  Dominique d'Humieres  <dominiq@gcc.gnu.org>

	PR libfortran/89274
	* io/write.c (write_integer): Add width for INTEGER(16).

From-SVN: r269187
2019-02-25 11:39:38 +01:00
Jakub Jelinek
5c56124837 re PR target/89434 (wrong code with -Og and __builtin_mul_overflow())
PR target/89434
	* config/arm/arm.md (*subsi3_carryin_const): Use
	arm_neg_immediate_operand predicate instead of
	arm_not_immediate_operand, "L" constraint instead of "K" and
	print it using %n2 instead of %B2.
	(*subsi3_carryin_const0): New define_insn.
	(*subsi3_carryin_compare_const): Use const_int_I_operand predicate
	instead of arm_not_operand and "I" constraint instead of "K" and
	print it using %n3 instead of %B2.  Instead of using match_dup 2 add
	another match_operand and in the condition check that it is negation
	of operands[2].
	(*subsi3_carryin_compare_const0): New define_ins.
	(*subdi_di_zesidi): Adjust to use *subsi3_carryin_const0 instead of
	*subsi3_carryin_const.
	(*arm_cmpdi_insn): Fix splitting into *subsi3_carryin_compare_const,
	split into *subsi3_carryin_compare_const0 if the highpart is zero.

	* gcc.c-torture/execute/pr89434.c: New test.

From-SVN: r269186
2019-02-25 11:32:38 +01:00
Jakub Jelinek
4199c859ac re PR target/89438 (ICE in glibc/sysdeps/ieee754/dbl-64/e_pow.c (internal compiler error: in decompose, at rtl.h:2266))
PR target/89438
	* config/arm.vfp.md (*negdf2_vfp): Use
	gen_int_mode (0x80000000, SImode) instead of GEN_INT (0x80000000).
	* config/arm/neon.md (neon_copysignf<mode>): Likewise.

	* gcc.dg/pr89438.c: New test.

From-SVN: r269185
2019-02-25 10:51:27 +01:00
GCC Administrator
82eadb9458 Daily bump.
From-SVN: r269183
2019-02-25 00:16:31 +00:00
Paolo Carlini
34b2e931cd re PR c++/84585 (internal compiler error: in get_local_decls, at cp/name-lookup.c:3654)
2019-02-24  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/84585
	* g++.dg/cpp0x/pr84585.C: New.

From-SVN: r269180
2019-02-24 23:44:11 +00:00
Thomas Koenig
4afe82523f re PR fortran/89174 (Allocation segfault with CLASS(*) MOLD)
2019-02-24  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/89174
	* trans-expr.c (gfc_find_and_cut_at_last_class_ref): Add is_mold
	to garguments. If we are dealing with a MOLD, call
	gfc_expr_to_initialize().
	* trans-stmt.c (gfc_trans_allocate): For MOLD, pass is_mold=true
	to gfc_find_and_cut_at_last_class_ref.
	* trans.h (gfc_find_and_cut_at_last_class_ref): Add optional
	argument is_mold with default false.

2019-02-24  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/89174
	* gfortran.dg/allocate_with_mold_3.f90: New test.

From-SVN: r269179
2019-02-24 22:49:47 +00:00
H.J. Lu
28d08ad204 i386: Compile PR target/87007 tests with -mfpmath=sse
-mfpmath=sse is needed to enable SSE for FP math in 32-bit.

	PR target/87007
	* gcc.target/i386/pr87007-1.c: Compile with -mfpmath=sse.
	* gcc.target/i386/pr87007-2.c: Likewise.

From-SVN: r269178
2019-02-24 14:41:55 -08:00
Harald Anlauf
cdd1793162 re PR fortran/89266 (ICE with TRANSFER of len=0 character array constructor)
2019-02-24  Harald Anlauf  <anlauf@gmx.de>

	PR fortran/89266
	PR fortran/88326
	* target-memory.c (gfc_element_size): Return false if element size
	cannot be determined; element size is returned separately.
	(gfc_target_expr_size): Return false if expression size cannot be
	determined; expression size is returned separately.
	* target-memory.h: Adjust prototypes.
	* check.c (gfc_calculate_transfer_sizes): Adjust references to
	gfc_target_expr_size, gfc_element_size.
	* arith.c (hollerith2representation): Likewise.
	* class.c (find_intrinsic_vtab): Likewise.
	* simplify.c (gfc_simplify_sizeof): Likewise.

	PR fortran/89266
	PR fortran/88326
	* gfortran.dg/pr89266.f90: New test.
	* gfortran.dg/pr88326.f90: New test.

From-SVN: r269177
2019-02-24 20:03:28 +00:00
Jakub Jelinek
953e25c44a re PR rtl-optimization/89445 (_mm512_maskz_loadu_pd "forgets" to use the mask)
PR rtl-optimization/89445
	* simplify-rtx.c (simplify_ternary_operation): Don't use
	simplify_merge_mask on operands that may trap.
	* rtlanal.c (may_trap_p_1): Use FLOAT_MODE_P instead of
	SCALAR_FLOAT_MODE_P checks.  For integral division by zero, if
	second operand is CONST_VECTOR, check if any element could be zero.
	Don't expect traps for VEC_{MERGE,SELECT,CONCAT,DUPLICATE} unless
	their operands can trap.

	* gcc.target/i386/avx512f-pr89445.c: New test.

From-SVN: r269176
2019-02-24 20:23:51 +01:00
Jonathan Wakely
c7f01cb61d PR libstdc++/89416 fix accessibility of members
PR libstdc++/89416
	* include/bits/alloc_traits.h (__is_alloc_insertable_impl): Make
	copy and move members public.

From-SVN: r269175
2019-02-24 15:44:18 +00:00
GCC Administrator
00c80d9c23 Daily bump.
From-SVN: r269173
2019-02-24 00:16:26 +00:00
Jonathan Wakely
4746651327 Improve error message for bad arguments to script
* generate_libstdcxx_web_docs: Improve error output.

From-SVN: r269169
2019-02-23 21:19:04 +00:00
Jonathan Wakely
3c26b7598c P0340R2 Making std::underlying_type SFINAE-friendly
* include/std/type_traits (__underlying_type_impl): New helper to
	make underlying_type SFINAE-friendly.
	(underlying_type): Derive from __underlying_type_impl.
	* testsuite/20_util/underlying_type/requirements/typedefs-3.cc: New
	test.

From-SVN: r269168
2019-02-23 21:19:00 +00:00
Martin Sebor
46d496b9d9 builtin-sprintf-10.c: Cast remaining wchar_t to wint_t to avoid a bogus -Wformat warning in ILP32...
gcc/testsuite/ChangeLog:
	* gcc.dg/tree-ssa/builtin-sprintf-10.c: Cast remaining
	wchar_t to wint_t to avoid a bogus -Wformat warning in
	ILP32 (bug 77970).

From-SVN: r269167
2019-02-23 13:46:04 -07:00
Martin Sebor
837865bdc2 gimple-ssa-sprintf.c (target_strtol): Rename...
gcc/ChangeLog:
	* gimple-ssa-sprintf.c (target_strtol): Rename...
	(target_strtohwi): ...to this.  Handle values up to HOST_WIDE_INT_MAX.
	(parse_directive): Adjust to name change.  Use HOST_WIDE_INT_MAX to
	check for range error.

From-SVN: r269166
2019-02-23 13:25:57 -07:00
H.J. Lu
34ab23c9ac Include "../../../libgfortran/ISO_Fortran_binding.h"
PR testsuite/89476
	* gfortran.dg/ISO_Fortran_binding_5.c: Include
	"../../../libgfortran/ISO_Fortran_binding.h".
	* gfortran.dg/ISO_Fortran_binding_6.c: Likewise.

From-SVN: r269165
2019-02-23 11:58:52 -08:00
H.J. Lu
aebe10d48c driver: Also prune joined switches with negation
When -march=native is passed to host_detect_local_cpu to the backend,
it overrides all command lines after it.  That means

$ gcc -march=native -march=skylake-avx512

is the treated as

$ gcc -march=skylake-avx512 -march=native

Prune joined switches with Negative and RejectNegative to allow
-march=skylake-avx512 to override previous -march=native on command-line.

gcc/

	PR driver/69471
	* opts-common.c (prune_options): Also prune joined switches
	with Negative and RejectNegative.
	* config/i386/i386.opt (march=): Add Negative(march=).
	(mtune=): Add Negative(mtune=).
	* doc/options.texi: Document Negative used together with Joined
	and RejectNegative.

gcc/testsuite/

	PR driver/69471
	* gcc.dg/pr69471-1.c: New test.
	* gcc.dg/pr69471-2.c: Likewise.
	* gcc.target/i386/pr69471-3.c: Likewise.

From-SVN: r269164
2019-02-23 11:39:35 -08:00
Jerry DeLisle
85627e2a9e re PR fortran/84387 (Defined output does not work for a derived type that has no components)
2019-02-23  Jerry DeLisle <jvdelisle@gcc.gnu.org>

	PR fortran/84387
	* trans-io.c (transfer_expr): Do not return if there are no
	components to the derived type or class.

	* gfortran.dg/dtio_34.f90: New test.

From-SVN: r269161
2019-02-23 18:07:10 +00:00
Marek Polacek
3aab3d374a re PR c++/89419 (ICE in is_normal_capture_proxy starting with r253601)
PR c++/89419
	* g++.dg/cpp1y/lambda-generic-89419.C: New test.

From-SVN: r269159
2019-02-23 14:54:23 +00:00
Marek Polacek
28a19c5be3 PR c++/88294 - ICE with non-constant noexcept-specifier.
* pt.c (maybe_instantiate_noexcept): Set up the list of local
	specializations.  Set current_class_{ptr,ref}.

	* g++.dg/cpp0x/noexcept34.C: New test.
	* g++.dg/cpp0x/noexcept35.C: New test.

From-SVN: r269158
2019-02-23 14:05:31 +00:00
Paul Thomas
524cee402e re PR fortran/88117 (ICE in gimplify_var_or_parm_decl, at gimplify.c:2697)
2019-02-23  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/88117
	* resolve.c (deferred_op_assign): Return if the lhs expression
	has the pointer attribute.
	* trans-expr.c (gfc_trans_assignment_1): Do not fix the string
	length if the lhs expression has the pointer attribute.

2019-02-23  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/88117
	* gfortran.dg/deferred_character_32.f90 : New test

From-SVN: r269157
2019-02-23 13:18:47 +00:00
Paul Thomas
c280838969 re PR fortran/89385 (Incorrect members of C descriptor for an allocatable object)
2019-02-23  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/89385
	PR fortran/89366
	* decl.c (gfc_verify_c_interop_param): Restriction on string
	length being one is lifted for F2018.
	* trans-expr.c (gfc_conv_gfc_desc_to_cfi_desc): For scalar
	characters with intent in, make a temporary and copy the result
	of the expression evaluation into it.
	(gfc_conv_procedure_call): Set a flag for character formal args
	having a character length that is not unity. If the procedure
	is bind C, call gfc_conv_gfc_desc_to_cfi_desc in this case.
	Also, extend bind C calls to unconditionally convert both
	pointers and allocatable expressions.

2019-02-23  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/89385
	* gfortran.dg/ISO_Fortran_binding_1.f90 : Correct test for
	previously incorrect lbound for allocatable expressions. Also
	correct stop values to avoid repetition.
	* gfortran.dg/ISO_Fortran_binding_5.f90 : New test
	* gfortran.dg/ISO_Fortran_binding_5.c : Support previous test.

	PR fortran/89366
	* gfortran.dg/ISO_Fortran_binding_6.f90 : New test
	* gfortran.dg/ISO_Fortran_binding_6.c : Support previous test.
	* gfortran.dg/pr32599.f03 : Set standard to F2008.

2019-02-23  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/89385
	PR fortran/89366
	* runtime/ISO_Fortran_binding.c (cfi_desc_to_gfc_desc) : In the
	interchange between character and derived, the character type
	was being set incorrectly.
	(gfc_desc_to_cfi_desc) : Eliminate the interchange of types in
	this function. Do not add the kind and length information to
	the type field of structures. Lbounds were incorrectly being
	set to zero for allocatable and pointer descriptors. Should
	have been non-pointer, non-allocatables that received this
	treatment.

From-SVN: r269156
2019-02-23 12:18:44 +00:00
Jonathan Wakely
ace857f95d PR libstdc++/89446 fix null pointer dereference in char_traits
PR libstdc++/89446
	* include/bits/char_traits.h (__constant_char_array): Check index is
	in range before dereferencing.
	(char_traits<char>::compare, char_traits<char>::find)
	(char_traits<char8_t>::compare, char_traits<char8_t>::find): Return
	immediately if n is zero.
	(char_traits<wchar_t>::compare, char_traits<wchar_t>::find): Likewise.
	Remove workarounds for PR 67026.
	* testsuite/21_strings/basic_string_view/operators/char/89446.cc:
	New test.
	* testsuite/21_strings/basic_string_view/operators/wchar_t/89446.cc:
	New test.

From-SVN: r269148
2019-02-23 03:01:59 +00:00
David Malcolm
c175330208 Capture source location of dtors (PR c++/89390)
gcc/cp/ChangeLog:
	PR c++/89390
	* parser.c (cp_parser_unqualified_id): Capture and use locations
	for destructors.

gcc/testsuite/ChangeLog:
	PR c++/89390
	* g++.dg/diagnostic/pr89390.C: Update expected location of error,
	renaming to a multicharacter name, so that start != finish.  Add
	tests for dtor locations.

From-SVN: r269145
2019-02-23 01:19:38 +00:00
GCC Administrator
986e0e33f6 Daily bump.
From-SVN: r269142
2019-02-23 00:16:28 +00:00
David Malcolm
0d527f0d31 re PR tree-optimization/88074 (g++ hangs on math expression)
PR middle-end/88074
	* simplify.c (norm2_do_sqrt, gfc_simplify_norm2): Use
	mpfr_number_p && !mpfr_zero_p instead of mpfr_regular_p.
	(norm2_add_squared): Likewise.  Use mp_exp_t rather than mpfr_exp_t.

Co-Authored-By: Jakub Jelinek <jakub@redhat.com>

From-SVN: r269139
2019-02-23 01:14:52 +01:00
Paolo Carlini
01d3d58151 re PR c++/84676 (internal compiler error: Segmentation fault (build_new_op_1))
2019-02-22  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/84676
	* g++.dg/cpp0x/pr84676.C: New.

From-SVN: r269138
2019-02-22 23:16:14 +00:00
Martin Sebor
0a7fe8bcd9 builtin-sprintf-10.c: Cast wchar_t to wint_t to avoid a bogus -Wformat warning in ILP32 (bug 77970).
gcc/testsuite/ChangeLog:

	* gcc.dg/tree-ssa/builtin-sprintf-10.c: Cast wchar_t to wint_t
	to avoid a bogus -Wformat warning in ILP32 (bug 77970).

From-SVN: r269137
2019-02-22 16:08:23 -07:00
Eric Botcazou
047b3e3408 baseline_symbols.txt: Adjust.
* config/abi/post/sparc64-linux-gnu/baseline_symbols.txt: Adjust.
	* config/abi/post/sparc64-linux-gnu/32/baseline_symbols.txt: Likewise.

From-SVN: r269136
2019-02-22 21:25:59 +00:00
Harald Anlauf
56bf85c1a7 re PR fortran/83057 (OPEN without a filename and without STATUS='SCRATCH' could produce a warning)
2019-02-22  Harald Anlauf  <anlauf@gmx.de>

	PR fortran/83057
	* io.c (gfc_match_open): Fix logic in checks of OPEN statement
	when NEWUNIT= is specified.

	PR fortran/83057
	* gfortran.dg/newunit_6.f90: New test.

From-SVN: r269134
2019-02-22 20:35:38 +00:00
Steven G. Kargl
f3e1797acf re PR fortran/89431 (CPP integer macros not defined)
2019-02-22  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/89431
	* gfortran.texi: Fix documentation to match the implementation.

From-SVN: r269132
2019-02-22 20:27:57 +00:00
Marek Polacek
4770beb36c PR c++/89420 - ICE with CAST_EXPR in explicit-specifier.
* decl.c (build_explicit_specifier): Don't check
	processing_template_decl.  Call instantiation_dependent_expression_p
	instead of value_dependent_expression_p.  Call
	instantiate_non_dependent_expr_sfinae before
	build_converted_constant_expr instead of calling
	instantiate_non_dependent_expr after it.  Add
	processing_template_decl_sentinel.

	* g++.dg/cpp2a/explicit14.C: New test.

From-SVN: r269131
2019-02-22 19:24:37 +00:00
Jakub Jelinek
fcb141ac22 re PR libstdc++/89402 (warning: ‘void _ZNKSt4hashIeEclEe()’ specifies less restrictive attribute than its target)
PR libstdc++/89402
	* src/c++98/compatibility-ldbl.cc (_ZNKSt4hashIeEclEe): Change return
	type to std::size_t and argument to type to long double.

From-SVN: r269130
2019-02-22 20:10:47 +01:00
Martin Sebor
16a919a716 extend.texi (Other Builtins): Add __builtin_is_constant_evaluated.
gcc/ChangeLog:

	* doc/extend.texi (Other Builtins): Add
	__builtin_is_constant_evaluated.

From-SVN: r269129
2019-02-22 11:38:36 -07:00
Richard Biener
c87cc0c01e re PR tree-optimization/87609 (miscompilation with restrict and loop)
2019-02-22  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/87609
	* tree-cfg.c (gimple_duplicate_bb): Only remap inlined cliques.

From-SVN: r269127
2019-02-22 17:56:59 +00:00
Martin Sebor
eb319c505d PR tree-optimization/88993 - GCC 9 -Wformat-overflow=2 should reflect real libc limits
PR tree-optimization/88993 - GCC 9 -Wformat-overflow=2 should reflect real libc limits
PR tree-optimization/88835 - overly aggressive -Werror=format-overflow for printf

gcc/ChangeLog:

	PR tree-optimization/88993
	PR tree-optimization/88853
	* gimple-ssa-sprintf.c (sprintf_dom_walker::call_info::is_file_func):
	New helper.
	(sprintf_dom_walker::call_info::is_string_func): New helper.
	(format_directive): Only issue "may exceed" 4095/INT_MAX warnings
	for formatted string functions.
	(sprintf_dom_walker::handle_gimple_call): Fix a typo in a comment.

gcc/testsuite/ChangeLog:

	PR tree-optimization/88993
	PR tree-optimization/88853
	* gcc.dg/tree-ssa/builtin-fprintf-warn-2.c: New test.
	* gcc.dg/tree-ssa/builtin-printf-warn-2.c: New test.
	* gcc.dg/tree-ssa/builtin-snprintf-warn-3.c: Adjust.
	* gcc.dg/tree-ssa/builtin-sprintf-warn-18.c: Same.

From-SVN: r269125
2019-02-22 10:38:11 -07:00
Jeff Law
cfed471a56 re PR rtl-optimization/87761 ([MIPS] New FAIL: gcc.target/mips/fix-r4000-10.c -O1 start with r265398)
PR rtl-optimization/87761
	* config/mips/mips.md: Add new combiner pattern to recognize
	a bitfield extraction using (ashiftrt (truncate (ashift (...)))).

From-SVN: r269123
2019-02-22 09:38:43 -07:00
Matthew Malcomson
341fca1b49 Handle stack pointer with SUBS/ADDS instructions.
In general the stack pointer was not handled for many SUBS/ADDS patterns in
aarch64.md.
Both the "extended register" and "immediate" forms allow the stack pointer to be
used as the source register, while no form allows the stack pointer for the
destination register.

The define_insn patterns generating ADDS/SUBS did not allow the stack pointer
for any operand, while the define_peephole2 patterns that generated RTX to be
matched by these patterns allowed the stack pointer for any operand.

The patterns are fixed by adding the 'k' constraint for the first source operand
to all define_insns that generate the ADDS/SUBS "extended register" and
"immediate" forms (but not the "shifted register" form).

In peephole optimizations, constraint strings are ignored (see "(gccint) C
Constraint Interface" info node in the documentation), so the decision to act or
not is based solely on the predicate and condition.
This patch introduces a new predicate "aarch64_general_reg" to be used in
define_peephole2 patterns where only GENERAL_REGS registers are acceptable and
uses that predicate in the peepholes that generate patterns for ADDS/SUBS.

Full bootstrap and regtest done on aarch64-none-linux-gnu.
Regression tests done on aarch64-none-linux-gnu and aarch64-none-elf cross
compiler.

OK for trunk?


gcc/ChangeLog:

2019-02-22  Matthew Malcomson  <matthew.malcomson@arm.com>

	PR target/89324
	* config/aarch64/aarch64.md: Use aarch64_general_reg predicate on
	destination register in peepholes generating patterns for ADDS/SUBS.
	(add<mode>3_compare0,
	*addsi3_compare0_uxtw, add<mode>3_compareC,
	add<mode>3_compareV_imm, add<mode>3_compareV,
	*adds_<optab><ALLX:mode>_<GPI:mode>,
	*subs_<optab><ALLX:mode>_<GPI:mode>,
	*adds_<optab><ALLX:mode>_shift_<GPI:mode>,
	*subs_<optab><ALLX:mode>_shift_<GPI:mode>,
	*adds_<optab><mode>_multp2, *subs_<optab><mode>_multp2,
	*sub<mode>3_compare0, *subsi3_compare0_uxtw,
	sub<mode>3_compare1): Allow stack pointer for source register.
	* config/aarch64/predicates.md (aarch64_general_reg): New predicate.


gcc/testsuite/ChangeLog:

2019-02-22  Matthew Malcomson  <matthew.malcomson@arm.com>

	PR target/89324
	* gcc.dg/rtl/aarch64/subs_adds_sp.c: New test.
	* gfortran.fortran-torture/compile/pr89324.f90: New test.

From-SVN: r269122
2019-02-22 16:35:22 +00:00
Martin Sebor
3c2a70cb14 PR c/89425 - -Wabsolute-value warns in dead subexpressions
gcc/c/ChangeLog:

	PR c/89425
	* c-parser.c (sizeof_ptr_memacc_comptypes): Avoid warning in
	unreachable subexpressions.

gcc/testsuite/ChangeLog:

	PR c/89425
	* gcc.dg/Wabsolute-value.c: New test.

From-SVN: r269121
2019-02-22 09:24:36 -07:00
Martin Sebor
d228ac9ae5 Wbuiltin-declaration-mismatch-12.c: New test.
gcc/testsuite/ChangeLog:
	* gcc.dg/Wbuiltin-declaration-mismatch-12.c: New test.

From-SVN: r269120
2019-02-22 09:21:07 -07:00
H.J. Lu
f143228062 i386: Add pass_remove_partial_avx_dependency
With -mavx, for

$ cat foo.i
extern float f;
extern double d;
extern int i;

void
foo (void)
{
  d = f;
  f = i;
}

we need to generate

	vxorp[ds]	%xmmN, %xmmN, %xmmN
	...
	vcvtss2sd	f(%rip), %xmmN, %xmmX
	...
	vcvtsi2ss	i(%rip), %xmmN, %xmmY

to avoid partial XMM register stall.  This patch adds a pass to generate
a single

	vxorps		%xmmN, %xmmN, %xmmN

at entry of the nearest dominator for basic blocks with SF/DF conversions,
which is in the fake loop that contains the whole function, instead of
generating one

	vxorp[ds]	%xmmN, %xmmN, %xmmN

for each SF/DF conversion.

NB: The LCM algorithm isn't appropriate here since it may place a vxorps
inside the loop.  Simple testcase show this:

$ cat badcase.c

extern float f;
extern double d;

void
foo (int n, int k)
{
  for (int j = 0; j != n; j++)
    if (j < k)
      d = f;
}

It generates

    ...
    loop:
      if(j < k)
        vxorps    %xmm0, %xmm0, %xmm0
        vcvtss2sd f(%rip), %xmm0, %xmm0
      ...
    loopend
    ...

This is because LCM only works when there is a certain benifit.  But for
conditional branch, LCM wouldn't move

   vxorps  %xmm0, %xmm0, %xmm0

out of loop.  SPEC CPU 2017 on Intel Xeon with AVX512 shows:

1. The nearest dominator

|RATE			|Improvement|
|500.perlbench_r	| 0.55%	|
|538.imagick_r		| 8.43%	|
|544.nab_r		| 0.71%	|

2. LCM

|RATE			|Improvement|
|500.perlbench_r	| -0.76% |
|538.imagick_r		| 7.96%  |
|544.nab_r		| -0.13% |

Performance impacts of SPEC CPU 2017 rate on Intel Xeon with AVX512
using

-Ofast -flto -march=skylake-avx512 -funroll-loops

before

commit e739972ad6ad05e32a1dd5c29c0b950a4c4bd576
Author: uros <uros@138bc75d-0d04-0410-961f-82ee72b054a4>
Date:   Thu Jan 31 20:06:42 2019 +0000

            PR target/89071
            * config/i386/i386.md (*extendsfdf2): Split out reg->reg
            alternative to avoid partial SSE register stall for TARGET_AVX.
            (truncdfsf2): Ditto.
            (sse4_1_round<mode>2): Ditto.

    git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@268427 138bc75d-0d04-0410-961f-82ee72b054a4

are:

|INT RATE		|Improvement|
|500.perlbench_r	| 0.55%	|
|502.gcc_r		| 0.14%	|
|505.mcf_r		| 0.08%	|
|523.xalancbmk_r	| 0.18%	|
|525.x264_r		|-0.49%	|
|531.deepsjeng_r	|-0.04%	|
|541.leela_r		|-0.26%	|
|548.exchange2_r	|-0.3%	|
|557.xz_r		|BuildSame|

|FP RATE		|Improvement|
|503.bwaves_r	        |-0.29% |
|507.cactuBSSN_r	| 0.04%	|
|508.namd_r		|-0.74%	|
|510.parest_r		|-0.01%	|
|511.povray_r		| 2.23%	|
|519.lbm_r		| 0.1%	|
|521.wrf_r		| 0.49%	|
|526.blender_r		| 0.13%	|
|527.cam4_r		| 0.65%	|
|538.imagick_r		| 8.43%	|
|544.nab_r		| 0.71%	|
|549.fotonik3d_r	| 0.15%	|
|554.roms_r		| 0.08%	|

After commit e739972ad6ad05e32a1dd5c29c0b950a4c4bd576, on Skylake client,
impacts on 538.imagick_r with

-fno-unsafe-math-optimizations -march=native -Ofast -funroll-loops -flto

1. Size comparision:

before:

   text	   data	    bss	    dec	    hex	filename
2436377	   8352	   4528	2449257	 255f69 imagick_r

after:

   text	   data	    bss	    dec	    hex	filename
2425249	   8352	   4528	2438129	 2533f1 imagick_r

2. Number of vxorps:

before		after		difference
4948            4135            -19.66%

3. Performance improvement:

|RATE			|Improvement|
|538.imagick_r		| 5.5%  |

gcc/

2019-02-22  H.J. Lu  <hongjiu.lu@intel.com>
	    Hongtao Liu  <hongtao.liu@intel.com>
	    Sunil K Pandey  <sunil.k.pandey@intel.com>

	PR target/87007
	* config/i386/i386-passes.def: Add
	pass_remove_partial_avx_dependency.
	* config/i386/i386-protos.h
	(make_pass_remove_partial_avx_dependency): New.
	* config/i386/i386.c (make_pass_remove_partial_avx_dependency):
	New function.
	(pass_data_remove_partial_avx_dependency): New.
	(pass_remove_partial_avx_dependency): Likewise.
	(make_pass_remove_partial_avx_dependency): Likewise.
	* config/i386/i386.md (avx_partial_xmm_update): New attribute.
	(*extendsfdf2): Add avx_partial_xmm_update.
	(truncdfsf2): Likewise.
	(*float<SWI48:mode><MODEF:mode>2): Likewise.
	(SF/DF conversion splitters): Disabled for TARGET_AVX.

gcc/testsuite/

2019-02-22  H.J. Lu  <hongjiu.lu@intel.com>
	    Hongtao Liu  <hongtao.liu@intel.com>
	    Sunil K Pandey  <sunil.k.pandey@intel.com>

	PR target/87007
	* gcc.target/i386/pr87007-1.c: New test.
	* gcc.target/i386/pr87007-2.c: Likewise.

Co-Authored-By: Hongtao Liu <hongtao.liu@intel.com>
Co-Authored-By: Sunil K Pandey <sunil.k.pandey@intel.com>

From-SVN: r269119
2019-02-22 07:54:08 -08:00
Aldy Hernandez
965779b4ad re PR middle-end/85598 (Incorrect -Wformat-truncation in a loop only at -O2 and -O3)
PR middle-end/85598
	* gimple-ssa-sprintf.c (pass_sprintf_length::execute): Enable loop
	analysis for pass.

From-SVN: r269115
2019-02-22 13:46:01 +00:00
Thiago Macieira
c945003352 x86: (Reapply) Move AESNI generation to Skylake and Goldmont
This is a repeat of commit r263989, which commit r264052 accidentally
reverted.

2019-02-22  Thiago Macieira  <thiago.macieira@intel.com>

	PR target/89444
	* config/i386/i386.h (PTA_WESTMERE): Remove PTA_AES.
	(PTA_SKYLAKE): Add PTA_AES.
	(PTA_GOLDMONT): Likewise.

From-SVN: r269114
2019-02-22 04:49:21 -08:00
Richard Biener
921bb9d1a3 c-pch.c (no_checksum): Remove.
2019-02-22  Richard Biener  <rguenther@suse.de>

	c-family/
	* c-pch.c (no_checksum): Remove.
	(pch_init): Remove assertion that executable_checksum is not
	all zero.
	(c_common_valid_pch): Likewise.

From-SVN: r269113
2019-02-22 10:59:33 +00:00
Sudakshina Das
c904388dc1 [GCC, AArch64] Fix a couple of bugs in BTI
While doing more testing I found a couple of issues with my BTI patches.
This patch fixes them:
1) Remove a reference to return address key. The original patch was written
based on a different not yet committed patch ([PATCH 3/3][GCC][AARCH64] Add
support for pointer authentication B key) and I missed out on cleaning this
up. This is hidden behind the configuration option and thus went unnoticed.
2) Add a missed case for adding the BTI instruction in thunk functions.

*** gcc/ChangeLog ***

2019-02-22  Sudakshina Das  <sudi.das@arm.com>

	* config/aarch64/aarch64.c (aarch64_output_mi_thunk): Add bti
	instruction if enabled.
	(aarch64_override_options): Remove reference to return address key.

From-SVN: r269112
2019-02-22 10:55:22 +00:00