2014-01-11 Jerry DeLisle <jvdelisle@gcc.gnu>
Dominique d'Humieres <dominiq@lps.ens.fr>
Steven G. Kargl <kargl@gcc.gnu.org>
PR libfortran/59700
PR libfortran/59764
* io/io.h (struct st_parameter_dt): Assign expanded_read flag to
unused bit. Define new variable line_buffer_pos.
* io/list_read.c (free_saved, next_char, l_push_char,
read_logical, read_real): Replace use of item_count with
line_buffer_pos for line_buffer look ahead.
(read_logical, read_integer, parse_real, read_real, check_type):
Adjust location of free_line to after generating error messages
to retain the correct item count for the message.
Co-Authored-By: Dominique d'Humieres <dominiq@lps.ens.fr>
Co-Authored-By: Steven G. Kargl <kargl@gcc.gnu.org>
From-SVN: r206553
* tree-ssa-loop-ivopts.c (iv_ca_narrow): New parameter.
Start narrowing with START. Apply candidate-use pair
and check overall cost in narrowing.
(iv_ca_prune): Pass new argument.
From-SVN: r206552
PR middle-end/59743
* ree.c (combine_reaching_defs): Ensure the defining statement
occurs before the extension when optimizing extensions with
different source and destination hard registers.
PR middle-end/59743
* gcc.c-torture/compile/pr59743.c: New test.
From-SVN: r206545
PR ipa/58585
* ipa-devirt.c (build_type_inheritance_graph): Also add types of vtables
into the type inheritance graph.
* g++.dg/torture/pr58585.C: New testcase.
From-SVN: r206543
PR tree-optimization/59745
* tree-predcom.c (tree_predictive_commoning_loop): Call
free_affine_expand_cache if giving up because components is NULL.
From-SVN: r206540
* target-globals.c (save_target_globals): Allocate < 4KB structs using
GC in payload of target_globals struct instead of allocating them on
the heap and the larger structs separately using GC.
* target-globals.h (struct target_globals): Make regs, hard_regs,
reload, expmed, ira, ira_int and lra_fields GTY((atomic)) instead
of GTY((skip)) and change type to void *.
(reset_target_globals): Cast loads from those fields to corresponding
types.
From-SVN: r206539
2014-01-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/s390/s390.c (s390_expand_tbegin): Remove jump over CC
extraction in good case.
From-SVN: r206527
2014-01-10 Richard Biener <rguenther@suse.de>
PR tree-optimization/59374
* tree-vect-slp.c (vect_slp_analyze_bb_1): Move dependence
checking after SLP discovery. Mark stmts not participating
in any SLP instance properly.
* gcc.dg/torture/pr59374-3.c: New testcase.
From-SVN: r206523
2014-01-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm.c (arm_new_rtx_costs): Use destination mode
when handling a SET rtx.
From-SVN: r206521
2014-01-09 Tom de Vries <tom@codesourcery.com>
* tree-ssa-pre.c (pass_data_pre): Add comment about PROP_no_crit_edges
in properties_required. Add PROP_no_crit_edges to properties_destroyed.
* tree-ssa-sink.c (pass_data_sink_code): Remove PROP_no_crit_edges
from properties_required.
From-SVN: r206517
PR ipa/58252
PR ipa/59226
* ipa-devirt.c record_target_from_binfo): Take as argument
stack of binfos and lookup matching one for virtual inheritance.
(possible_polymorphic_call_targets_1): Update.
* g++.dg/ipa/devirt-20.C: New testcase.
* g++.dg/torture/pr58252.C: Likewise.
* g++.dg/torture/pr59226.C: Likewise.
From-SVN: r206516
The spans array is allocated in runtime_mallocinit. On a
32-bit system the number of entries in the spans array is
MaxArena32 / PageSize, which (2U << 30) / (1 << 12) == (1 << 19).
So we are allocating an array that can hold 19 bits for an
index that can hold 20 bits. According to the comment in the
function, this is intentional: we only allocate enough spans
(and bitmaps) for a 2G arena, because allocating more would
probably be wasteful.
But since the span index is simply the upper 20 bits of the
memory address, this scheme only works if memory addresses are
limited to the low 2G of memory. That would be OK if we were
careful to enforce it, but we're not. What we are careful to
enforce, in functions like runtime_MHeap_SysAlloc, is that we
always return addresses between the heap's arena_start and
arena_start + MaxArena32.
We generally get away with it because we start allocating just
after the program end, so we only run into trouble with
programs that allocate a lot of memory, enough to get past
address 0x80000000.
This changes the code that computes a span index to subtract
arena_start on 32-bit systems just as we currently do on
64-bit systems.
From-SVN: r206501
2014-01-09 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* doc/invoke.texi: Add -maltivec={be,le} options, and document
default element-order behavior for -maltivec.
* config/rs6000/rs6000.opt: Add -maltivec={be,le} options.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Ensure
that -maltivec={le,be} implies -maltivec; disallow -maltivec=le
when targeting big endian, at least for now.
* config/rs6000/rs6000.h: Add #define of VECTOR_ELT_ORDER_BIG.
From-SVN: r206494
PR middle-end/47735
* cfgexpand.c (expand_one_var): For SSA_NAMEs, if the underlying
var satisfies use_register_for_decl, just take into account type
alignment, rather than decl alignment.
* gcc.target/i386/pr47735.c: New test.
From-SVN: r206493
PR tree-optimization/59622
* gimple-fold.c (gimple_fold_call): Fix a typo in message. For
__builtin_unreachable replace the OBJ_TYPE_REF call with a call to
__builtin_unreachable and add if needed a setter of the lhs SSA_NAME.
Don't devirtualize for inplace at all. For targets.length () == 1,
if the call is noreturn and cfun isn't in SSA form yet, clear lhs.
* g++.dg/opt/pr59622-2.C: New test.
* g++.dg/opt/pr59622-3.C: New test.
* g++.dg/opt/pr59622-4.C: New test.
* g++.dg/opt/pr59622-5.C: New test.
From-SVN: r206492
