PR middle-end/66820
* gimplify.c (maybe_fold_stmt): Don't fold in ORT_PARALLEL
or ORT_TASK contexts.
* omp-low.c (lower_omp): Call fold_stmt even if taskreg_nesting_level
is non-zero.
* gcc.dg/gomp/pr66820.c: New test.
From-SVN: r225661
2015-07-10 Tom de Vries <tom@codesourcery.com>
* tree-parloops.c (try_transform_to_exit_first_loop_alt): If not found,
insert nit + 1 bound.
* testsuite/libgomp.fortran/parloops-exit-first-loop-alt-2.f95: New test.
* testsuite/libgomp.fortran/parloops-exit-first-loop-alt.f95: New test.
* gfortran.dg/parloops-exit-first-loop-alt-2.f95: New test.
* gfortran.dg/parloops-exit-first-loop-alt.f95: New test.
From-SVN: r225655
2015-07-10 Richard Biener <rguenther@suse.de>
* tree-if-conv.c (if_convertible_gimple_assign_stmt_p):
Use ifcvt_could_trap_p also when not flag_tree_loop_if_convert_stores.
(if_convertible_loop_p_1): For this always compute bb predicates.
(if_convertible_loop_p): And free them.
From-SVN: r225654
2015-07-10 Richard Biener <rguenther@suse.de>
PR tree-optimization/66823
* tree-if-conv.c (memrefs_read_or_written_unconditionally): Fix
inverted predicate.
* gcc.dg/vect/pr61194.c: Remove -ftree-loop-if-convert-stores
which should not be necessary. XFAIL.
From-SVN: r225652
2015-07-09 Steve Ellcey <sellcey@imgtec.com>
* config/mips/mti-linux.h (MIPS_SYSVERSION_SPEC): Update
to handle mips[32|64]r3 and mips[32|64]r5.
From-SVN: r225643
PR middle-end/66633
* tree-nested.c (get_static_chain): Or in a flag into
info->static_chain_added.
(get_frame_field, get_nonlocal_debug_decl): Likewise.
(convert_nonlocal_omp_clauses, convert_local_omp_clauses): Revert
2015-07-01 changes.
(convert_tramp_reference_stmt): If a frame_decl or chain_decl
is needed newly inside of GIMPLE_OMP_{PARALLEL,TASK,TARGET} body,
add it to clauses.
* gcc.dg/gomp/pr66633-1.c: New test.
* gcc.dg/gomp/pr66633-2.c: New test.
* gcc.dg/gomp/pr66633-3.c: New test.
* gcc.dg/gomp/pr66633-4.c: New test.
From-SVN: r225638
PR tree-optimization/66718
* tree-vect-stmts.c (struct simd_call_arg_info): Add simd_lane_linear
field.
(vect_simd_lane_linear): New function.
(vectorizable_simd_clone_call): Support using linear arguments for
addresses of arrays elements indexed by GOMP_SIMD_LANE result.
From-SVN: r225637
We reduce code size for IA MCU by adjusting variable shift costs for IA
MCU
PR target/66821
* config/i386/i386.c (iamcu_cost): Adjust variable shift costs.
From-SVN: r225635
2015-07-09 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000-protos.h (rs6000_secondary_reload_memory):
Use machine mode, not enum machine_mode in the prototype.
* config/rs6000/rs6000.h (FLOAT128_IEEE_P): New helper macros to
classify 128-bit floating point support.
(FLOAT128_IBM_P): Likewise.
(FLOAT128_VECTOR_P): Likewise.
(FLOAT128_2REG_P): Likewise.
(SCALAR_FLOAT_MODE_NOT_VECTOR_P): Likewise.
(SLOW_UNALIGNED_ACCESS): Add IEEE 128-bit floating point support.
(HARD_REGNO_CALLER_SAVE_MODE): Likewise.
(HARD_REGNO_CALL_PART_CLOBBERED): Likewise.
* config/rs6000/rs6000.c (rs6000_hard_regno_nregs_internal): Drop
tests against TFmode/TDmode, since those modes do not use VSX
addresses.
(rs6000_hard_regno_mode_ok): Add IEEE 128-bit floating point
support.
(rs6000_init_hard_regno_mode_ok): Use new helper macros instead of
tests against TFmode, etc.
(invalid_e500_subreg): Add tests against IFmode/KFmode.
(reg_offset_addressing_ok_p): Likewise.
(rs6000_legitimate_offset_address_p): Likewise.
(rs6000_legitimize_address): Likewise.
(rs6000_legitimize_reload_address): Likewise.
(rs6000_legitimate_address_p): Clean up tests against TFmode and
TDmode to use the new helper macros, which will include IFmode and
KFmode.
(rs6000_emit_move): Likewise.
(rs6000_darwin64_record_arg_recurse): Likewise.
(print_operand): Likewise.
(rs6000_member_type_forces_blk): Treat IEEE 128-bit floating point
that uses a single vector register as a vector and not as a
floating point register in terms of the calling sequence.
(rs6000_discover_homogeneous_aggregate): Likewise.
(rs6000_return_in_memory): Likewise.
(init_cumulative_args): Likewise.
(rs6000_function_arg_boundary): Likewise.
(rs6000_function_arg_advance_1): Likewise.
(rs6000_function_arg): Likewise.
(rs6000_pass_by_reference): Likewise.
(rs6000_gimplify_va_arg): Likewise.
(rs6000_secondary_reload_memory): Use machine_mode not enum
machine mode.
(rs6000_split_multireg_move): Use new helper macros.
(spe_func_has_64bit_regs_p): Likewise.
(rs6000_output_function_epilogue): Add IFmode/KFmode support.
(output_toc): Use new helper macros.
(rs6000_register_move_cost): Likewise.
(rs6000_function_value): Add IEEE 128-bit floating point calling
sequence support.
(rs6000_libcall_value): Likewise.
(rs6000_scalar_mode_supported_p): Add support for IEEE 128-bit
floating point support.
(rs6000_vector_mode_supported_p): Likewise.
From-SVN: r225632
2015-07-09 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000-protos.h (rs6000_secondary_reload_memory):
Use machine mode, not enum machine_mode in the prototype.
* config/rs6000/rs6000.h (FLOAT128_IEEE_P): New helper macros to
classify 128-bit floating point support.
(FLOAT128_IBM_P): Likewise.
(FLOAT128_VECTOR_P): Likewise.
(FLOAT128_2REG_P): Likewise.
(SCALAR_FLOAT_MODE_NOT_VECTOR_P): Likewise.
(SLOW_UNALIGNED_ACCESS): Add IEEE 128-bit floating point support.
(HARD_REGNO_CALLER_SAVE_MODE): Likewise.
(HARD_REGNO_CALL_PART_CLOBBERED): Likewise.
* config/rs6000/rs6000.c (rs6000_hard_regno_nregs_internal): Drop
tests against TFmode/TDmode, since those modes do not use VSX
addresses.
(rs6000_hard_regno_mode_ok): Add IEEE 128-bit floating point
support.
(rs6000_init_hard_regno_mode_ok): Use new helper macros instead of
tests against TFmode, etc.
(invalid_e500_subreg): Add tests against IFmode/KFmode.
(reg_offset_addressing_ok_p): Likewise.
(rs6000_legitimate_offset_address_p): Likewise.
(rs6000_legitimize_address): Likewise.
(rs6000_legitimize_reload_address): Likewise.
(rs6000_legitimate_address_p): Clean up tests against TFmode and
TDmode to use the new helper macros, which will include IFmode and
KFmode.
(rs6000_emit_move): Likewise.
(rs6000_darwin64_record_arg_recurse): Likewise.
(print_operand): Likewise.
(rs6000_member_type_forces_blk): Treat IEEE 128-bit floating point
that uses a single vector register as a vector and not as a
floating point register in terms of the calling sequence.
(rs6000_discover_homogeneous_aggregate): Likewise.
(rs6000_return_in_memory): Likewise.
(init_cumulative_args): Likewise.
(rs6000_function_arg_boundary): Likewise.
(rs6000_function_arg_advance_1): Likewise.
(rs6000_function_arg): Likewise.
(rs6000_pass_by_reference): Likewise.
(rs6000_gimplify_va_arg): Likewise.
(rs6000_secondary_reload_memory): Use machine_mode not enum
machine mode.
(rs6000_split_multireg_move): Use new helper macros.
(spe_func_has_64bit_regs_p): Likewise.
(rs6000_output_function_epilogue): Add IFmode/KFmode support.
(output_toc): Use new helper macros.
(rs6000_register_move_cost): Likewise.
(rs6000_function_value): Add IEEE 128-bit floating point calling
sequence support.
(rs6000_libcall_value): Likewise.
(rs6000_scalar_mode_supported_p): Add support for IEEE 128-bit
floating point support.
(rs6000_vector_mode_supported_p): Likewise.
From-SVN: r225631
2015-07-09 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/66782
* lra-int.h (struct lra_insn_recog_data): Add comment about
clobbered hard regs for arg_hard_regs.
* lra.c (lra_set_insn_recog_data): Add clobbered hard regs.
* lra-lives.c (process_bb_lives): Process clobbered hard regs.
Add condition for processing used hard regs.
* lra-constraints.c (update_ebb_live_info, inherit_in_ebb):
Process clobbered hard regs.
From-SVN: r225618
2015-07-09 Richard Biener <rguenther@suse.de>
* genmatch.c (struct expr): Add force_single_use flag.
(expr::expr): Add copy constructor.
(capture_info::walk_match): Gather force_single_use captures.
(expr::gen_transform): Use possibly NULLified sequence.
(dt_simplify::gen): Apply single-use restrictions by NULLifying
seq if any constrained expr is not single-use.
(parser::parse_expr): Refactor to allow multiple flags. Handle
's' flag to force an expression have a single-use if the pattern
simplifies to more than one statement.
* match.pd: Convert most single_use conditionals to :s flags.
From-SVN: r225610
attribute ((aligned)) should align to the minimum of BIGGEST_ALIGNMENT,
which is 4 bytes for -miamcu.
gcc/
PR target/66818
* config/i386/i386.h (ATTRIBUTE_ALIGNED_VALUE): Defined to 32
for IA MCU.
gcc/testsuite/
PR target/66818
* gcc.target/i386/pr66818.c: New test.
From-SVN: r225606
ix86_return_in_memory should check negative return from int_size_in_bytes,
similar to other ports.
gcc/
PR target/66817
* config/i386/i386.c (ix86_return_in_memory): Return true
if int_size_in_bytes returns negative for IA MCU.
gcc/testsuite/
PR target/66817
* gcc.target/i386/pr66817.c: New test.
From-SVN: r225605
2015-07-08 Kito Cheng <kito.cheng@gmail.com>
* function.c (stack_protect_epilogue): Use if rather than switch for
check targetm.have_stack_protect_test.
From-SVN: r225599
Provide a default in files where that is possible, so that everything
else there can be unconditionally compiled. However rtlanal.c and
reload.c do tricky things that break providing a global default, so we
can't do that yet.
gcc/ChangeLog:
2015-07-08 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* combine.c (try_combine): Don't check if LOAD_EXTEND_OP is
defined.
(simplify_set): Likewise.
* cse.c (cse_insn): Likewise.
* fold-const.c (fold_single_bit_test): Likewise.
(fold_unary_loc): Likewise.
* postreload.c (reload_cse_simplify_set): Likewise.
(reload_cse_simplify_operands): Likewise.
From-SVN: r225591
* c-omp.c (c_omp_declare_simd_clauses_to_numbers): If all clauses
are to be removed, return NULL rather than original clauses list.
* decl.c (grokfndecl): Handle flag_openmp_simd like flag_openmp.
* pt.c (apply_late_template_attributes): Likewise.
* g++.dg/vect/vect.exp: Run also simd* tests.
* gcc.dg/vect/tree-vect.h (abort, exit): For C++ use extern "C".
(check_vect): Fix up get_cpuid call for C++.
* g++.dg/vect/simd-clone-1.cc: New test.
From-SVN: r225583
Richard Biener
Uros Bizjak
Jakub Jelinek
Kyrylo Tkachov
Paolo Carlini
Tom de Vries
Bernhard Reutner-Fischer
GCC Administrator
Steve Ellcey
John Marino
H.J. Lu
Michael Meissner
Jason Merrill
Andrew Sutton
Vladimir Makarov
Michael Matz
Uros Bizjak
Szabolcs Nagy
Andrew MacLeod
Marek Polacek
Kito Cheng
Carlos Sánchez de La Lama
Trevor Saunders
Jeff Law
Eric Botcazou