OpenE2K/gcc
2
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity
168,977 Commits 63 Branches 184 Tags 3.1 GiB
d1b2f85f78
Commit Graph

690 Commits

Author SHA1 Message Date
Jozef Lawrynowicz
d1b2f85f78 MSP430: Put libgcc shift functions in their own section 
2019-06-06  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* config/msp430/slli.S (__mspabi_slli_n): Put function in its own
	section.
	(__mspabi_slli): Likewise.
	(__mspabi_slll_n): Likewise.
	(__mspabi_slll): Likewise.
	* config/msp430/srai.S (__mspabi_srai_n): Likewise.
	(__mspabi_srai): Likewise.
	(__mspabi_sral_n): Likewise.
	(__mspabi_sral): Likewise.
	* config/msp430/srli.S (__mspabi_srli_n): Likewise.
	(__mspabi_srli): Likewise.
	(__mspabi_srll_n): Likewise.
	(__mspabi_srll): Likewise.

From-SVN: r271992
 2019-06-06 09:07:36 +00:00
Yoshinori Sato
e69a13d15d config.host (rx-*-linux*): Add t-fdpbit to tmake_file Add appropriate tm_file clause as well. 
* config.host (rx-*-linux*): Add t-fdpbit to tmake_file
        Add appropriate tm_file clause as well.
        * config/rx/t-rx (HOST_LIBGCC2_CFLAGS): Remove.

From-SVN: r271978
 2019-06-05 17:20:27 -06:00
James Clarke
b009eac157 crtbegin.S (__dso_handle): Put in .sdata/.sbss rather than .data/.bss so it can be accessed via... 
* config/ia64/crtbegin.S (__dso_handle): Put in .sdata/.sbss
	rather than .data/.bss so it can be accessed via gp-relative
	addressing.

From-SVN: r271977
 2019-06-05 16:27:37 -06:00
David Edelsohn
781d39f26e aix-unwind.h (LR_REGNO): Rename to R_LR. 
* config/rs6000/aix-unwind.h (LR_REGNO): Rename to R_LR.
(CR2_REGNO): Rename to R_CR2.
(XER_REGNO): Rename to R_XER.
(FIRST_ALTIVEC_REGNO): Rename to R_FIRST_ALTIVEC.
(VRSAVE_REGNO): Rename to R_VRSAVE.
(VSCR_REGNO): R_VSCR.

From-SVN: r271967
 2019-06-05 12:45:57 -04:00
Yoshinori Sato
76aaa9cdb1 config.gcc (rx-*-linux*): New target. 
* config.gcc (rx-*-linux*): New target.
	* config/rx/elf.opt: New file.
	* config/rx/linux.h: Likewise.
	* config/rx/t-linux: Likewise.
	* config/rx/rx.c (TARGET_SAVE_ACC_REGISTER): If not defined,
	make it zero.
	* config/rx/rx.h (ASM_APP_ON): Allow to be overridden.
	(ASM_APP_OFF): Likewise.
	* config/rx/rx.opt: Drop -msim and -mas100-syntax, they were
	moved elsewhere.

	* config.host (rx-*-linux*): Add new case.
	* config/rx/t-rx (HOST_LIBGCC2_CFLAGS): Force DFmode to SFmode.

From-SVN: r271748
 2019-05-29 12:36:06 -06:00
Sam Tebbs
8fc16d7252 [PATCH 3/3][GCC][AARCH64] Add support for pointer authentication B key 
gcc/
2019-05-29  Sam Tebbs  <sam.tebbs@arm.com>

	* config/aarch64/aarch64-builtins.c (aarch64_builtins): Add
	AARCH64_PAUTH_BUILTIN_AUTIB1716 and AARCH64_PAUTH_BUILTIN_PACIB1716.
	* config/aarch64/aarch64-builtins.c (aarch64_init_pauth_hint_builtins):
	Add autib1716 and pacib1716 initialisation.
	* config/aarch64/aarch64-builtins.c (aarch64_expand_builtin): Add checks
	for autib1716 and pacib1716.
	* config/aarch64/aarch64-protos.h (aarch64_key_type,
	aarch64_post_cfi_startproc): Define.
	* config/aarch64/aarch64-protos.h (aarch64_ra_sign_key): Define extern.
	* config/aarch64/aarch64.c (aarch64_handle_standard_branch_protection,
	aarch64_handle_pac_ret_protection): Set default sign key to A.
	* config/aarch64/aarch64.c (aarch64_expand_epilogue,
	aarch64_expand_prologue): Add check for b-key.
	* config/aarch64/aarch64.c (aarch64_ra_sign_key,
	aarch64_post_cfi_startproc, aarch64_handle_pac_ret_b_key): Define.
	* config/aarch64/aarch64.h (TARGET_ASM_POST_CFI_STARTPROC): Define.
	* config/aarch64/aarch64.c (aarch64_pac_ret_subtypes): Add "b-key".
	* config/aarch64/aarch64.md (unspec): Add UNSPEC_AUTIA1716,
	UNSPEC_AUTIB1716, UNSPEC_AUTIASP, UNSPEC_AUTIBSP, UNSPEC_PACIA1716,
	UNSPEC_PACIB1716, UNSPEC_PACIASP, UNSPEC_PACIBSP.
	* config/aarch64/aarch64.md (do_return): Add check for b-key.
	* config/aarch64/aarch64.md (<pauth_mnem_prefix>sp): Replace
	pauth_hint_num_a with pauth_hint_num.
	* config/aarch64/aarch64.md (<pauth_mnem_prefix>1716): Replace
	pauth_hint_num_a with pauth_hint_num.
	* config/aarch64/aarch64.opt (msign-return-address=): Deprecate.
	* config/aarch64/iterators.md (PAUTH_LR_SP): Add UNSPEC_AUTIASP,
	UNSPEC_AUTIBSP, UNSPEC_PACIASP, UNSPEC_PACIBSP.
	* config/aarch64/iterators.md (PAUTH_17_16): Add UNSPEC_AUTIA1716,
	UNSPEC_AUTIB1716, UNSPEC_PACIA1716, UNSPEC_PACIB1716.
	* config/aarch64/iterators.md (pauth_mnem_prefix): Add UNSPEC_AUTIA1716,
	UNSPEC_AUTIB1716, UNSPEC_PACIA1716, UNSPEC_PACIB1716, UNSPEC_AUTIASP,
	UNSPEC_AUTIBSP, UNSPEC_PACIASP, UNSPEC_PACIBSP.
	* config/aarch64/iterators.md (pauth_hint_num_a): Replace
	UNSPEC_PACI1716 and UNSPEC_AUTI1716 with UNSPEC_PACIA1716 and
	UNSPEC_AUTIA1716 respectively.
	* config/aarch64/iterators.md (pauth_hint_num_a): Rename to pauth_hint_num
	and add UNSPEC_PACIBSP, UNSPEC_AUTIBSP, UNSPEC_PACIB1716, UNSPEC_AUTIB1716.
	* doc/invoke.texi (-mbranch-protection): Add b-key type.
	* config/aarch64/aarch64-bti-insert.c (aarch64_pac_insn_p): Rename
	UNSPEC_PACISP to UNSPEC_PACIASP and UNSPEC_PACIBSP.

gcc/testsuite
2019-05-29  Sam Tebbs  <sam.tebbs@arm.com>

	* gcc.target/aarch64/return_address_sign_b_1.c: New file.
	* gcc.target/aarch64/return_address_sign_b_2.c: New file.
	* gcc.target/aarch64/return_address_sign_b_3.c: New file.
	* gcc.target/aarch64/return_address_sign_b_exception.c: New file.
	* gcc.target/aarch64/return_address_sign_ab_exception.c: New file.
	* gcc.target/aarch64/return_address_sign_builtin.c: New file

libgcc/
2019-05-29  Sam Tebbs  <sam.tebbs@arm.com>

	* config/aarch64/aarch64-unwind.h (aarch64_cie_signed_with_b_key): New
	function.
	* config/aarch64/aarch64-unwind.h (aarch64_post_extract_frame_addr,
	aarch64_post_frob_eh_handler_addr): Add	check for b-key.
	* config/aarch64/aarch64-unwind-h (aarch64_post_extract_frame_addr,
	aarch64_post_frob_eh_handler_addr, aarch64_post_frob_update_context):
	Rename RA_A_SIGNED_BIT to RA_SIGNED_BIT.
	* unwind-dw2-fde.c (get_cie_encoding): Add check for 'B' in augmentation
	string.
	* unwind-dw2.c (extract_cie_info): Add check for 'B' in augmentation
	string.
	(RA_A_SIGNED_BIT): Rename to RA_SIGNED_BIT.

From-SVN: r271735
 2019-05-29 09:22:17 +00:00
Rainer Orth
e54b1a92ac Remove pre-Solaris 11/SPARC unwinding support 
* config/sparc/sol2-unwind.h [__arch64__] (sparc64_is_sighandler):
	Remove Solaris 9 and 10 support.
	(sparc_is_sighandler): Likewise.

From-SVN: r271715
 2019-05-28 17:27:51 +00:00
John David Anglin
abbb83070a linux-unwind.h (pa32_fallback_frame_state): Add cast. 
* config/pa/linux-unwind.h (pa32_fallback_frame_state): Add cast.

From-SVN: r271631
 2019-05-26 15:16:50 +00:00
Kwok Cheung Yeung
7039cebfa8 Add support for constructors and destuctors on GCN 
2019-05-22  Kwok Cheung Yeung  <kcy@codesourcery.com>
            Andrew Stubbs  <amd@codesourcery.com>

	gcc/
	* config.gcc (gcc_cv_initfini_array): Set for AMD GCN.
	* config/gcn/gcn-run.c (init_array_kernel, fini_array_kernel): New.
	(kernel): Rename to...
	(main_kernel): ... this.
	(load_image): Load _init_array and _fini_array kernels.
	(run): Add argument for kernel to run.
	(main): Run init_array_kernel before main_kernel, and
	fini_array_kernel after.
	* config/gcn/gcn.c (gcn_handle_amdgpu_hsa_kernel_attribute): Allow
	amdgpu_hsa_kernel attribute on functions.
	(gcn_disable_constructors): Delete.
	(TARGET_ASM_CONSTRUCTOR, TARGET_ASM_DESTRUCTOR): Delete.
	* config/gcn/crt0.c (size_t): Define.
	(_init_array, _fini_array): New.
	(__preinit_array_start, __preinit_array_end,
	__init_array_start, __init_array_end,
	__fini_array_start, __fini_array_end): Declare weak references.

Co-Authored-By: Andrew Stubbs <ams@codesourcery.com>

From-SVN: r271526
 2019-05-22 22:14:08 +00:00
H.J. Lu
2581344df6 soft-fp: Update soft-fp from glibc 
This patch is updating all soft-fp from glibc, most changes are
copyright years update, and changes other than years update are

	* soft-fp/extenddftf2.c: Use "_FP_W_TYPE_SIZE < 64" to check if
	4_FP_W_TYPEs are used for IEEE quad precision.
	* soft-fp/extendhftf2.c: Likewise.
	* soft-fp/extendsftf2.c: Likewise.
	* soft-fp/extendxftf2.c: Likewise.
	* soft-fp/trunctfdf2.c: Likewise.
	* soft-fp/trunctfhf2.c: Likewise.
	* soft-fp/trunctfsf2.c: Likewise.
	* soft-fp/trunctfxf2.c: Likewise.
	* config/rs6000/ibm-ldouble.c: Likewise.

From-SVN: r271327
 2019-05-17 07:37:39 -07:00
Rainer Orth
ccd1242eec Remove obsolete Solaris 10 support 
libstdc++-v3:
	* config/os/solaris/solaris2.10: Move to ...
	* config/os/solaris: ... this.
	* configure.host (os_include_dir): Adapt.
	(abi_baseline_pair): Remove Solaris 10 handling.
	* config/abi/post/i386-solaris2.10: Remove.
	* config/abi/post/sparc-solaris2.10: Remove.
	* config/abi/post/i386-solaris2.11: Rename to ...
	* config/abi/post/i386-solaris: ... this.
	* config/abi/post/sparc-solaris2.11: Rename to ...
	* config/abi/post/sparc-solaris: ... this.

	* libsupc++/new_opa.cc [_GLIBCXX_HAVE_MEMALIGN] [__sun]: Remove
	workaround.

	* testsuite/ext/enc_filebuf/char/13598.cc: Remove *-*-solaris2.10
	xfail.

	libsanitizer:
	* configure.ac (have_dl_iterate_phdr): Remove *-*-solaris2.10*
	handling.
	* configure: Regenerate.

	libgcc:
	* config.host: Simplify various *-*-solaris2.1[0-9]* to
	*-*-solaris2*.
	* configure.ac: Likewise.
	* configure: Regenerate.

	* config/i386/sol2-unwind.h (x86_fallback_frame_state): Remove
	Solaris 10 and Solaris 11 < snv_125 handling.

	libbacktrace:
	* configure.ac (have_dl_iterate_phdr): Remove *-*-solaris2.10*
	handling.
	* configure: Regenerate.

	gcc/testsuite:
	* gcc.dg/atomic/c11-atomic-exec-4.c: Simplify triplet to
	*-*-solaris2*.
	* gcc.dg/atomic/c11-atomic-exec-5.c: Likewise.
	* gcc.dg/c99-math-double-1.c: Likewise.
	* gcc.dg/c99-math-float-1.c: Likewise.
	* gcc.dg/c99-math-long-double-1.c: Likewise.
	* gcc.misc-tests/linkage.exp: Simplify triplet to
	x86_64-*-solaris2*.

	* gcc.target/i386/mcount_pic.c: Remove *-*-solaris2.10* && !gld
	xfail.
	* gcc.target/i386/pr63620.c: Likewise.

	* lib/target-supports.exp (check_sse_os_support_available): Remove
	Solaris 9/x86 workaround.

	gcc:
	* config.gcc: Move *-*-solaris2.10* from obsolete configurations
	to unsupported ones.
	Simplify x86_64-*-solaris2.1[0-9]* to x86_64-*-solaris2*.
	* config.host: Likewise.
	* config/i386/sol2.h (ASM_COMMENT_START): Remove.
	* config/sparc/driver-sparc.c (host_detect_local_cpu) [__sun__ &&
	__svr4__]: Remove "brand" fallback.
	[!KSTAT_DATA_STRING]: Remove.
	* configure.ac (gcc_cv_ld_hidden): Simplify *-*-solaris2.1[0-9]*
	to *-*-solaris2*.
	(comdat_group): Likewise.
	(set_have_as_tls): Likewise.
	(gcc_cv_target_dl_iterate_phdr): Likewise.
	(gcc_cv_as_shf_merge): Remove Solaris 10/x86 workaround.
	(gcc_cv_ld_aligned_shf_merge): Remove Solaris 10/SPARC workaround.
	* configure: Regenerate.
	* doc/install.texi: Simplify Solaris target triplets.
	(Specific, i?86-*-solaris2*): Remove Solaris 10 references.
	(Specific, *-*-solaris2*): Document Solaris 10 removal.
	Remove Solaris 10 references.
	Remove obsolete Solaris bug reference.
	(Specific, sparc-sun-solaris2.10): Remove.

From-SVN: r271183
 2019-05-14 17:17:23 +00:00
Iain Sandoe
ef5eb79dfd darwin, powerpc - set .machine in an asm file. 
The asm file fails to build if we use a modern assembler
which checks that the machine is consistent with the 
filetype.  Fixed by adjusting in a similar manner to 
other assembler.

libgcc/

2019-05-12  Iain Sandoe  <iain@sandoe.co.uk>

	* config/rs6000/darwin-vecsave.S: Set .machine appropriately.

From-SVN: r271111
 2019-05-12 19:26:16 +00:00
Hongtao Liu
4f0e90fae9 Enable support for bfloat16 which will be in Future Cooper Lake. 
There are 3 instructions for AVX512BF16: VCVTNE2PS2BF16, VCVTNEPS2BF16 and
DPBF16PS instructions, which are Vector Neural Network Instructions
supporting:
    
- VCVTNE2PS2BF16: Convert Two Packed Single Data to One Packed BF16 Data.
- VCVTNEPS2BF16: Convert Packed Single Data to Packed BF16 Data.
- VDPBF16PS: Dot Product of BF16 Pairs Accumulated into Packed Single Precision.

2019-05-07  Wei Xiao  <wei3.xiao@intel.com>

	* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512BF16_SET
	OPTION_MASK_ISA_AVX512BF16_UNSET, OPTION_MASK_ISA2_AVX512BW_UNSET): New.
	(OPTION_MASK_ISA2_AVX512F_UNSET): Add OPTION_MASK_ISA_AVX512BF16_UNSET.
	(ix86_handle_option): Handle -mavx512bf16.
	* config.gcc: Add avx512bf16vlintrin.h and avx512bf16intrin.h
	to extra_headers.
	* config/i386/avx512bf16vlintrin.h: New.
	* config/i386/avx512bf16intrin.h: New.
	* config/i386/cpuid.h (bit_AVX512BF16): New.
	* config/i386/driver-i386.c (host_detect_local_cpu): Detect BF16.
	* config/i386/i386-builtin-types.def: Add new types.
	* config/i386/i386-builtin.def: Add new builtins.
	* config/i386/i386-c.c (ix86_target_macros_internal): Define
	__AVX512BF16__.
	* config/i386/i386-option.c (ix86_target_string): Add -mavx512bf16.
	(ix86_option_override_internal): Handle BF16.
	(ix86_valid_target_attribute_inner_p): Ditto.
	* config/i386/i386-expand.c (ix86_expand_args_builtin): Ditto.
	* config/i386/i386-builtin.c (enum processor_features): Add
	F_AVX512BF16.
	(static const _isa_names_table isa_names_table): Ditto.
	* config/i386/i386.h (TARGET_AVX512BF16, TARGET_AVX512BF16_P): New.
	(PTA_AVX512BF16): Ditto.
	* config/i386/i386.opt: Add -mavx512bf16.
	* config/i386/immintrin.h: Include avx512bf16intrin.h
	and avx512bf16vlintrin.h.
	* config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode><mask_name>,
	avx512f_cvtneps2bf16_<mode><mask_name>,
	avx512f_dpbf16ps_<mode><mask_half_name>): New define_insn patterns.
	* config/i386/subst.md (mask_half): Add new subst.
	* doc/invoke.texi: Document -mavx512bf16.

2019-05-07  Wei Xiao  <wei3.xiao@intel.com>

	* gcc.target/i386/avx512bf16-vcvtne2ps2bf16-1.c: New test.
	* gcc.target/i386/avx512bf16-vcvtneps2bf16-1.c: New test.
	* gcc.target/i386/avx512bf16-vdpbf16ps-1.c: New test.
	* gcc.target/i386/avx512bf16vl-vcvtne2ps2bf16-1.c: New test.
	* gcc.target/i386/avx512bf16vl-vcvtneps2bf16-1.c: New test.
	* gcc.target/i386/avx512bf16vl-vdpbf16ps-1.c: New test.
	* gcc.target/i386/builtin_target.c: Handle avx512bf16.
	* gcc.target/i386/sse-12.c: Add -mavx512bf16.
	* gcc.target/i386/sse-13.c: Ditto.
	* gcc.target/i386/sse-14.c: Ditto.
	* gcc.target/i386/sse-22.c: Ditto.
	* gcc.target/i386/sse-23.c: Ditto.
	* g++.dg/other/i386-2.C: Ditto.
	* g++.dg/other/i386-3.C: Ditto.

2019-05-07  Hongtao Liu  <hongtao.liu@intel.com>

	* config/i386/cpuinfo.c (get_available_features): Detect BF16.
	* config/i386/cpuinfo.h (enum processor_features): Add
	FEATURE_AVX512BF16.

From-SVN: r271006
 2019-05-08 10:21:40 +00:00
Ramana Radhakrishnan
48528842bd re PR target/89093 (C++ exception handling clobbers d8 VFP register) 
PR target/89093
	* config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Diagnose
	if used with general-regs-only.
	(arm_conditional_register_usage): Don't add non-general regs if
	general-regs-only.
	(arm_valid_target_attribute_rec): Handle general-regs-only.
	* config/arm/arm.h (TARGET_HARD_FLOAT): Return false if
	general-regs-only.
	(TARGET_HARD_FLOAT_SUB): Define.
	(TARGET_SOFT_FLOAT): Define as negation of TARGET_HARD_FLOAT_SUB.
	(TARGET_REALLY_IWMMXT): Add && !TARGET_GENERAL_REGS_ONLY.
	(TARGET_REALLY_IWMMXT2): Likewise.
	* config/arm/arm.opt: Add -mgeneral-regs-only.
	* doc/extend.texi: Document ARM general-regs-only target.
	* doc/invoke.texi: Document ARM -mgeneral-regs-only.
libgcc/
	* config/arm/pr-support.c: Add #pragma GCC target("general-regs-only").
	* config/arm/unwind-arm.c: Likewise.
	* unwind-c.c (PERSONALITY_FUNCTION): Add general-regs-only target
	attribute for ARM.
libobjc/
	* exception.c (PERSONALITY_FUNCTION): Add general-regs-only target
	attribute for ARM.
libphobos/
	* libdruntime/gcc/deh.d: Import gcc.attribute.
	(personality_fn_attributes): New enum.
	(scanLSDA, CONTINUE_UNWINDING, gdc_personality, __gdc_personality):
	Add @personality_fn_attributes.
libstdc++-v3/
	* libsupc++/eh_personality.cc (PERSONALITY_FUNCTION): Add
	general-regs-only target attribute for ARM.

Co-Authored-By: Bernd Edlinger <bernd.edlinger@hotmail.de>
Co-Authored-By: Jakub Jelinek <jakub@redhat.com>

From-SVN: r270504
 2019-04-23 12:03:41 +02:00
Monk Chiang
887e182f05 [NDS32] Refine force unwind. Linux kernel only uses RT_SIGRETURN. 
libgcc/
	* config/nds32/linux-unwind.h (SIGRETURN): Remove.
	(RT_SIGRETURN): Update.
	(nds32_fallback_frame_state): Update.

From-SVN: r270363
 2019-04-15 08:19:23 +00:00
Uros Bizjak
1ed28eda9f linux-unwind.h (alpha_fallback_frame_state): Cast 'mcontext_t *' &rt_->uc.uc_mcontext to 'struct sigcontext *'. 
* config/alpha/linux-unwind.h (alpha_fallback_frame_state):
	Cast 'mcontext_t *' &rt_->uc.uc_mcontext to 'struct sigcontext *'.

From-SVN: r269053
 2019-02-20 22:37:21 +01:00
Eric Botcazou
bf7988f1e9 lib2funcs.c (__set_trampoline_parity): Replace TRAMPOLINE_SIZE with __LIBGCC_TRAMPOLINE_SIZE__. 
libgcc/
	* config/visium/lib2funcs.c (__set_trampoline_parity): Replace
	TRAMPOLINE_SIZE with __LIBGCC_TRAMPOLINE_SIZE__.
gcc/
	* final.c (insn_current_reference_address): Replace test on JUMP_P
	with test on jump_to_label_p.
	* config/visium/visium-passes.def: New file.
	* config/visium/t-visium (PASSES_EXTRA): Define.
	* config/visium/visium-protos.h (make_pass_visium_reorg): Declare.
	* config/visium/visium.h (TRAMPOLINE_SIZE): Adjust.
	(TRAMPOLINE_ALIGNMENT): Define.
	* config/visium/visium.c (visium_option_override): Do not register
	the machine-specific reorg pass here.
	(visium_trampoline_init): Align the BRA insn on a 64-bit boundary
	for the GR6.
	(output_branch): Adjust threshold for long branch instruction.
	* config/visium/visium.md (cpu): Move around.
	(length): Adjust for the GR6.

From-SVN: r268931
 2019-02-15 10:40:34 +00:00
Uros Bizjak
ba2c1ca8c3 t-linux: Add -mfp-rounding-mode=d to HOST_LIBGCC2_CFLAGS. 
* config/alpha/t-linux: Add -mfp-rounding-mode=d
	to HOST_LIBGCC2_CFLAGS.

From-SVN: r268430
 2019-01-31 21:49:02 +01:00
Uros Bizjak
d1ac2471e7 sfp-exceptions.c (__sfp_handle_exceptions): Remove stray semicolon. 
* config/i386/sfp-exceptions.c (__sfp_handle_exceptions):
	Remove stray semicolon.

From-SVN: r268405
 2019-01-31 00:09:40 +01:00
Andrew Stubbs
91d7b7fe84 GCN libgcc. 
This patch contains the GCN port of libgcc.

2019-01-17  Andrew Stubbs  <ams@codesourcery.com>
	    Kwok Cheung Yeung  <kcy@codesourcery.com>
	    Julian Brown  <julian@codesourcery.com>
	    Tom de Vries  <tom@codesourcery.com>

	libgcc/
	* config.host: Recognize amdgcn*-*-amdhsa.
	* config/gcn/crt0.c: New file.
	* config/gcn/lib2-divmod-hi.c: New file.
	* config/gcn/lib2-divmod.c: New file.
	* config/gcn/lib2-gcn.h: New file.
	* config/gcn/sfp-machine.h: New file.
	* config/gcn/t-amdgcn: New file.


Co-Authored-By: Julian Brown <julian@codesourcery.com>
Co-Authored-By: Kwok Cheung Yeung <kcy@codesourcery.com>
Co-Authored-By: Tom de Vries <tom@codesourcery.com>

From-SVN: r268021
 2019-01-17 12:29:13 +00:00
Sandra Loosemore
6791469314 PR other/16615 [1/5] 
2019-01-09  Sandra Loosemore  <sandra@codesourcery.com>

	PR other/16615 [1/5]

	contrib/
	* mklog: Mechanically replace "can not" with "cannot".

	gcc/
	* Makefile.in: Mechanically replace "can not" with "cannot".
	* alias.c: Likewise.
	* builtins.c: Likewise.
	* calls.c: Likewise.
	* cgraph.c: Likewise.
	* cgraph.h: Likewise.
	* cgraphclones.c: Likewise.
	* cgraphunit.c: Likewise.
	* combine-stack-adj.c: Likewise.
	* combine.c: Likewise.
	* common/config/i386/i386-common.c: Likewise.
	* config/aarch64/aarch64.c: Likewise.
	* config/alpha/sync.md: Likewise.
	* config/arc/arc.c: Likewise.
	* config/arc/predicates.md: Likewise.
	* config/arm/arm-c.c: Likewise.
	* config/arm/arm.c: Likewise.
	* config/arm/arm.h: Likewise.
	* config/arm/arm.md: Likewise.
	* config/arm/cortex-r4f.md: Likewise.
	* config/csky/csky.c: Likewise.
	* config/csky/csky.h: Likewise.
	* config/darwin-f.c: Likewise.
	* config/epiphany/epiphany.md: Likewise.
	* config/i386/i386.c: Likewise.
	* config/i386/sol2.h: Likewise.
	* config/m68k/m68k.c: Likewise.
	* config/mcore/mcore.h: Likewise.
	* config/microblaze/microblaze.md: Likewise.
	* config/mips/20kc.md: Likewise.
	* config/mips/sb1.md: Likewise.
	* config/nds32/nds32.c: Likewise.
	* config/nds32/predicates.md: Likewise.
	* config/pa/pa.c: Likewise.
	* config/rs6000/e300c2c3.md: Likewise.
	* config/rs6000/rs6000.c: Likewise.
	* config/s390/s390.h: Likewise.
	* config/sh/sh.c: Likewise.
	* config/sh/sh.md: Likewise.
	* config/spu/vmx2spu.h: Likewise.
	* cprop.c: Likewise.
	* dbxout.c: Likewise.
	* df-scan.c: Likewise.
	* doc/cfg.texi: Likewise.
	* doc/extend.texi: Likewise.
	* doc/fragments.texi: Likewise.
	* doc/gty.texi: Likewise.
	* doc/invoke.texi: Likewise.
	* doc/lto.texi: Likewise.
	* doc/md.texi: Likewise.
	* doc/objc.texi: Likewise.
	* doc/rtl.texi: Likewise.
	* doc/tm.texi: Likewise.
	* dse.c: Likewise.
	* emit-rtl.c: Likewise.
	* emit-rtl.h: Likewise.
	* except.c: Likewise.
	* expmed.c: Likewise.
	* expr.c: Likewise.
	* fold-const.c: Likewise.
	* genautomata.c: Likewise.
	* gimple-fold.c: Likewise.
	* hard-reg-set.h: Likewise.
	* ifcvt.c: Likewise.
	* ipa-comdats.c: Likewise.
	* ipa-cp.c: Likewise.
	* ipa-devirt.c: Likewise.
	* ipa-fnsummary.c: Likewise.
	* ipa-icf.c: Likewise.
	* ipa-inline-transform.c: Likewise.
	* ipa-inline.c: Likewise.
	* ipa-polymorphic-call.c: Likewise.
	* ipa-profile.c: Likewise.
	* ipa-prop.c: Likewise.
	* ipa-pure-const.c: Likewise.
	* ipa-reference.c: Likewise.
	* ipa-split.c: Likewise.
	* ipa-visibility.c: Likewise.
	* ipa.c: Likewise.
	* ira-build.c: Likewise.
	* ira-color.c: Likewise.
	* ira-conflicts.c: Likewise.
	* ira-costs.c: Likewise.
	* ira-int.h: Likewise.
	* ira-lives.c: Likewise.
	* ira.c: Likewise.
	* ira.h: Likewise.
	* loop-invariant.c: Likewise.
	* loop-unroll.c: Likewise.
	* lower-subreg.c: Likewise.
	* lra-assigns.c: Likewise.
	* lra-constraints.c: Likewise.
	* lra-eliminations.c: Likewise.
	* lra-lives.c: Likewise.
	* lra-remat.c: Likewise.
	* lra-spills.c: Likewise.
	* lra.c: Likewise.
	* lto-cgraph.c: Likewise.
	* lto-streamer-out.c: Likewise.
	* postreload-gcse.c: Likewise.
	* predict.c: Likewise.
	* profile-count.h: Likewise.
	* profile.c: Likewise.
	* recog.c: Likewise.
	* ree.c: Likewise.
	* reload.c: Likewise.
	* reload1.c: Likewise.
	* reorg.c: Likewise.
	* resource.c: Likewise.
	* rtl.def: Likewise.
	* rtl.h: Likewise.
	* rtlanal.c: Likewise.
	* sched-deps.c: Likewise.
	* sched-ebb.c: Likewise.
	* sched-rgn.c: Likewise.
	* sel-sched-ir.c: Likewise.
	* sel-sched.c: Likewise.
	* shrink-wrap.c: Likewise.
	* simplify-rtx.c: Likewise.
	* symtab.c: Likewise.
	* target.def: Likewise.
	* toplev.c: Likewise.
	* tree-call-cdce.c: Likewise.
	* tree-cfg.c: Likewise.
	* tree-complex.c: Likewise.
	* tree-core.h: Likewise.
	* tree-eh.c: Likewise.
	* tree-inline.c: Likewise.
	* tree-loop-distribution.c: Likewise.
	* tree-nrv.c: Likewise.
	* tree-profile.c: Likewise.
	* tree-sra.c: Likewise.
	* tree-ssa-alias.c: Likewise.
	* tree-ssa-dce.c: Likewise.
	* tree-ssa-dom.c: Likewise.
	* tree-ssa-forwprop.c: Likewise.
	* tree-ssa-loop-im.c: Likewise.
	* tree-ssa-loop-ivcanon.c: Likewise.
	* tree-ssa-loop-ivopts.c: Likewise.
	* tree-ssa-loop-niter.c: Likewise.
	* tree-ssa-phionlycprop.c: Likewise.
	* tree-ssa-phiopt.c: Likewise.
	* tree-ssa-propagate.c: Likewise.
	* tree-ssa-threadedge.c: Likewise.
	* tree-ssa-threadupdate.c: Likewise.
	* tree-ssa-uninit.c: Likewise.
	* tree-ssanames.c: Likewise.
	* tree-streamer-out.c: Likewise.
	* tree.c: Likewise.
	* tree.h: Likewise.
	* vr-values.c: Likewise.

	gcc/ada/
	* exp_ch9.adb: Mechanically replace "can not" with "cannot".
	* libgnat/s-regpat.ads: Likewise.
	* par-ch4.adb: Likewise.
	* set_targ.adb: Likewise.
	* types.ads: Likewise.

	gcc/cp/
	* cp-tree.h: Mechanically replace "can not" with "cannot".
	* parser.c: Likewise.
	* pt.c: Likewise.

	gcc/fortran/
	* class.c: Mechanically replace "can not" with "cannot".
	* decl.c: Likewise.
	* expr.c: Likewise.
	* gfc-internals.texi: Likewise.
	* intrinsic.texi: Likewise.
	* invoke.texi: Likewise.
	* io.c: Likewise.
	* match.c: Likewise.
	* parse.c: Likewise.
	* primary.c: Likewise.
	* resolve.c: Likewise.
	* symbol.c: Likewise.
	* trans-array.c: Likewise.
	* trans-decl.c: Likewise.
	* trans-intrinsic.c: Likewise.
	* trans-stmt.c: Likewise.

	gcc/go/
	* go-backend.c: Mechanically replace "can not" with "cannot".
	* go-gcc.cc: Likewise.

	gcc/lto/
	* lto-partition.c: Mechanically replace "can not" with "cannot".
	* lto-symtab.c: Likewise.
	* lto.c: Likewise.

	gcc/objc/
	* objc-act.c: Mechanically replace "can not" with "cannot".

	libbacktrace/
	* backtrace.h: Mechanically replace "can not" with "cannot".

	libgcc/
	* config/c6x/libunwind.S: Mechanically replace "can not" with
	"cannot".
	* config/tilepro/atomic.h: Likewise.
	* config/vxlib-tls.c: Likewise.
	* generic-morestack-thread.c: Likewise.
	* generic-morestack.c: Likewise.
	* mkmap-symver.awk: Likewise.

	libgfortran/
	* caf/single.c: Mechanically replace "can not" with "cannot".
	* io/unit.c: Likewise.

	libobjc/
	* class.c: Mechanically replace "can not" with "cannot".
	* objc/runtime.h: Likewise.
	* sendmsg.c: Likewise.

	liboffloadmic/
	* include/coi/common/COIResult_common.h: Mechanically replace
	"can not" with "cannot".
	* include/coi/source/COIBuffer_source.h: Likewise.

	libstdc++-v3/
	* include/ext/bitmap_allocator.h: Mechanically replace "can not"
	with "cannot".

From-SVN: r267783
 2019-01-09 16:37:45 -05:00
Jakub Jelinek
a554497024 Update copyright years. 
From-SVN: r267494
 2019-01-01 13:31:55 +01:00
Thomas Preud'homme
72e3a52923 [ARM] Optimize executable size when using softfloat fmul/dmul 
Softfloat single precision and double precision floating-point
multiplication routines in libgcc share some code with the
floating-point division of their corresponding precision. As the code
is structured now, this leads to *all* division code being pulled in an
executable in softfloat mode even if only multiplication is
performed.

This patch create some new LIB1ASMFUNCS macros to also build files with
just the multiplication and shared code as weak symbols. By putting
these earlier in the static library, they can then be picked up when
only multiplication is used and they are overriden by the global
definition in the existing file containing both multiplication and
division code when division is needed.

The patch also removes changes made to the FUNC_START and ARM_FUNC_START
macros in r218124 since the intent was to put multiplication and
division code into their own section in a later patch to achieve the
same size optimization. That approach relied on specific section layout
to ensure multiplication and division were not too far from the shared
bit of code in order to the branches to be within range. Due to lack of
guarantee regarding section layout, in particular with all the
possibility of linker scripts, this approach was chosen instead. This
patch keeps the two testcases that were posted by Tony Wang on the mailing
list to implement this approach and adds a new one.

2018-12-19  Thomas Preud'homme  <thomas.preudhomme@linaro.org>

    libgcc/
    * /config/arm/lib1funcs.S (FUNC_START): Remove unused sp_section
    parameter and corresponding code.
    (ARM_FUNC_START): Likewise in both definitions.
    Also update footer comment about condition that need to match with
    gcc/config/arm/elf.h to also include libgcc/config/arm/t-arm.
    * config/arm/ieee754-df.S (muldf3): Also build it if L_arm_muldf3 is
    defined.  Weakly define it in this case.
    * config/arm/ieee754-sf.S (mulsf3): Likewise with L_arm_mulsf3.
    * config/arm/t-elf (LIB1ASMFUNCS): Build _arm_muldf3.o and
    _arm_mulsf3.o before muldiv versions if targeting Thumb-1 only. Add
    comment to keep condition in sync with the one in
    libgcc/config/arm/lib1funcs.S and gcc/config/arm/elf.h.

    gcc/
    * config/arm/elf.h: Update comment about condition that need to
    match with libgcc/config/arm/lib1funcs.S to also include
    libgcc/config/arm/t-arm.
    * doc/sourcebuild.texi (output-exists, output-exists-not): Rename
    subsubsection these directives are in to "Check for output files".
    Move scan-symbol to that section and add to it new scan-symbol-not
    directive.

2018-12-19  Tony Wang  <tony.wang@arm.com>
	    Thomas Preud'homme  <thomas.preudhomme@linaro.org>

    gcc/testsuite/
    * lib/lto.exp (lto-execute): Define output_file and testname_with_flags
    to same value as execname.
    (scan-symbol): Move and rename to ...
    * lib/gcc-dg.exp (scan-symbol-common): This.  Adapt into a
    helper function returning true or false if a symbol is present.
    (scan-symbol): New procedure.
    (scan-symbol-not): Likewise.
    * gcc.target/arm/size-optimization-ieee-1.c: New testcase.
    * gcc.target/arm/size-optimization-ieee-2.c: Likewise.
    * gcc.target/arm/size-optimization-ieee-3.c: Likewise.

From-SVN: r267282
 2018-12-19 17:34:18 +00:00
Wei Xiao
5d54c79858 driver-i386.c (host_detect_local_cpu): Detect cascadelake. 
gcc/ChangeLog
2018-12-18  Wei Xiao  <wei3.xiao@intel.com>

	* config/i386/driver-i386.c (host_detect_local_cpu): Detect cascadelake.
	* config/i386/i386.c (fold_builtin_cpu): Handle cascadelake.
	* doc/extend.texi: Add cascadelake.

gcc/testsuite/ChangeLog
2018-12-18  Wei Xiao  <wei3.xiao@intel.com>

	* g++.target/i386/mv16.C: Handle new march.
	* gcc.target/i386/builtin_target.c: Ditto.

libgcc/ChangeLog
2018-12-18  Wei Xiao  <wei3.xiao@intel.com>

	* config/i386/cpuinfo.c (get_intel_cpu): Handle cascadelake.
	* config/i386/cpuinfo.h: Add INTEL_COREI7_CASCADELAKE.

From-SVN: r267226
 2018-12-18 03:41:44 +00:00
Rasmus Villemoes
5a2580b6ad libgcc: rs6000: tramp.S: fix placement of .cfi_endproc for __trampoline_setup 
Currently, .cfi_endproc and FUNC_END(__trampoline_setup) are placed
inside the #else branch of an "#if defined (__VXWORKS__) ...", so
non-pic vxworks does not get proper CFI nor a .size directive for
__trampoline_setup. I assume there's no magic reason for that (which
would warrant a comment), so move them outside.

From-SVN: r267051
 2018-12-12 10:12:36 +00:00
Alan Modra
1ea7ea181d [RS6000] libgcc cfi 
There are a few places in libgcc assembly where we don't emit call
frame information for functions, potentially breaking unwinding from
asynchronous signal handlers.  This patch fixes them.  Although I
patch tramp.S there is no attempt made to provide CFI for the actual
trampoline on the stack.  Doing that would require generating CFI at
run time and both registering and deregistering it, which is probably
not worth doing since it would significantly slow down the call.

	* config/rs6000/morestack.S (__stack_split_initialize),
	(__morestack_get_guard, __morestack_set_guard),
	(__morestack_make_guard): Provide CFI covering these functions.
	* config/rs6000/tramp.S (__trampoline_setup): Likewise.

From-SVN: r266503
 2018-11-27 12:29:56 +10:30
Xianmiao Qu
ff641ae112 linux-unwind.h (sc_pt_regs): Update for kernel. 
2018-11-15  Xianmiao Qu  <xianmiao_qu@c-sky.com>

	libgcc/
	* config/csky/linux-unwind.h (sc_pt_regs): Update for kernel. 
	(sc_pt_regs_lr): Update for kernel.
	(sc_pt_regs_tls): Update for kernel.

From-SVN: r266200
 2018-11-16 01:26:04 +00:00
Xianmiao Qu
2820937241 csky-linux-elf.h (LINUX_DYNAMIC_LINKER): Remove. 
2018-11-15  Xianmiao Qu  <xianmiao_qu@c-sky.com>

	gcc/
	* config/csky/csky-linux-elf.h (LINUX_DYNAMIC_LINKER): Remove.
	(GLIBC_DYNAMIC_LINKER): Define.
	(LINUX_TARGET_LINK_SPEC): Update the dynamic linker's name.

	libgcc/
	* config/csky/linux-unwind.h: Fix coding style.

From-SVN: r266172
 2018-11-15 06:01:09 +00:00
Xianmiao Qu
b2a71af6e2 linux-unwind.h (_sig_ucontext_t): Remove. 
2018-11-13  Xianmiao Qu  <xianmiao_qu@c-sky.com>

	libgcc/
	* config/csky/linux-unwind.h (_sig_ucontext_t): Remove.
	(csky_fallback_frame_state): Modify the check of the 
	instructions to adapt to changes in the kernel

From-SVN: r266060
 2018-11-13 09:12:36 +00:00
Stafford Horne
d929e137f8 or1k: libgcc: initial support for openrisc 
libgcc/ChangeLog:

2018-11-09  Stafford Horne  <shorne@gmail.com>
	    Richard Henderson  <rth@twiddle.net>

	* config.host: Add OpenRISC support.
	* config/or1k/*: New.


Co-Authored-By: Richard Henderson <rth@twiddle.net>

From-SVN: r265961
 2018-11-09 12:09:15 +00:00
Venkataramanan Kumar
2901f42f4b Enable support for next generation AMD Zen CPU, via -march=znver2. 
gcc/ChangeLog:
	* common/config/i386/i386-common.c (processor_alias_table): Add znver2 entry.
	* config.gcc (i[34567]86-*-linux* | ...): Add znver2.
	(case ${target}): Add znver2.
	* config/i386/driver-i386.c: (host_detect_local_cpu): Let
	-march=native recognize znver2 processors.
	* config/i386/i386-c.c (ix86_target_macros_internal): Add znver2.
	* config/i386/i386.c (m_znver2): New definition.
	(m_ZNVER): New definition.
	(m_AMD_MULTIPLE): Includes m_znver2.
	(processor_cost_table): Add znver2 entry.
	(processor_target_table): Add znver2 entry.
	(get_builtin_code_for_version): Set priority for
	PROCESSOR_ZNVER2.
	(processor_model): Add M_AMDFAM17H_ZNVER2.
	(arch_names_table): Ditto.
	(ix86_reassociation_width): Include znver2. 
	* config/i386/i386.h (TARGET_znver2): New definition.
	(struct ix86_size_cost): Add TARGET_ZNVER2.
	(enum processor_type): Add PROCESSOR_ZNVER2.
	* config/i386/i386.md (define_attr "cpu"): Add znver2.
	* config/i386/x86-tune-costs.h: (processor_costs) Add znver2 costs.
	* config/i386/x86-tune-sched.c: (ix86_issue_rate): Add znver2.
	(ix86_adjust_cost): Add znver2.
	* config/i386/x86-tune.def:  Replace m_ZNVER1 by m_ZNVER
	* gcc/doc/extend.texi: Add details about znver2.
	* gcc/doc/invoke.texi: Add details about znver2.

libgcc/ChangeLog
	* config/i386/cpuinfo.c: (get_amd_cpu): Add znver2.
	* config/i386/cpuinfo.h(processor_subtypes): Ditto.

From-SVN: r265775
 2018-11-04 11:17:54 +00:00
Paul Koning
4310ca662a t-pdp11 (LIB2ADD): Add divmod.c. 
* config/pdp11/t-pdp11 (LIB2ADD): Add divmod.c.
	(HOST_LIBGCC2_CFLAGS): Change to optimize for size.

From-SVN: r265726
 2018-11-01 14:36:52 -04:00
Claudiu Zissulescu
8180cde0fb [ARC] Remove non standard funcions calls. 
Replace all custom "library" calls with compiler known patterns.

gcc/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.md (mulsi3): Remove call to mulsi_600_lib.
	(mulsi3_600_lib): Remove pattern.
	(umulsi3_highpart_600_lib_le): Likewise.
	(umulsi3_highpart): Remove call to umulsi3_highpart_600_lib_le.
	(umulsidi3): Remove call to umulsidi3_600_lib.
	(umulsidi3_600_lib): Remove pattern.
	(peephole2): Remove peephole using the above deprecated patterns.

testsuite/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* gcc.target/arc/mulsi3_highpart-2.c: Update test.

libgcc/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/lib1funcs.S (_muldi3): New function.
	* config/arc/t-arc (LIB1ASMFUNCS): Add _muldi3.

From-SVN: r265672
 2018-10-31 12:27:07 +01:00
Rasmus Villemoes
be7b071e9e libgcc: properly destroy mutexes on VxWorks 
Just as one needs run-time initialization of mutexes, one needs to
destroy them properly to allow the OS to release resources associated
with the semaphore.

From-SVN: r265616
 2018-10-30 08:33:04 +00:00
Paul Koning
a9a2fddbf2 udivmodsi4.c (__udivmodsi4): Rename to conform to coding standard. 
* udivmodsi4.c (__udivmodsi4): Rename to conform to coding
	standard.
	* divmod.c: Update references to __udivmodsi4.
	* udivmod.c: Ditto.
	* udivhi3.c: New file.
	* udivmodhi4.c: New file.
	* config/pdp11/t-pdp11 (LIB2ADD): Add the new files.

From-SVN: r265277
 2018-10-18 14:01:15 -04:00
Olivier Hainque
87f918e380 tighten the toplevel guard on ibm-ldouble.c 
2018-10-12  Olivier Hainque  <hainque@adacore.com>

        * config/rs6000/ibm-ldouble.c: Augment the toplevel guard with
        defined (__FLOAT128_TYPE__) || defined (__LONG_DOUBLE_128__).

From-SVN: r265135
 2018-10-12 21:25:46 +00:00
Paul Koning
be86efa7cc * config/pdp11/t-pdp11: Remove -mfloat32 switch. 
From-SVN: r264939
 2018-10-08 12:49:48 -04:00
Uros Bizjak
0a76bba487 crtprec.c (set_precision): Use fnstcw instead of fstcw. 
* config/i386/crtprec.c (set_precision): Use fnstcw instead of fstcw.

From-SVN: r264649
 2018-09-26 17:25:15 +02:00
Olivier Hainque
5244089f15 Leverage cacheTextUpdate for __clear_cache on VxWorks 
2018-09-21  Alexandre Oliva  <oliva@adacore.com>

libgcc/
	* config/vxcache.c: New file.  Provide __clear_cache, based on
	the cacheTextUpdate VxWorks service.
	* config/t-vxworks (LIB2ADD): Add vxcache.c.
	(LIB2FUNCS_EXCLUDE): Add _clear_cache.
	* config/t-vxwoks7: Likewise.
gcc/
	* config/vxworks.h (CLEAR_INSN_CACHE): #define to 1.

From-SVN: r264479
 2018-09-21 13:09:51 +00:00
Monk Chiang
36ff254bf6 [NDS32] Sync glibc and kernel structure, all use _rt_sigframe. 
libgcc/
	* config/nds32/linux-unwind.h (struct _rt_sigframe): Use struct
	ucontext_t type instead.
	(nds32_fallback_frame_state): Remove struct _sigframe statement.

From-SVN: r264461
 2018-09-21 08:39:35 +00:00
Kito Cheng
229a033dac [NDS32] Add t-nds32-glibc file. 
libgcc/
	* config/nds32/t-nds32-glibc: New file.

From-SVN: r264460
 2018-09-21 08:11:40 +00:00
Rainer Orth
53c6feb2b2 Use v2 map syntax in libgcc-unwind.map if Solaris ld supports it 
* configure.ac (solaris_ld_v2_maps): New test.
	* configure: Regenerate.
	* Makefile.in (solaris_ld_v2_maps): New variable.
	* config/t-slibgcc-sld (libgcc-unwind.map): Emit v2 mapfile syntax
	if supported.

From-SVN: r264382
 2018-09-18 07:04:15 +00:00
Richard Earnshaw
ebdb6f2377 PR target/86951 arm - Handle speculation barriers on pre-armv7 CPUs 
The AArch32 instruction sets prior to Armv7 do not define the ISB and
DSB instructions that are needed to form a speculation barrier.  While
I do not know of any instances of cores based on those instruction
sets being vulnerable to speculative side channel attacks it is
possible to run code built for those ISAs on more recent hardware
where they would become vulnerable.

This patch works around this by using a library call added to libgcc.
That code can then take any platform-specific actions necessary to
ensure safety.

For the moment I've only handled two cases: the library code being
built for armv7 or later anyway and running on Linux.

On Linux we can handle this by calling the kernel function that will
flush a small amount of cache.  Such a sequence ends with a ISB+DSB
sequence if running on an Armv7 or later CPU.

gcc:

	PR target/86951
	* config/arm/arm-protos.h (arm_emit_speculation_barrier): New
	prototype.
	* config/arm/arm.c (speculation_barrier_libfunc): New static
	variable.
	(arm_init_libfuncs): Initialize it.
	(arm_emit_speculation_barrier): New function.
	* config/arm/arm.md (speculation_barrier): Call
	arm_emit_speculation_barrier for architectures that do not have 
	DSB or ISB.
	(speculation_barrier_insn): Only match on Armv7 or later.

libgcc:

	PR target/86951
	* config/arm/lib1funcs.asm (speculation_barrier): New function.
	* config/arm/t-arm (LIB1ASMFUNCS): Add it to list of functions
	to build.

From-SVN: r263806
 2018-08-23 09:47:34 +00:00
Iain Sandoe
a49c064e40 Move Darwin10 unwinder fix to a crt shim. 
gcc/
	* config/darwin10.h (LINK_GCC_C_SEQUENCE_SPEC): Adjust to use the
	Darwin10-specific unwinder-shim.
	* config/darwin12.h (LINK_GCC_C_SEQUENCE_SPEC): Remove.
	* config/rs6000/darwin.h (DARWIN_CRT1_SPEC, DARWIN_DYLIB1_SPEC): 
	New to cater for Darwin10 Rosetta.

libgcc/
	* config/unwind-dw2-fde-darwin.c
	(_darwin10_Unwind_FindEnclosingFunction): move from here ...
	* config/darwin10-unwind-find-enc-func.c: … to here.
	* config/t-darwin: Build Darwin10 unwinder shim crt.
	* libgcc/config.host: Add the Darwin10 unwinder shim.

From-SVN: r263765
 2018-08-22 11:58:43 +00:00
Jojo
4cd0bc3b69 C-SKY port: libgcc 
2018-08-17  Jojo  <jijie_rong@c-sky.com>
	    Huibin Wang  <huibin_wang@c-sky.com>
	    Sandra Loosemore  <sandra@codesourcery.com>
	    Chung-Lin Tang  <cltang@codesourcery.com>

	C-SKY port: libgcc

	libgcc/
	* config.host: Add C-SKY support.
	* config/csky/*: New.

Co-Authored-By: Chung-Lin Tang <cltang@codesourcery.com>
Co-Authored-By: Huibin Wang <huibin_wang@c-sky.com>
Co-Authored-By: Sandra Loosemore <sandra@codesourcery.com>

From-SVN: r263631
 2018-08-17 15:08:27 -04:00
Chung-Ju Wu
a493174524 [NDS32] Implement more C ISR extension. 
gcc/
	* config.gcc (nds32*): Add nds32_isr.h and nds32_init.inc in
	extra_headers.
	* common/config/nds32/nds32-common.c (nds32_handle_option): Handle
	OPT_misr_secure_ case.
	* config/nds32/nds32-isr.c: Implementation of backward compatibility.
	* config/nds32/nds32-protos.h (nds32_isr_function_critical_p): New.
	* config/nds32/nds32.c (nds32_attribute_table): Add critical and
	secure attribute.
	* config/nds32/nds32.h (nds32_isr_nested_type): Add NDS32_CRITICAL.
	(nds32_isr_info): New field security_level.
	(TARGET_ISR_VECTOR_SIZE_4_BYTE): New macro.
	* config/nds32/nds32.md (return_internal): Consider critical attribute.
	* config/nds32/nds32.opt (misr-secure): New option.
	* config/nds32/nds32_init.inc: New file.
	* config/nds32/nds32_isr.h: New file.

libgcc/
	* config/nds32/t-nds32-isr: Rearrange object dependency.
	* config/nds32/initfini.c: Add dwarf2 unwinding support.
	* config/nds32/isr-library/adj_intr_lvl.inc: Consider new extensions
	and registers usage.
	* config/nds32/isr-library/excp_isr.S: Ditto.
	* config/nds32/isr-library/intr_isr.S: Ditto.
	* config/nds32/isr-library/reset.S: Ditto.
	* config/nds32/isr-library/restore_all.inc: Ditto.
	* config/nds32/isr-library/restore_mac_regs.inc: Ditto.
	* config/nds32/isr-library/restore_partial.inc: Ditto.
	* config/nds32/isr-library/restore_usr_regs.inc: Ditto.
	* config/nds32/isr-library/save_all.inc: Ditto.
	* config/nds32/isr-library/save_mac_regs.inc: Ditto.
	* config/nds32/isr-library/save_partial.inc: Ditto.
	* config/nds32/isr-library/save_usr_regs.inc: Ditto.
	* config/nds32/isr-library/vec_vid*.S: Consider 4-byte vector size.

From-SVN: r263493
 2018-08-12 07:38:40 +00:00
John David Anglin
2b1969f635 pa.md (UNSPEC_MEMORY_BARRIER): New unspec enum. 
gcc
	* config/pa/pa.md (UNSPEC_MEMORY_BARRIER): New unspec enum.
	Update comment for atomic instructions.
	(atomic_storeqi, atomic_storehi, atomic_storesi, atomic_storesf,
	atomic_loaddf, atomic_loaddf_1, atomic_storedf, atomic_storedf_1):
	Remove.
	(atomic_loaddi): Revise fence expansion to only emit fence prior to
	load for __ATOMIC_SEQ_CST model.
	(atomic_loaddi_1): Remove float register target.
	(atomic_storedi): Handle CONST_INT values.
	(atomic_storedi_1): Remove float register source.  Add special case
	for zero value.
	(memory_barrier): New expander and insn.

	libgcc
	* config/pa/linux-atomic.c: Update comment.
	(FETCH_AND_OP_2, OP_AND_FETCH_2, FETCH_AND_OP_WORD, OP_AND_FETCH_WORD,
	COMPARE_AND_SWAP_2, __sync_val_compare_and_swap_4,
	SYNC_LOCK_TEST_AND_SET_2, __sync_lock_test_and_set_4): Use
	__ATOMIC_RELAXED for atomic loads.
	(SYNC_LOCK_RELEASE_1): New define.  Use __sync_synchronize() and
	unordered store to release lock.
	(__sync_lock_release_8): Likewise.
	(SYNC_LOCK_RELEASE_2): Remove define.

From-SVN: r263488
 2018-08-11 21:37:55 +00:00
Nicolas Pitre
89fff9cc2b arm - correctly handle denormal results during softfp subtraction 
2018-08-02  Nicolas Pitre <nico@fluxnic.net>

	PR libgcc/86512
	* config/arm/ieee754-df.S (adddf3): Don't shortcut denormal handling
	when exponent goes negative. Update my email address.
	* config/arm/ieee754-sf.S (addsf3): Likewise.

From-SVN: r263267
 2018-08-02 16:50:07 +00:00
Christophe Lyon
b74159752d [ARM] libgcc: Fix comment for code working on architectures >= 4. 
2018-07-30  Christophe Lyon  <christophe.lyon@linaro.org>

	* config/arm/ieee754-df.S: Fix comment for code working on
	architectures >= 4.
	* config/arm/ieee754-sf.S: Likewise.

From-SVN: r263066
 2018-07-30 14:51:42 +02:00
H.J. Lu
b72e71a39c i386: Remove _Unwind_Frames_Increment 
CET kernel has been changed to place a restore token on shadow stack for
signal handler to enhance security.  It is usually transparent to user
programs since kernel will pop the restore token when signal handler
returns.  But when an exception is thrown from a signal handler, now
we need to remove _Unwind_Frames_Increment to pop the the restore token
from shadow stack.  Otherwise, we get

FAIL: g++.dg/torture/pr85334.C   -O0  execution test
FAIL: g++.dg/torture/pr85334.C   -O1  execution test
FAIL: g++.dg/torture/pr85334.C   -O2  execution test
FAIL: g++.dg/torture/pr85334.C   -O3 -g  execution test
FAIL: g++.dg/torture/pr85334.C   -Os  execution test
FAIL: g++.dg/torture/pr85334.C   -O2 -flto -fno-use-linker-plugin -flto-partition=none  execution test

	PR libgcc/85334
	* config/i386/shadow-stack-unwind.h (_Unwind_Frames_Increment):
	Removed.

From-SVN: r263030
 2018-07-27 07:40:47 -07:00