2016-03-22 Michael Meissner <meissner@linux.vnet.ibm.com>
PR libgcc/70363
* config/rs6000/extendkftf2-sw.c (__extendkftf2_sw): If libgcc was
built with an assembler that does not support ISA 3.0
instructions, rename __extendkftf2_sw to __extendkftf2.
From-SVN: r234408
2016-02-26 Paul E. Murphy <murphyp@linux.vnet.ibm.com>
Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/sfp-machine.h (_FP_DECL_EX): Declare _fpsr as a
union of u64 and double.
(FP_TRAPPING_EXCEPTIONS): Return a bitmask of trapping exceptions.
(FP_INIT_ROUNDMODE): Read the fpscr instead of writing a mystery
value.
(FP_ROUNDMODE): Update the usage of _fpscr.
Co-Authored-By: Bill Schmidt <wschmidt@linux.vnet.ibm.com>
From-SVN: r233756
Functions __muldf3_aux, __divdf3_aux, __mulsf3_aux and __divsf3_aux
don't start with leaf_entry, so they need explicit .literal_position,
otherwise libgcc build fails in the presence of --text-section-literals.
2016-02-17 Max Filippov <jcmvbkbc@gmail.com>
libgcc/
* config/xtensa/ieee754-df.S (__muldf3_aux, __divdf3_aux): Add
.literal_position before the function.
* config/xtensa/ieee754-sf.S (__mulsf3_aux, __divsf3_aux):
Likewise.
From-SVN: r233505
libgcc/ChangeLog:
* config.host: Use t-stack and t-stack-s390 for s390*-*-linux.
* config/s390/morestack.S: New file.
* config/s390/t-stack-s390: New file.
* generic-morestack.c (__splitstack_find): Add s390-specific code.
gcc/ChangeLog:
* common/config/s390/s390-common.c (s390_supports_split_stack):
New function.
(TARGET_SUPPORTS_SPLIT_STACK): New macro.
* config/s390/s390-protos.h: Add s390_expand_split_stack_prologue.
* config/s390/s390.c (struct machine_function): New field
split_stack_varargs_pointer.
(s390_register_info): Mark r12 as clobbered if it'll be used as temp
in s390_emit_prologue.
(s390_emit_prologue): Use r12 as temp if r1 is taken by split-stack
vararg pointer.
(morestack_ref): New global.
(SPLIT_STACK_AVAILABLE): New macro.
(s390_expand_split_stack_prologue): New function.
(s390_live_on_entry): New function.
(s390_va_start): Use split-stack vararg pointer if appropriate.
(s390_asm_file_end): Emit the split-stack note sections.
(TARGET_EXTRA_LIVE_ON_ENTRY): New macro.
* config/s390/s390.md (UNSPEC_STACK_CHECK): New unspec.
(UNSPECV_SPLIT_STACK_CALL): New unspec.
(UNSPECV_SPLIT_STACK_DATA): New unspec.
(split_stack_prologue): New expand.
(split_stack_space_check): New expand.
(split_stack_data): New insn.
(split_stack_call): New expand.
(split_stack_call_*): New insn.
(split_stack_cond_call): New expand.
(split_stack_cond_call_*): New insn.
From-SVN: r233421
2016-02-03 Andreas Tobler <andreast@gcc.gnu.org>
PR bootstrap/69611
* config/rs6000/sfp-machine.h: Guard __sfp_exceptions with
__FLOAT128__ to compile only for __float128 capable targets.
From-SVN: r233111
2016-01-21 Michael Meissner <meissner@linux.vnet.ibm.com>
Steven Munroe <munroesj@linux.vnet.ibm.com>
Tulio Magno Quites Machado Filho <tulioqm@br.ibm.com>
* config/rs6000/float128-sed: New files to convert TF names to KF
names for PowerPC IEEE 128-bit floating point support.
* config/rs6000/float128-sed-hw: Likewise.
* config/rs6000/float128-hw.c: New file for ISA 3.0 IEEE 128-bit
floating point hardware support.
* config/rs6000/float128-ifunc.c: New file to pick either IEEE
128-bit floating point software emulation or use ISA 3.0 hardware
support if it is available.
* config/rs6000/quad-float128.h: New file to support IEEE 128-bit
floating point.
* config/rs6000/extendkftf2-sw.c: New file, convert IEEE 128-bit
floating point to IBM extended double.
* config/rs6000/trunctfkf2-sw.c: New file, convert IBM extended
double to IEEE 128-bit floating point.
* config/rs6000/t-float128: New Makefile fragments to enable
building __float128 emulation support.
* config/rs6000/t-float128-hw: Likewise.
* config/rs6000/sfp-exceptions.c: New file to provide exception
support for IEEE 128-bit floating point.
* config/rs6000/floattikf.c: New files for converting between IEEE
128-bit floating point and signed/unsigned 128-bit integers.
* config/rs6000/fixunskfti.c: Likewise.
* config/rs6000/fixkfti.c: Likewise.
* config/rs6000/floatuntikf.c: Likewise.
* config/rs6000/sfp-machine.h (_FP_W_TYPE_SIZE): Use 64-bit types
when building on 64-bit systems, or when VSX is enabled.
(_FP_W_TYPE): Likewise.
(_FP_WS_TYPE): Likewise.
(_FP_I_TYPE): Likewise.
(TItype): Define on 64-bit systems.
(UTItype): Likewise.
(TI_BITS): Likewise.
(_FP_MUL_MEAT_D): Add support for using 64-bit types.
(_FP_MUL_MEAT_Q): Likewise.
(_FP_DIV_MEAT_D): Likewise.
(_FP_DIV_MEAT_Q): Likewise.
(_FP_NANFRAC_D): Likewise.
(_FP_NANFRAC_Q): Likewise.
(ISA_BIT): Add exception support if we are being compiled on a
machine with hardware floating point support to build the IEEE
128-bit emulation functions.
(FP_EX_INVALID): Likewise.
(FP_EX_OVERFLOW): Likewise.
(FP_EX_UNDERFLOW): Likewise.
(FP_EX_DIVZERO): Likewise.
(FP_EX_INEXACT): Likewise.
(FP_EX_ALL): Likewise.
(__sfp_handle_exceptions): Likewise.
(FP_HANDLE_EXCEPTIONS): Likewise.
(FP_RND_NEAREST): Likewise.
(FP_RND_ZERO): Likewise.
(FP_RND_PINF): Likewise.
(FP_RND_MINF): Likewise.
(FP_RND_MASK): Likewise.
(_FP_DECL_EX): Likewise.
(FP_INIT_ROUNDMODE): Likewise.
(FP_ROUNDMODE): Likewise.
* libgcc/config.host (powerpc*-*-linux*): If compiler can compile
VSX code, enable IEEE 128-bit floating point. If the compiler can
compile IEEE 128-bit floating point code with ISA 3.0 IEEE 128-bit
floating point hardware instructions and it supports declaring
functions with the ifunc attribute, enable ifunc functions to
switch between software and hardware support.
* configure.ac (powerpc*-*-linux*): Likewise.
* configure: Regenerate.
Co-Authored-By: Steven Munroe <munroesj@linux.vnet.ibm.com>
Co-Authored-By: Tulio Magno Quites Machado Filho <tulioqm@br.ibm.com>
From-SVN: r232685
* config/msp430/t-msp430 (lib2_mul_none.o): Only use the first
dependency as the source file to be compiled.
(lib2_mul_16bit.o, lib2hw_mul_16.o, lib2hw_mul_32.o)
(lib2hw_mul_f5.o): Likewise.
From-SVN: r232402
[gcc]
2016-01-13 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000-builtin.def (BU_FLOAT128_2): Add support
for pack/unpack functions for __ibm128.
(PACK_IF): Likewise.
(UNPACK_IF): Likewise.
* config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
support for __ibm128 pack/unpack functions.
(rs6000_invalid_builtin): Likewise.
(rs6000_init_builtins): Likewise.
(rs6000_opt_masks): Likewise.
* config/rs6000/rs6000.h (MASK_FLOAT128): Add short name.
(RS6000_BTM_FLOAT128): Add support for __ibm128 pack/unpack
functions
(RS6000_BTM_COMMON): Likewise.
* config/rs6000/rs6000.md (f128_vsx): New mode attribute.
(unpack<mode>): Use FMOVE128_FPR iterator instead of FMOVE128, to
disallow __builtin_{pack,unpack}_longdouble if long double is IEEE
128-bit floating point. Add support for the double values to be
in Altivec registers for TF/IF packing and unpacking, but restrict
TD packing sub-fields to be FPR registers. Don't allow overlapped
register support for packing. Allow pack inputs to be memory
locations. Don't build generator functions for unpack<mode>_dm
and unpack<mode>_nodm.
(unpack<mode>_dm): Likewise.
(unpack<mode>_nodm): Likewise.
(pack<mode>): Likewise.
* config/rs6000/rs6000-builtin.def (__builtin_pack_ibm128): Add
built-in functions to pack/unpack explicit __ibm128 values.
(__builtin_unpack_ibm128): Likewise.
* doc/extend.texi (PowerPC Built-in Functions): Document
__builtin_pack_ibm128 and __builtin_unpack_ibm128.
[libgcc]
2016-01-13 Michael Meissner <meissner@linux.vnet.ibm.com>
Steven Munroe <munroesj@linux.vnet.ibm.com>
Tulio Magno Quites Machado Filho <tulioqm@br.ibm.com>
* config/rs6000/sfp-exceptions.c: New file to provide exception
support for IEEE 128-bit floating point.
* config/rs6000/float128-hw.c: New file for ISA 3.0 IEEE 128-bit
floating point hardware support.
* config/rs6000/floattikf.c: New files for IEEE 128-bit floating
point conversions.
* config/rs6000/fixunskfti.c: Likewise.
* config/rs6000/fixkfti.c: Likewise.
* config/rs6000/floatuntikf.c: Likewise.
* config/rs6000/extendkftf2-sw.c: Likewise.
* config/rs6000/trunctfkf2-sw.c: Likewise.
* config/rs6000/float128-ifunc.c: New file to pick either IEEE
128-bit floating point software emulation or use ISA 3.0 hardware
support if it is available.
* config/rs6000/quad-float128.h: New file to support IEEE 128-bit
floating point.
* config/rs6000/t-float128: New Makefile fragments to enable
building __float128 emulation support.
* config/rs6000/t-float128-hw: Likewise.
* config/rs6000/float128-sed: New file to convert TF names to KF
names for PowerPC IEEE 128-bit floating point support.
* config/rs6000/sfp-machine.h (_FP_W_TYPE_SIZE): Use 64-bit types
when building on 64-bit systems, or when VSX is enabled.
(_FP_W_TYPE): Likewise.
(_FP_WS_TYPE): Likewise.
(_FP_I_TYPE): Likewise.
(TItype): Define on 64-bit systems.
(UTItype): Likewise.
(TI_BITS): Likewise.
(_FP_MUL_MEAT_D): Add support for using 64-bit types.
(_FP_MUL_MEAT_Q): Likewise.
(_FP_DIV_MEAT_D): Likewise.
(_FP_DIV_MEAT_Q): Likewise.
(_FP_NANFRAC_D): Likewise.
(_FP_NANFRAC_Q): Likewise.
(ISA_BIT): Add exception support if we are being compiled on a
machine with hardware floating point support to build the IEEE
128-bit emulation functions.
(FP_EX_INVALID): Likewise.
(FP_EX_OVERFLOW): Likewise.
(FP_EX_UNDERFLOW): Likewise.
(FP_EX_DIVZERO): Likewise.
(FP_EX_INEXACT): Likewise.
(FP_EX_ALL): Likewise.
(__sfp_handle_exceptions): Likewise.
(FP_HANDLE_EXCEPTIONS): Likewise.
(FP_RND_NEAREST): Likewise.
(FP_RND_ZERO): Likewise.
(FP_RND_PINF): Likewise.
(FP_RND_MINF): Likewise.
(FP_RND_MASK): Likewise.
(_FP_DECL_EX): Likewise.
(FP_INIT_ROUNDMODE): Likewise.
(FP_ROUNDMODE): Likewise.
* configure.ac (powerpc*-*-linux*): Check whether the PowerPC
compiler can do __float128.
* configure: Regenerate.
* libgcc/config.host (powerpc*-*-linux*): If compiler can compile
VSX code, enable IEEE 128-bit floating point.
From-SVN: r232346
* common/config/msp430/msp430-common.c (msp430_handle_option):
Pass both -mmcu and -mcpu on to the back end if they are both
defined.
* config/msp430/msp430.c (hwmult_name): New function.
(msp430_option_override): If an unrecognised MCU name is
detected only warn if the user has not provided suitable
-mhwmult and -mcpu options. Use msp430_warn_mcu to control
warning messages. Generate warnings about conflicts between
-mmcu and -mcpu and -mhwmult options.
If neither -mcpu nor -mmcu have been specified but -mhwmult=
f5series has the select the 430X isa.
(msp430_no_hwmult): If -mmcu has not been specified and
msp430_hwmult_type is AUTO then return true.
* config/msp430/msp430.h (EXTRA_SPEC_FUNCTIONS): Define.
(LIB_SPEC): Add hardware multiply library selection.
* config/msp430/t-msp430: Delete hardware multiply multilibs.
Add rule to build driver-msp430.o
* config/msp430/driver-msp430.c: New file.
* config/msp430/msp430.opt (warn-mcu): New option.
* doc/invoke.texi: Update description of -mhwmult=auto.
Document -mwarn-mcu option.
tests * gcc.target/msp430/msp_abi_div_funcs.c: New test.
* gcc.target/msp430/mul_main.h: New test support file.
* gcc.target/msp430/mul_none.c: New test.
* gcc.target/msp430/mul_16bit.c: New test.
* gcc.target/msp430/mul_32bit.c: New test.
* gcc.target/msp430/mul_f5.c: New test.
libgcc * config/msp430/mpy.c (__mulhi3): Use a faster algorithm.
Allow for the second argument being negative.
* config.host (extra_parts): Define for MSP430. Create separate
libraries for each of the hardware multiply formats.
* config/msp430/lib2hw_mul.S: Build only the multiply routines
that are needed.
* config/msp430/lib2mul.c: Likewise.
* config/msp430/t-msp430 (LIB2ADD): Remove lib2hw_mul.S.
Add rules to build hardware multiply libraries.
* config/msp430/lib2divSI.c: (__mspabi_divlu): Alias for
__mspabi_divul function.
(__mspabi_divllu): New stub function.
From-SVN: r231286
PR libgcc/66883
* config/epiphany/udivsi3-float.c: Fix CONCISE test, and comment typo.
N.B., this is not active code, just documenting a previous approach for this
function in C.
From-SVN: r229236
* config/rl78/divmodqi.S: Return 0x00 by default for div by 0.
* config/rl78/divmodsi.S: Update return register to r8.
* config/rl78/divmodhi.S: Update return register to r8,r9.
Branch to main_loop_done_himode to pop registers before return.
From-SVN: r228926
libgcc/
* config/ft32/crti-hw.S: Use __PMSIZE to allow configurable
memory layout. Deal correctly with BSS region larger than 32K.
Handle a watchdog reset like a power-on reset. Clean up unused
code.
From-SVN: r227986
2015-09-15 Max Filippov <jcmvbkbc@gmail.com>
gcc/
* config/xtensa/xtensa.h (DWARF_ALT_FRAME_RETURN_COLUMN): New
definition.
(DWARF_FRAME_REGISTERS): Reserve space for one extra register in
call0 ABI.
libgcc/
* config/xtensa/linux-unwind.h (xtensa_fallback_frame_state):
Add support for call0 ABI.
From-SVN: r227809
Returning context->cfa in _Unwind_GetCFA makes CFA point one stack frame
higher than what was actually used by code at context->ra. This results
in invalid CFA value in signal frames and premature unwinding completion
in forced unwinding used by uClibc NPTL thread cancellation.
Returning context->sp from _Unwind_GetCFA makes all CFA values valid and
matching code that used them.
2015-08-18 Max Filippov <jcmvbkbc@gmail.com>
libgcc/
* config/xtensa/unwind-dw2-xtensa.c (_Unwind_GetCFA): Return
context->sp instead of context->cfa.
From-SVN: r226964
This allows having exception cleanup code in binaries that don't
register their unwind tables.
2015-08-18 Max Filippov <jcmvbkbc@gmail.com>
libgcc/
* config/xtensa/t-windowed (LIB2ADDEH): Replace unwind-dw2-fde
with unwind-dw2-fde-dip.
From-SVN: r226963
Spilling windowed registers in userspace is much easier, more portable,
less error-prone and equally effective as in kernel. Now that register
spilling syscall is considered obsolete in the xtensa linux kernel
replace it with CALL12 followed by series of ENTRY in libgcc.
2015-08-18 Max Filippov <jcmvbkbc@gmail.com>
libgcc/
* config/xtensa/lib2funcs.S (__xtensa_libgcc_window_spill): Use
CALL12 followed by series of ENTRY to spill windowed registers.
(__xtensa_nonlocal_goto): Call __xtensa_libgcc_window_spill
instead of making linux spill syscall.
From-SVN: r226962
Make up to 3.80 (documented as minimal permitted version) doesn't
support "else if...".
2015-07-17 Jan Beulich <jbeulich@suse.com>
* config/t-softfp: Split up "else ifneq".
From-SVN: r225920
Patch in the bottom adds support of IA MCU psABI to libgcc (enables
soft-fp) and libdecnumber (enables it for IA MCU).
config/
* dfp.m4 (enable_decimal_float): Also set to yes for
i?86*-*-elfiamcu target.
gcc/
* configure: Regenerated.
libdecnumber/
* configure: Regenerated.
libgcc/
* config.host: Support i[34567]86-*-elfiamcu target.
* config/t-softfp-sfdftf: New file.
* config/i386/32/t-iamcu: Likewise.
* configure: Regenerated.
From-SVN: r225198
We shouldn't call external function, __cpu_indicator_init, while an object
is being relocated since its .got.plt section hasn't been updated. It
works for non-PIE since no update on .got.plt section is required. This
patch creates libgcc.so as a linker script, hides __cpu_indicator_init
and __cpu_model in libgcc.so.1 from linker, forces linker to resolve
__cpu_indicator_init and __cpu_model to their hidden definitions in
libgcc.a while providing backward binary compatibility.
gcc/testsuite/
PR target/65612
* g++.dg/ext/mv18.C: New test.
* g++.dg/ext/mv19.C: Likewise.
* g++.dg/ext/mv20.C: Likewise.
* g++.dg/ext/mv21.C: Likewise.
* g++.dg/ext/mv22.C: Likewise.
* g++.dg/ext/mv23.C: Likewise.
libgcc/
PR target/65612
* config.host (tmake_file): Add t-slibgcc-libgcc for Linux/x86.
* config/i386/cpuinfo.c (__cpu_model): Initialize.
(__cpu_indicator_init@GCC_4.8.0): New.
(__cpu_model@GCC_4.8.0): Likewise.
* config/i386/t-linux (HOST_LIBGCC2_CFLAGS): Add
-DUSE_ELF_SYMVER.
From-SVN: r222178
* config/rl78/rl78-opts.h (enum rl78_mul_types): Add MUL_G14 and
MUL_UNINIT.
(enum rl78_cpu_type): New.
* config/rl78/rl78-virt.md (attr valloc): Add divhi and divsi.
(umulhi3_shift_virt): Remove m constraint from operand 1.
(umulqihi3_virt): Likewise.
* config/rl78/rl78.c (rl78_option_override): Add code to process
-mcpu and -mmul options.
(rl78_alloc_physical_registers): Add code to handle divhi and
divsi valloc attributes.
(set_origin): Likewise.
* config/rl78/rl78.h (RL78_MUL_G14): Define.
(TARGET_G10, TARGET_G13, TARGET_G14): Define.
(TARGET_CPU_CPP_BUILTINS): Define __RL78_MUL_xxx__ and
__RL78_Gxx__.
(ASM_SPEC): Pass -mcpu on to assembler.
* config/rl78/rl78.md (mulqi3): Add a clobber of AX.
(mulqi3_rl78): Likewise.
(mulhi3_g13): Likewise.
(mulhi3): Generate the G13 or G14 versions of the insn directly.
(mulsi3): Likewise.
(mulhi3_g14): Add clobbers of AX and BC.
(mulsi3_g14): Likewise.
(mulsi3_g13): Likewise.
(udivmodhi4, udivmodhi4_g14, udivmodsi4): New patterns.
(udivmodsi4_g14, udivmodsi4_g13): New patterns.
* config/rl78/rl78.opt (mmul): Initialise value to
RL78_MUL_UNINIT.
(mcpu): New option.
(m13, m14, mrl78): New option aliases.
* config/rl78/t-rl78 (MULTILIB_OPTIONS): Add mg13 and mg14.
(MULTILIB_DIRNAMES): Add g13 and g14.
* doc/invoke.texi: Document -mcpu and -mmul options.
* config/rl78/divmodhi.S: Add G14 and G13 versions of the __divhi3
and __modhi3 functions.
* config/rl78/divmodso.S: Add G14 and G13 versions of the
__divsi3, __udivsi3, __modsi3 and __umodsi3 functions.
From-SVN: r222142
call0 is an ABI that doesn't use register windows.
2015-03-03 Max Filippov <jcmvbkbc@gmail.com>
gcc/
* config/xtensa/constraints.md ("a" constraint): Include stack
pointer in case of call0 ABI.
("q" constraint): Make empty in case of call0 ABI.
("D" constraint): Include stack pointer in case of call0 ABI.
* config/xtensa/xtensa-protos.h (xtensa_set_return_address,
xtensa_expand_epilogue, xtensa_regno_to_class): Add new function
prototypes.
* config/xtensa/xtensa.c (xtensa_callee_save_size): New
variable.
(xtensa_regno_to_class): Make it a local variable in the
function xtensa_regno_to_class.
(xtensa_function_epilogue, TARGET_ASM_FUNCTION_EPILOGUE): Remove
macro, function prototype and implementation.
(reg_nonleaf_alloc_order): Make it a local variable in the
function order_regs_for_local_alloc.
(xtensa_conditional_register_usage): New function.
(TARGET_CONDITIONAL_REGISTER_USAGE): Define macro.
(xtensa_valid_move): Allow direct moves to stack pointer
register in call0 ABI.
(xtensa_setup_frame_addresses): Only spill register windows in
windowed ABI.
(xtensa_emit_call): Emit call(x)8 or call(x)0 in windowed and
call0 ABI respectively.
(xtensa_function_arg_1): Only mark a7 register for copying in
windowed ABI.
(xtensa_call_save_reg): New function.
(compute_frame_size): Add space for callee saved register
storage to the frame size in call0 ABI.
(xtensa_expand_prologue): Generate code to set up stack frame
and save callee-saved registers in call0 ABI.
(xtensa_expand_epilogue): New function.
(xtensa_set_return_address): New function.
(xtensa_return_addr): Calculate return address in call0 ABI.
(xtensa_builtin_saveregs): Only mark a7 register for copying and
emit copying code in windowed ABI.
(order_regs_for_local_alloc): Add preferred register allocation
order for non-leaf function in call0 ABI.
(xtensa_static_chain): Add atatic chain passing for call0 ABI.
(xtensa_asm_trampoline_template): Add trampoline generation for
call0 ABI.
(xtensa_trampoline_init): Add trampoline initialization for
call0 ABI.
(xtensa_conditional_register_usage, xtensa_regno_to_class): New
functions.
* config/xtensa/xtensa.h (TARGET_WINDOWED_ABI): New macro.
(TARGET_CPU_CPP_BUILTINS): Add built-in define for call0 ABI.
(CALL_USED_REGISTERS): Modify to encode both windowed and call0
ABI call-used registers.
(HARD_FRAME_POINTER_REGNUM): Add frame pointer for call0 ABI.
(INCOMING_REGNO, OUTGOING_REGNO): Use argument unchanged in
call0 ABI.
(REG_CLASS_CONTENTS): Include all registers into the preferred
reload registers set, adjust the set in the
xtensa_conditional_register_usage.
(xtensa_regno_to_class): Drop variable declaration.
(REGNO_REG_CLASS): Redefine to use xtensa_regno_to_class
function.
(WINDOW_SIZE): Define as 8 or 0 for windowed and call0 ABI
respectively.
(FUNCTION_PROFILER): Add _mcount call for call0 ABI.
(TRAMPOLINE_SIZE): Define trampoline size for call0 ABI.
(RETURN_ADDR_IN_PREVIOUS_FRAME): Define to 0 in call0 ABI.
(ASM_OUTPUT_POOL_PROLOGUE): Always generate literal pool
location in call0 ABI.
(EH_RETURN_STACKADJ_RTX): New definition, use a10 for passing
stack adjustment size when handling exception.
(CRT_CALL_STATIC_FUNCTION): Add definition for call0 ABI.
* config/xtensa/xtensa.md (A9_REG, UNSPECV_BLOCKAGE): New
definitions.
("return" pattern): Generate ret.n/ret in call0 ABI.
("epilogue" pattern): Expand epilogue.
("nonlocal_goto" pattern): Use default in call0 ABI.
("eh_return" pattern): Move implementation to eh_set_a0_windowed,
emit eh_set_a0_* depending on ABI.
("eh_set_a0_windowed" pattern): Former eh_return pattern.
("eh_set_a0_call0", "blockage"): New patterns.
libgcc/
* config/xtensa/lib2funcs.S (__xtensa_libgcc_window_spill,
__xtensa_nonlocal_goto): Don't compile for call0 ABI.
(__xtensa_sync_caches): Only use entry and retw in windowed ABI,
use ret in call0 ABI.
* config/xtensa/t-windowed: New file.
* libgcc/config/xtensa/t-xtensa (LIB2ADDEH): Move to t-windowed.
* libgcc/configure: Regenerated.
* libgcc/configure.ac: Check if xtensa target is configured for
windowed ABI and thus needs to use custom unwind code.
From-SVN: r221158
When building GCC against a proper newlib sysroot, the libgcc build will
include more than what's built in the -Dinhibit_libc configuration used when
building newlib as part of the GCC build process. See the inhibit_libc logic
in gcc/configure.ac.
To avoid...
ptxas _gcov_indirect_call_topn_profiler.o, line 101; error : Type or alignment of argument does not match formal parameter 'ptr'
ptxas _gcov_indirect_call_topn_profiler.o, line 101; error : Call has wrong number of parameters
ptxas _gcov_indirect_call_topn_profiler.o, line 101; error : Type or alignment of argument does not match formal parameter 'size'
ptxas fatal : Ptx assembly aborted due to errors
nvptx-as: ptxas returned 255 exit status
make[2]: *** [_gcov_indirect_call_topn_profiler.o] Error 1
..., "dumb down" the libgcc build:
libgcc/
PR target/65181
* config/nvptx/t-nvptx (INHIBIT_LIBC_CFLAGS): Define to
-Dinhibit_libc.
From-SVN: r220915
2015-02-17 Sandra Loosemore <sandra@codesourcery.com>
libgcc/
* config/arm/bpabi.S (test_div_by_zero): Make label names
consistent between thumb2 and arm mode cases. Separate the
signed comparison on the high word of the numerator from the
unsigned comparison on the low word.
* config/arm/bpabi-v6m.S (test_div_by_zero): Similarly separate
signed comparison.
gcc/testsuite/
* gcc.target/arm/divzero.c: New test case.
From-SVN: r220765
* config/nvptx/realloc.c: Include <stddef.h> instead of <stdlib.h>
and <string.h>.
(__nvptx_realloc): Call __builtin_memcpy instead of memcpy.
From-SVN: r220764
* config/rl78/fpmath-sf.S (__rl78_int_pack_a_r8): Fix edge case
rounding up the fraction.
* config/rl78/rl78.c (rl78_note_reg_set): Note the use of REGs
inside a MEM.
From-SVN: r220410
* config/pa/linux-atomic.c (__kernel_cmpxchg2): Change declaration of
oldval and newval to const void *. Fix typo.
(FETCH_AND_OP_2): Use __atomic_load_n to load value.
(FETCH_AND_OP_WORD): Likewise.
(OP_AND_FETCH_WORD): Likewise.
(COMPARE_AND_SWAP_2): Likewise.
(__sync_val_compare_and_swap_4): Likewise.
(__sync_lock_test_and_set_4): Likewise.
(SYNC_LOCK_RELEASE_2): Likewise.
Remove support for long long atomic operations.
From-SVN: r220307
* config/rl78/cmpsi2.S: Use function start and end macros.
(__gcc_bcmp): New function.
* config/rl78/lshrsi3.S: Use function start and end macros.
* config/rl78/mulsi3.S: Add support for G10.
(__mulqi3): New function for G10.
* config/rl78/signbit.S: Use function start and end macros.
* config/rl78/t-rl78 (LIB2ADD): Add bit-count.S, fpbit-sf.S and
fpmath-sf.S.
(LIB2FUNCS_EXCLUDE): Define.
(LIB2FUNCS_ST): Define.
* config/rl78/trampoline.S: Use function start and end macros.
* config/rl78/vregs.h (START_FUNC): New macro.
(START_ANOTHER_FUNC): New macro.
(END_FUNC): New macro.
(END_ANOTHER_FUNC): New macro.
* config/rl78/bit-count.S: New file. Contains assembler
implementations of the bit counting functions: ___clzhi2,
__clzsi2, ctzhi2, ctzsi2, ffshi2, ffssi2, __partityhi2,
__paritysi2, __popcounthi2 and __popcountsi2.
* config/rl78/fpbit-sf.S: New file. Contains assembler
implementationas of the math functions: __negsf2, __cmpsf2,
__eqsf2, __nesf2, __lesf2, __ltsf2, __gesf2, gtsf2, __unordsf2,
__fixsfsi, __fixunssfsi, __floatsisf and __floatunssisf.
* config/rl78/fpmath-sf.S: New file. Contains assembler
implementations of the math functions: __subsf3, __addsf3,
__mulsf3 and __divsf3
From-SVN: r220162
2015-01-20 Chung-Lin Tang <cltang@codesourcery.com>
gcc/
* config/nios2/nios2.c (nios2_asm_file_end): Implement
TARGET_ASM_FILE_END hook for adding .note.GNU-stack section when
needed.
(TARGET_ASM_FILE_END): Define.
libgcc/
* config/nios2/linux-unwind.h (nios2_fallback_frame_state):
Update rt_sigframe format and address for current Nios II
Linux conventions.
From-SVN: r219898
libgcc/
* config/sh/crt.h: New.
* config/sh/crti.S: Use GLOBAL macro from crt.h for _init and _fini
symbols.
* config/sh/crt1.S: Likewise.
From-SVN: r218807
2014-11-27 Tony Wang <tony.wang@arm.com>
libgcc/
* config/arm/lib1funcs.S (FUNC_START): Add conditional section
redefine for macro L_arm_muldivsf3 and L_arm_muldivdf3.
(SYM_END, ARM_SYM_START): Add macros used to expose function Symbols.
From-SVN: r218124
* config/pa/linux-atomic.c (__kernel_cmpxchg2): New.
(FETCH_AND_OP_2): New. Use for subword and double word operations.
(OP_AND_FETCH_2): Likewise.
(COMPARE_AND_SWAP_2): Likewise.
(SYNC_LOCK_TEST_AND_SET_2): Likewise.
(SYNC_LOCK_RELEASE_2): Likewise.
(SUBWORD_SYNC_OP): Remove.
(SUBWORD_VAL_CAS): Likewise.
(SUBWORD_BOOL_CAS): Likewise.
(FETCH_AND_OP_WORD): Update.
Consistently use signed types.
Co-Authored-By: John David Anglin <danglin@gcc.gnu.org>
From-SVN: r217956
Continuing preparations for implementing
TARGET_ATOMIC_ASSIGN_EXPAND_FENV for powerpc*-*-linux* soft-float and
e500, this patch makes soft-fp symbols used for those targets into
compat symbols when building with glibc >= 2.19, so that they are only
in shared libgcc for existing binaries requiring them, not in static
libgcc and not available for new links using shared libgcc. Instead,
new links will get the symbols from libc, which has exported all of
them since 2.19. (Actually all the symbols were exported from glibc
since 2.4, but some of them were exported by glibc as compat symbols
only - because of a confusion between deliberately present soft-fp
symbols and old accidental reexports of libgcc functions from glibc
2.0 - until 2.19.)
This allows user floating-point arithmetic to interoperate properly
with the state handled by <fenv.h> functions, whether software state
(for soft-float; TLS variables that don't form a public part of
glibc's ABI, so can only be accessed directly by functions within
glibc) or hardware state (for e500 - the copies of the soft-fp
functions in glibc being built to interoperate with the hardware state
whereas those in libgcc aren't). Previously only glibc's own
functions, and those operations done in hardware on e500, properly
worked with that state, not direct floating-point arithmetic
operations that were implemented in software.
The intended next step is the actual TARGET_ATOMIC_ASSIGN_EXPAND_FENV
implementation.
The test of glibc >= 2.19 uses the same --with-glibc-version configure
option as in the gcc/ directory (but differently implemented; in gcc/
the fallback is to examine headers to find the version, while in
libgcc/ we can use compile for the target and so use AC_COMPUTE_INT).
The TARGET_ATOMIC_ASSIGN_EXPAND_FENV implementation will also only do
anything for glibc >= 2.19, as it will depend on generating calls to
functions __atomic_feholdexcept __atomic_feclearexcept
__atomic_feupdateenv that were added in 2.19 for that purpose (even
for e500, inline code is not readily possible because of the need to
make prctl syscalls from the implementation of these functions).
In order to make symbols compat symbols, the soft-fp files need
wrapping with generated wrappers including asm .symver directives,
which need to name the symbol version in question. This is extracted
by an awk script from an intermediate stage of generating the .map
file for linking libgcc (that .map itself depends on the objects that
go into the library, so can't be used for this purpose as that would
mean a circular dependency); the extraction is not fully general
regarding the features available in .map generation, but suffices for
the present purpose.
It would make sense for hardfp.c symbols to be compat symbols as well
(in the cases where hardfp.c gets used, the functions in question
should not be used for new links), but this isn't required for the
present purpose, which is only concerned with ensuring that where
functions that should be affected by rounding modes or exceptions get
used, those functions are actually affected by those rounding modes or
exceptions.
Tested with no regressions with cross to powerpc-linux-gnu
(soft-float); c11-atomic-exec-5.c moves from UNSUPPORTED to FAIL, as
expected, now that floating-point arithmetic in user programs uses the
same state as <fenv.h> functions, so the fenv_exceptions test passes,
but TARGET_ATOMIC_ASSIGN_EXPAND_FENV isn't yet implemented. (For
e500, c11-atomic-exec-5.c was already FAILing, as enough operations
worked with the hardware state for the fenv_exceptions effective
target test to pass.) Also verified that the exported symbols and
versions are unchanged, with the expected symbols becoming compat
symbols at the same versions, and that with --with-glibc-version=2.18
the symbols remain normal rather than compat symbols.
* Makefile.in (libgcc.map.in): New target.
(libgcc.map): Use libgcc.map.in.
* config/t-softfp (softfp_compat): New variable to be set by
users.
[$(softfp_compat) = y] (softfp_map_dep, softfp_set_symver): New
variables.
[$(softfp_compat) = y] (softfp_file_list): Use files in the build
directory.
[$(softfp_compat) = y] ($(softfp_file_list)): Generate wrappers
that use compat symbols and disable all code unless [SHARED].
* config/t-softfp-compat: New file.
* find-symver.awk: New file.
* configure.ac (--with-glibc-version): New configure option.
(ppc_fp_compat): New variable set for powerpc*-*-linux*.
* configure: Regenerate.
* config.host (powerpc*-*-linux*): Use ${ppc_fp_compat} for
soft-float and e500.
From-SVN: r216942
Continuing the cleanups of libgcc soft-fp configuration for
powerpc*-*-linux* in preparation for implementing
TARGET_ATOMIC_ASSIGN_EXPAND_FENV for soft-float and e500, this patch
optimizes the choice of which functions to build for the e500 cases.
For e500v2, use of hardfp is generally right, except that calls to
__unordsf2 and __unorddf2 are actually generated by GCC from
__builtin_isunordered and so they need to be implemented with soft-fp
to avoid recursively calling themselves. For e500v1, hardfp is right
for SFmode (except for __unordsf2) but soft-fp for DFmode (and when
using soft-fp, as usual it's best for the conversions between DFmode
and integers all to come directly from soft-fp rather than some coming
from libgcc2.c). Thus, new variables hardfp_exclusions and
softfp_extras are added that configurations using t-hardfp and
t-softfp can use to achieve the desired effect of selectively mixing
the two sources of functions.
Tested with no regressions for crosses to powerpc-linux-gnuspe (both
e500v1 and e500v2); also checked that the same set of symbols and
versions is exported from shared libgcc before and after the patch.
* config/t-hardfp (hardfp_exclusions): Document new variable for
user to define.
(hardfp_func_list): Exclude functions from $(hardfp_exclusions).
* config/t-softfp (softfp_extras): Document new variable for user
to define.
(softfp_func_list): Add functions from $(softfp_extras).
* config/rs6000/t-e500v1-fp, config/rs6000/t-e500v2-fp: New files.
* config.host (powerpc*-*-linux*): For e500v1, use
rs6000/t-e500v1-fp and t-hardfp; do not use t-softfp-sfdf and
t-softfp-excl. For e500v2, use t-hardfp-sfdf, rs6000/t-e500v2-fp
and t-hardfp; do not use t-softfp-sfdf and t-softfp-excl.
From-SVN: r216835
* config/pa/linux-unwind.h (pa32_read_access_ok): New function.
(pa32_fallback_frame_state): Use pa32_read_access_ok to check if
memory read accesses are ok.
From-SVN: r216716
When I added support for using soft-fp in libgcc
<https://gcc.gnu.org/ml/gcc-patches/2006-03/msg00689.html>, libgcc
configuration was still done in the gcc/ directory, meaning that the
variables set in makefile fragments could not depend on the multilib
being built. Thus, building the soft-fp code for powerpc64-linux-gnu
was disabled in the same way as had been done with fp-bit: the code
was built, but with #ifndef __powerpc64__ wrappers around it so that
the resulting objects were empty.
Now that libgcc configuration is done in the toplevel libgcc
directory, such uses of softfp_wrap_start / softfp_wrap_end are better
replaced by configure-time conditionals that determine whether to use
soft-fp for a given multilib. This patch does so for
powerpc*-*-linux*. The same would appear to apply to
powerpc*-*-freebsd* (using rs6000/t-freebsd64), but I have not made
any changes there. t-ppc64-fp is also used by AIX targets, but they
don't use soft-fp anyway so the changes are of no consequence to them.
The same principle of replacing softfp_wrap_start / softfp_wrap_end
with configure-time conditionals also applies to
softfp_exclude_libgcc2, which was intended for cases where soft-fp is
being used on hard-float multilibs and so it is desirable on those
multilibs for a few functions to come from libgcc2.c rather than
soft-fp (but the soft-fp versions would be more efficient on
soft-float multilibs). Now we have hardfp.c and t-hardfp, those are
better to use in that case, to minimize the size of the bulk of the
functions that are only present for ABI compatibility and should never
be called by newly compiled code.
I intend followup patches to switch 32-bit hard-float multilibs to use
t-hardfp as far as possible (for all non-libgcc2.c operations for
classic hard float; for all except __unord* for e500v2; for all SFmode
operations except __unordsf2 for e500v1). After that will come making
the soft-fp operations, in the remaining cases for which they are
built because they are actually needed for code compiled by current
GCC, into compat symbols when building for glibc 2.19 or later, so
that the glibc versions (with exception and rounding mode support) get
used instead (2.19 or later is needed for all the functions to be
exported from glibc as non-compat symbols). In turn, that is required
before implementing TARGET_ATOMIC_ASSIGN_EXPAND_FENV for soft-float
and e500, as that can only be properly effective when GCC-compiled
code is actually interoperating correctly with the exception and
rounding mode state used by <fenv.h> functions.
Tested with no regressions with cross to powerpc64-linux-gnu (in
addition, verified that stripped libgcc_s.so.1 is identical before and
after the patch).
* config.host (powerpc*-*-linux*): Only use soft-fp for 32-bit
configurations.
* config/rs6000/t-ppc64-fp (softfp_wrap_start, softfp_wrap_end):
Remove variables.
From-SVN: r216564
gcc:
2014-10-21 Joern Rennecke <joern.rennecke@embecosm.com>
Vidya Praveen <vidya.praveen@atmel.com>
Praveen Kumar Kaushik <Praveen_Kumar.Kaushik@atmel.com>
Senthil Kumar Selvaraj <Senthil_Kumar.Selvaraj@atmel.com>
Pitchumani Sivanupandi <Pitchumani.S@atmel.com>
* config/avr/avr-c.c (avr_cpu_cpp_builtins): Don't define
__MEMX for avrtiny.
* config/avr/avr.c (avr_insert_attributes): Reject __memx for avrtiny.
(avr_nonconst_pointer_addrspace): Likewise.
* config/avr/avr.h (AVR_HAVE_LPM): Define.
Added AVRTINY architecture to avr target.
* config/avr/avr-arch.h (avr_arch): Added AVRTINY architecture.
(base_arch_s): member added for AVRTINY architecture.
* config/avr/avr.c: Added TINY_ADIW, TINY_SBIW macros as AVRTINY
alternate for adiw/sbiw instructions. Added AVR_TMP_REGNO and
AVR_ZERO_REGNO macros for tmp and zero registers. Replaced TMP_REGNO
and ZERO_REGNO occurrences by AVR_TMP_REGNO and AVR_ZERO_REGNO
respectively. LAST_CALLEE_SAVED_REG macro added for the last register
in callee saved register list.
(avr_option_override): CCP address updated for AVRTINY.
(avr_init_expanders): tmp and zero rtx initialized as per arch.
Reset avr_have_dimode if AVRTINY.
(sequent_regs_live): Use LAST_CALLEE_SAVED_REG instead magic number.
(emit_push_sfr): Use AVR_TMP_REGNO for tmp register number.
(avr_prologue_setup_frame): Don't minimize prologue if AVRTINY.
Use LAST_CALLEE_SAVED_REG to refer last callee saved register.
(expand_epilogue): Likewise.
(avr_print_operand): Print CCP address in case of AVRTINY also.
<TBD>bad address
(function_arg_regno_p): Check different register list for arguments
if AVRTINY.
(init_cumulative_args): Check for AVRTINY to update number of argument
registers.
(tiny_valid_direct_memory_access_range): New function. Return false if
direct memory access range is not in accepted range for AVRTINY.
(avr_out_movqi_r_mr_reg_disp_tiny): New function to handle register
indirect load (with displacement) for AVRTINY.
(out_movqi_r_mr): Updated instruction length for AVRTINY. Call
avr_out_movqi_r_mr_reg_disp_tiny for load from reg+displacement.
(avr_out_movhi_r_mr_reg_no_disp_tiny): New function to handle register
indirect load (no displacement) for AVRTINY.
(avr_out_movhi_r_mr_reg_disp_tiny): New function to handle register
indirect load (with displacement) for AVRTINY.
(avr_out_movhi_r_mr_pre_dec_tiny): New function to handle register
indirect load for pre-decrement address.
(out_movhi_r_mr): In case of AVRTINY, call tiny register indirect load
functions. Update instruction length for AVRTINY.
(avr_out_movsi_r_mr_reg_no_disp_tiny): New function. Likewise, for
SImode.
(avr_out_movsi_r_mr_reg_disp_tiny): New function. Likewise, for SImode.
(out_movsi_r_mr): Likewise, for SImode.
(avr_out_movsi_mr_r_reg_no_disp_tiny): New function to handle register
indirect store (no displacement) for AVRTINY.
(avr_out_movsi_mr_r_reg_disp_tiny): New function to handle register
indirect store (with displacement) for AVRTINY.
(out_movsi_mr_r): Emit out insn for IO address store. Update store
instruction's size for AVRTINY. For AVRTINY, call tiny SImode indirect
store functions.
(avr_out_load_psi_reg_no_disp_tiny): New function to handle register
indirect load (no displacement) for PSImode in AVRTINY.
(avr_out_load_psi_reg_disp_tiny): New function to handle register
indirect load (with displacement) for PSImode in AVRTINY.
(avr_out_load_psi): Call PSImode register indirect load functions for
AVRTINY. Update instruction length for AVRTINY.
(avr_out_store_psi_reg_no_disp_tiny): New function to handle register
indirect store (no displacement) for PSImode in AVRTINY.
(avr_out_store_psi_reg_disp_tiny): New function to handle register
indirect store (with displacement) for PSImode in AVRTINY.
(avr_out_store_psi): Update instruction length for AVRTINY. Call tiny
register indirect store functions for AVRTINY.
(avr_out_movqi_mr_r_reg_disp_tiny): New function to handle QImode
register indirect store (with displacement) for AVRTINY.
(out_movqi_mr_r): Update instruction length for AVRTINY. Call tiny
register indirect store function for QImode in AVRTINY.
(avr_out_movhi_mr_r_xmega): Update instruction length for AVRTINY.
(avr_out_movhi_mr_r_reg_no_disp_tiny): New function to handle register
indirect store (no displacement) for HImode in AVRTINY.
(avr_out_movhi_mr_r_reg_disp_tiny): New function to handle register
indirect store (with displacement) for HImode in AVRTINY.
(avr_out_movhi_mr_r_post_inc_tiny): New function to handle register
indirect store for post-increment address in HImode.
(out_movhi_mr_r): Update instruction length for AVRTINY. Call tiny
register indirect store function for HImode in AVRTINY.
(avr_out_compare): Use TINY_SBIW/ TINY_ADIW in place of sbiw/adiw
in case of AVRTINY.
(order_regs_for_local_alloc): Updated register allocation order for
AVRTINY.
(avr_conditional_register_usage): New function. It is a target hook
(TARGET_CONDITIONAL_REGISTER_USAGE) function which updates fixed, call
used registers list and register allocation order for AVRTINY.
(avr_return_in_memory): Update return value size for AVRTINY.
* config/avr/avr-c.c (avr_cpu_cpp_builtins): Added builtin macros
for AVRTINY arch and tiny program memory base address.
* config/avr/avr-devices.c (avr_arch_types): Added AVRTINY arch.
(avr_texinfo): Added description for AVRTINY arch.
* config/avr/avr.h: Added macro to identify AVRTINY arch. Updated
STATIC_CHAIN_REGNUM for AVRTINY.
* config/avr/avr-mcus.def: Added AVRTINY arch devices.
* config/avr/avr.md: Added constants for tmp/ zero registers in
AVRTINY. Attributes for AVRTINY added.
(mov<mode>): Move src/ dest address to register if it is not in AVRTINY
memory access range.
(mov<mode>_insn): Avoid QImode direct load for AVRTINY if address not
in AVRTINY memory access range.
(*mov<mode>): Likewise for HImode and SImode.
(*movsf): Likewise for SFmode.
(delay_cycles_2): Updated instructions to be emitted as AVRTINY does
not have sbiw.
* config/avr/avr-protos.h: Added function prototype for
tiny_valid_direct_memory_access_range.
* config/avr/avr-tables.opt: Regenerate.
* gcc/config/avr/t-multilib: Regenerate.
* doc/avr-mmcu.texi: Regenerate.
gcc/testsuite:
2014-10-21 Joern Rennecke <joern.rennecke@embecosm.com>
* gcc.target/avr/tiny-memx.c: New test.
* gcc.target/avr/tiny-caller-save.c: New test.
libgcc:
2014-10-21 Joern Rennecke <joern.rennecke@embecosm.com>
Vidya Praveen <vidya.praveen@atmel.com>
Praveen Kumar Kaushik <Praveen_Kumar.Kaushik@atmel.com>
Senthil Kumar Selvaraj <Senthil_Kumar.Selvaraj@atmel.com>
Pitchumani Sivanupandi <Pitchumani.S@atmel.com>
* config/avr/lib1funcs.S (__do_global_dtors): Go back to descending
order.
Updated library functions for AVRTINY arch.
* config/avr/lib1funcs.S: Updated zero/tmp regs for AVRTINY.
Replaced occurrences of r0/r1 with tmp/zero reg macros.
Added wsubi/ wadi macros that expands conditionally as sbiw/ adiw
or AVRTINY equivalent. Replaced occurrences of sbiw/adiw with
wsubi/wadi macors.
(__mulsi3_helper): Update stack, preserve callee saved regs and
argument from stack. Restore callee save registers.
(__mulpsi3): Likewise.
(__muldi3, __udivmodsi4, __divmodsi4, __negsi2, __umoddi3, __udivmod64,
__moddi3, __adddi3, __adddi3_s8, __subdi3, __cmpdi2, __cmpdi2_s8,
__negdi2, __prologue_saves__, __epilogue_restores__): Excluded for
AVRTINY.
(__tablejump2__): Added lpm equivalent instructions for AVRTINY.
(__do_copy_data): Added new definition for AVRTINY.
(__do_clear_bss): Replace r17 by r18 to preserve zero reg for AVRTINY.
(__load_3, __load_4, __xload_1, __xload_2, __xload_3,
__xload_4, __movmemx_qi, __movmemx_hi): Excluded for AVRTINY.
* config/avr/lib1funcs-fixed.S: Replaced occurrences of r0/r1 with
tmp/zero reg macros. Replaced occurrences of sbiw/adiw with wsubi/wadi
macors.
* config/avr/t-avr (LIB1ASMFUNCS): Remove unsupported functions for
AVRTINY.
Fix broken long multiplication on tiny arch.
Co-Authored-By: Pitchumani Sivanupandi <pitchumani.s@atmel.com>
Co-Authored-By: Praveen Kumar Kaushik <Praveen_Kumar.Kaushik@atmel.com>
Co-Authored-By: Senthil Kumar Selvaraj <Senthil_Kumar.Selvaraj@atmel.com>
Co-Authored-By: Vidya Praveen <vidya.praveen@atmel.com>
From-SVN: r216525
The i386 sfp-machine.h defines FP_TRAPPING_EXCEPTIONS in a way that is
always wrong: it treats a set bit as indicating the exception is
trapping, when actually a set bit (both for 387 and SSE floating
point) indicates it is masked, and a clear bit indicates it is
trapping. This patch fixes this bug.
Bootstrapped with no regressions on x86_64-unknown-linux-gnu.
libgcc:
* config/i386/sfp-machine.h (FP_TRAPPING_EXCEPTIONS): Treat clear
bits not set bits as indicating trapping exceptions.
gcc/testsuite:
* gcc.dg/torture/float128-exact-underflow.c: New test.
From-SVN: r215347
This patch removes the LIBGCC2_HAS_{SF,DF,XF,TF}_MODE target macros,
replacing them by predefines with -fbuilding-libgcc, together with a
target hook that can influence those predefines when needed.
The new default is that a floating-point mode is supported in libgcc
if (a) it passes the scalar_mode_supported_p hook (otherwise it's not
plausible for it to be supported in libgcc) and (b) it's one of those
four modes (since those are the modes for which libgcc hardcodes the
possibility of support). The target hook can override the default
choice (in either direction) for modes that pass
scalar_mode_supported_p (although overriding in the direction of
returning true when the default would return false only makes sense if
all relevant functions are specially defined in libgcc for that
particular target).
The previous default settings depended on various settings such as
LIBGCC2_LONG_DOUBLE_TYPE_SIZE, as well as targets defining the above
target macros if the default wasn't correct.
The default scalar_mode_supported_p only declares a floating-point
mode to be supported if it matches one of float / double / long
double. This means that in most cases where a mode is only supported
conditionally in libgcc (TFmode only supported if it's the mode of
long double, most commonly), the default gets things right. Overrides
were needed in the following cases:
* SFmode would always have been supported in libgcc (the condition was
BITS_PER_UNIT == 8, true for all current targets), but pdp11
defaults to 64-bit float, and in that case SFmode would fail
scalar_mode_supported_p. I don't know if libgcc actually built for
pdp11 (and the port may well no longer be being used), but this
patch adds a scalar_mode_supported_p hook to it to ensure SFmode is
treated as supported.
* Certain i386 and ia64 targets need the new hook to match the
existing cases for when XFmode or TFmode support is present in
libgcc. For i386, the hook can always declare XFmode to be
supported - the cases where it's not are the cases where long double
is TFmode, in which case XFmode fails scalar_mode_supported_p[*] -
but TFmode support needs to be conditional. (And of the targets not
defining LIBGCC2_HAS_TF_MODE before this patch, some defined
LONG_DOUBLE_TYPE_SIZE to 64, so ensuring LIBGCC2_HAS_TF_MODE would
always be false, while others did not define it, so allowing it to
be true in the -mlong-double-128 case. This patch matches that
logic, although I suspect all the latter targets would have been
broken if you tried to enable -mlong-double-128 by default, for lack
of the soft-fp TFmode support in libgcc, which is separately
configured.)
[*] I don't know if it's deliberate not to support __float80 at all
with -mlong-double-128.
In order to implement the default version of the new hook,
insn-modes.h was made to contain macros such as HAVE_TFmode for each
machine mode, so the default hook can contain conditionals on whether
XFmode and TFmode exist (to match the hardcoding of a list of modes in
libgcc). This is also used in fortran/trans-types.c; previously it
had a conditional on defined(LIBGCC2_HAS_TF_MODE) (a bit dubious,
since it ignored the value of the macro), which is replaced by testing
defined(HAVE_TFmode), in conjunction with requiring
targetm.libgcc_floating_mode_supported_p.
(Fortran is testing something stronger than that hook: not only is
libgcc support required, but also libm or equivalent. Thus, it has a
test for ENABLE_LIBQUADMATH_SUPPORT in the case that the mode is
TFmode and that's not the same as any of the three standard types.
The old and new tests are intended to accept exactly the same set of
modes for all targets.)
Apart from the four target macros eliminated by this patch, it gets us
closer to eliminating LIBGCC2_LONG_DOUBLE_TYPE_SIZE as well, though a
few more places using that macro need changing first.
Bootstrapped with no regressions on x86_64-unknown-linux-gnu; also
built cc1 for crosses to ia64-elf and pdp11-none as a minimal test of
changes for those targets.
gcc:
* target.def (libgcc_floating_mode_supported_p): New hook.
* targhooks.c (default_libgcc_floating_mode_supported_p): New
function.
* targhooks.h (default_libgcc_floating_mode_supported_p): Declare.
* doc/tm.texi.in (LIBGCC2_HAS_DF_MODE, LIBGCC2_HAS_XF_MODE)
(LIBGCC2_HAS_TF_MODE): Remove.
(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): New @hook.
* doc/tm.texi: Regenerate.
* genmodes.c (emit_insn_modes_h): Define HAVE_%smode for each
machine mode.
* system.h (LIBGCC2_HAS_SF_MODE, LIBGCC2_HAS_DF_MODE)
(LIBGCC2_HAS_XF_MODE, LIBGCC2_HAS_TF_MODE): Poison.
* config/i386/cygming.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/darwin.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/djgpp.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/dragonfly.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/freebsd.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/gnu-user-common.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/i386-interix.h (IX86_NO_LIBGCC_TFMODE): Define.
* config/i386/i386.c (ix86_libgcc_floating_mode_supported_p): New
function.
(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): Define.
* config/i386/i386elf.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/lynx.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/netbsd-elf.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/netbsd64.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/nto.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/openbsd.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/openbsdelf.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/rtemself.h (IX86_NO_LIBGCC_TFMODE): Define.
* config/i386/sol2.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/vx-common.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/ia64/elf.h (IA64_NO_LIBGCC_TFMODE): Define.
* config/ia64/freebsd.h (IA64_NO_LIBGCC_TFMODE): Define.
* config/ia64/hpux.h (LIBGCC2_HAS_XF_MODE, LIBGCC2_HAS_TF_MODE):
Remove.
* config/ia64/ia64.c (TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P):
New macro.
(ia64_libgcc_floating_mode_supported_p): New function.
* config/ia64/linux.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/ia64/vms.h (IA64_NO_LIBGCC_XFMODE)
(IA64_NO_LIBGCC_TFMODE): Define.
* config/msp430/msp430.h (LIBGCC2_HAS_DF_MODE): Remove.
* config/pdp11/pdp11.c (TARGET_SCALAR_MODE_SUPPORTED_P): New
macro.
(pdp11_scalar_mode_supported_p): New function.
* config/rl78/rl78.h (LIBGCC2_HAS_DF_MODE): Remove.
* config/rx/rx.h (LIBGCC2_HAS_DF_MODE): Remove.
gcc/c-family:
* c-cppbuiltin.c (c_cpp_builtins): Define __LIBGCC_HAS_%s_MODE__
macros for floating-point modes.
gcc/fortran:
* trans-types.c (gfc_init_kinds): Check
targetm.libgcc_floating_mode_supported_p for floating-point
modes. Check HAVE_TFmode instead of LIBGCC2_HAS_TF_MODE.
libgcc:
* libgcc2.h (LIBGCC2_HAS_SF_MODE): Define using
__LIBGCC_HAS_SF_MODE__.
(LIBGCC2_HAS_DF_MODE): Define using __LIBGCC_HAS_DF_MODE__.
(LIBGCC2_HAS_XF_MODE): Define using __LIBGCC_HAS_XF_MODE__.
(LIBGCC2_HAS_TF_MODE): Define using __LIBGCC_HAS_TF_MODE__.
* config/libbid/bid_gcc_intrinsics.h
(LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Do not define.
(LIBGCC2_HAS_XF_MODE): Define using __LIBGCC_HAS_XF_MODE__.
(LIBGCC2_HAS_TF_MODE): Define using __LIBGCC_HAS_TF_MODE__.
* fixed-bit.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Do not define.
(LIBGCC2_HAS_SF_MODE): Define using __LIBGCC_HAS_SF_MODE__.
(LIBGCC2_HAS_DF_MODE): Define using __LIBGCC_HAS_DF_MODE__.
From-SVN: r215215
gcc/
PR target/63223
* config/avr/avr.md (*tablejump.3byte-pc): New insn.
(*tablejump): Restrict to !AVR_HAVE_EIJMP_EICALL. Add void clobber.
(casesi): Expand to *tablejump.3byte-pc if AVR_HAVE_EIJMP_EICALL.
libgcc/
PR target/63223
* config/avr/libgcc.S (__tablejump2__): Rewrite to use RAMPZ, ELPM
and R24 as needed. Make work for all devices and .text locations.
(__do_global_ctors, __do_global_dtors): Use word addresses.
(__tablejump__, __tablejump_elpm__): Remove functions.
* t-avr (LIB1ASMFUNCS): Remove _tablejump, _tablejump_elpm.
Add _tablejump2.
(XICALL, XIJMP): New macros.
From-SVN: r215152
gcc/c-family:
* c-cppbuiltin.c (c_cpp_builtins): Also define
__LIBGCC_EH_TABLES_CAN_BE_READ_ONLY__,
__LIBGCC_EH_FRAME_SECTION_NAME__, __LIBGCC_JCR_SECTION_NAME__,
__LIBGCC_CTORS_SECTION_ASM_OP__, __LIBGCC_DTORS_SECTION_ASM_OP__,
__LIBGCC_TEXT_SECTION_ASM_OP__, __LIBGCC_INIT_SECTION_ASM_OP__,
__LIBGCC_INIT_ARRAY_SECTION_ASM_OP__,
__LIBGCC_STACK_GROWS_DOWNWARD__,
__LIBGCC_DONT_USE_BUILTIN_SETJMP__,
__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__,
__LIBGCC_DWARF_FRAME_REGISTERS__,
__LIBGCC_EH_RETURN_STACKADJ_RTX__, __LIBGCC_JMP_BUF_SIZE__,
__LIBGCC_STACK_POINTER_REGNUM__ and
__LIBGCC_VTABLE_USES_DESCRIPTORS__ for -fbuilding-libgcc.
(builtin_define_with_value): Handle backslash-escaping in string
macro values.
libgcc:
* Makefile.in (CRTSTUFF_CFLAGS): Add -fbuilding-libgcc.
* config/aarch64/linux-unwind.h (STACK_POINTER_REGNUM): Change all
uses to __LIBGCC_STACK_POINTER_REGNUM__.
(DWARF_ALT_FRAME_RETURN_COLUMN): Change all uses to
__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__.
* config/alpha/vms-unwind.h (DWARF_ALT_FRAME_RETURN_COLUMN):
Change use to __LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__.
* config/cr16/unwind-cr16.c (STACK_GROWS_DOWNWARD): Change all
uses to __LIBGCC_STACK_GROWS_DOWNWARD__.
(DWARF_FRAME_REGISTERS): Change all uses to
__LIBGCC_DWARF_FRAME_REGISTERS__.
(EH_RETURN_STACKADJ_RTX): Change all uses to
__LIBGCC_EH_RETURN_STACKADJ_RTX__.
* config/cr16/unwind-dw2.h (DWARF_FRAME_REGISTERS): Change use to
__LIBGCC_DWARF_FRAME_REGISTERS__. Remove conditional definition.
* config/i386/cygming-crtbegin.c (EH_FRAME_SECTION_NAME): Change
use to __LIBGCC_EH_FRAME_SECTION_NAME__.
(JCR_SECTION_NAME): Change use to __LIBGCC_JCR_SECTION_NAME__.
* config/i386/cygming-crtend.c (EH_FRAME_SECTION_NAME): Change use
to __LIBGCC_EH_FRAME_SECTION_NAME__.
(JCR_SECTION_NAME): Change use to __LIBGCC_JCR_SECTION_NAME__
* config/mips/linux-unwind.h (STACK_POINTER_REGNUM): Change use to
__LIBGCC_STACK_POINTER_REGNUM__.
(DWARF_ALT_FRAME_RETURN_COLUMN): Change all uses to
__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__.
* config/nios2/linux-unwind.h (STACK_POINTER_REGNUM): Change use
to __LIBGCC_STACK_POINTER_REGNUM__.
* config/pa/hpux-unwind.h (DWARF_ALT_FRAME_RETURN_COLUMN): Change
all uses to __LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__.
* config/pa/linux-unwind.h (DWARF_ALT_FRAME_RETURN_COLUMN): Change
all uses to __LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__.
* config/rs6000/aix-unwind.h (DWARF_ALT_FRAME_RETURN_COLUMN):
Change all uses to __LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__.
(STACK_POINTER_REGNUM): Change all uses to
__LIBGCC_STACK_POINTER_REGNUM__.
* config/rs6000/darwin-fallback.c (STACK_POINTER_REGNUM): Change
use to __LIBGCC_STACK_POINTER_REGNUM__.
* config/rs6000/linux-unwind.h (STACK_POINTER_REGNUM): Change all
uses to __LIBGCC_STACK_POINTER_REGNUM__.
* config/sparc/linux-unwind.h (DWARF_FRAME_REGISTERS): Change use
to __LIBGCC_DWARF_FRAME_REGISTERS__.
* config/sparc/sol2-unwind.h (DWARF_FRAME_REGISTERS): Change use
to __LIBGCC_DWARF_FRAME_REGISTERS__.
* config/tilepro/linux-unwind.h (STACK_POINTER_REGNUM): Change use
to __LIBGCC_STACK_POINTER_REGNUM__.
* config/xtensa/unwind-dw2-xtensa.h (DWARF_FRAME_REGISTERS):
Remove conditional definition.
* crtstuff.c (TEXT_SECTION_ASM_OP): Change all uses to
__LIBGCC_TEXT_SECTION_ASM_OP__.
(EH_FRAME_SECTION_NAME): Change all uses to
__LIBGCC_EH_FRAME_SECTION_NAME__.
(EH_TABLES_CAN_BE_READ_ONLY): Change all uses to
__LIBGCC_EH_TABLES_CAN_BE_READ_ONLY__.
(CTORS_SECTION_ASM_OP): Change all uses to
__LIBGCC_CTORS_SECTION_ASM_OP__.
(DTORS_SECTION_ASM_OP): Change all uses to
__LIBGCC_DTORS_SECTION_ASM_OP__.
(JCR_SECTION_NAME): Change all uses to
__LIBGCC_JCR_SECTION_NAME__.
(INIT_SECTION_ASM_OP): Change all uses to
__LIBGCC_INIT_SECTION_ASM_OP__.
(INIT_ARRAY_SECTION_ASM_OP): Change all uses to
__LIBGCC_INIT_ARRAY_SECTION_ASM_OP__.
* generic-morestack.c (STACK_GROWS_DOWNWARD): Change all uses to
__LIBGCC_STACK_GROWS_DOWNWARD__.
* libgcc2.c (INIT_SECTION_ASM_OP): Change all uses to
__LIBGCC_INIT_SECTION_ASM_OP__.
(INIT_ARRAY_SECTION_ASM_OP): Change all uses to
__LIBGCC_INIT_ARRAY_SECTION_ASM_OP__.
(EH_FRAME_SECTION_NAME): Change all uses to
__LIBGCC_EH_FRAME_SECTION_NAME__.
* libgcov-profiler.c (VTABLE_USES_DESCRIPTORS): Remove conditional
definitions. Change all uses to
__LIBGCC_VTABLE_USES_DESCRIPTORS__.
* unwind-dw2.c (STACK_GROWS_DOWNWARD): Change all uses to
__LIBGCC_STACK_GROWS_DOWNWARD__.
(DWARF_FRAME_REGISTERS): Change all uses to
__LIBGCC_DWARF_FRAME_REGISTERS__.
(EH_RETURN_STACKADJ_RTX): Change all uses to
__LIBGCC_EH_RETURN_STACKADJ_RTX__.
* unwind-dw2.h (DWARF_FRAME_REGISTERS): Remove conditional
definition. Change use to __LIBGCC_DWARF_FRAME_REGISTERS__.
* unwind-sjlj.c (DONT_USE_BUILTIN_SETJMP): Change all uses to
__LIBGCC_DONT_USE_BUILTIN_SETJMP__.
(JMP_BUF_SIZE): Change use to __LIBGCC_JMP_BUF_SIZE__.
From-SVN: r214954
gcc/
2014-07-30 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
* config/s390/s390.c (s390_emit_tpf_eh_return): Pass original return
address as second parameter to __tpf_eh_return routine.
libgcc/
2014-07-30 J. D. Johnston <jjohnst@us.ibm.com>
* config/s390/tpf-unwind.h: Include <stdbool.h>.
(__tpf_eh_return): Add original return address as second parameter.
Handle cases where unwinder routines were called directly, instead
of from within the C++ library.
From-SVN: r213305
* config/i386/cygming-crtbegin.c (deregister_frame_fn): Newly public.
(__gcc_deregister_frame): Move logic to detect deregister function to...
(__gcc_register_frame): here, so it's consistent with the register logic.
From-SVN: r213009
* config/pa/linux-atomic.c (__sync_lock_release_4): New.
(SYNC_LOCK_RELEASE): Update to use __kernel_cmpxchg for release.
Don't use SYNC_LOCK_RELEASE for int type.
From-SVN: r212767
2014-06-18 Charles Baylis <charles.baylis@linaro.org>
* config/arm/bpabi.S (__aeabi_ldivmod): Perform division using
__udivmoddi4, and fixups for negative operands.
From-SVN: r211794
2014-06-18 Charles Baylis <charles.baylis@linaro.org>
* config/arm/bpabi.S (__aeabi_uldivmod): Perform division using call
to __udivmoddi4.
From-SVN: r211792
2014-06-18 Charles Baylis <charles.baylis@linaro.org>
* config/arm/bpabi.S (__aeabi_uldivmod, __aeabi_ldivmod): Add comment
describing register usage on function entry and exit.
From-SVN: r211790
2014-04-30 Bernd Edlinger <bernd.edlinger@hotmail.de>
Work around for current cygwin32 build problems.
* config/i386/cygming-crtbegin.c (__register_frame_info,
__deregister_frame_info, _Jv_RegisterClasses): Compile weak default
functions only for 64-bit systems.
From-SVN: r209942
2014-01-25 Walter Lee <walt@tilera.com>
* config/tilepro/atomic.c: Include tconfig.h. Don't include
config.h or system.h.
(bool) Define.
From-SVN: r207088
2014-01-25 Walter Lee <walt@tilera.com>
* config/tilepro/atomic.c (pre_atomic_barrier): Mark inline.
(post_atomic_barrier): Ditto.
(__fetch_and_do): New macro.
(__atomic_fetch_and_do): Use __fetch_and_do.
(__sync_fetch_and_do): New macro.
(__sync_fetch_and_add_4): New function.
(__sync_fetch_and_sub_4): New function.
(__sync_fetch_and_or_4): New function.
(__sync_fetch_and_and_4): New function.
(__sync_fetch_and_xor_4): New function.
(__sync_fetch_and_nand_4): New function.
(__sync_fetch_and_add_8): New function.
(__sync_fetch_and_sub_8): New function.
(__sync_fetch_and_or_8): New function.
(__sync_fetch_and_and_8): New function.
(__sync_fetch_and_xor_8): New function.
(__sync_fetch_and_nand_8): New function.
(__do_and_fetch): New macro.
(__atomic_do_and_fetch): Use __do_and_fetch.
(__sync_do_and_fetch): New macro.
(__sync_add_and_fetch_4): New function.
(__sync_sub_and_fetch_4): New function.
(__sync_or_and_fetch_4): New function.
(__sync_and_and_fetch_4): New function.
(__sync_xor_and_fetch_4): New function.
(__sync_nand_and_fetch_4): New function.
(__sync_add_and_fetch_8): New function.
(__sync_sub_and_fetch_8): New function.
(__sync_or_and_fetch_8): New function.
(__sync_and_and_fetch_8): New function.
(__sync_xor_and_fetch_8): New function.
(__sync_nand_and_fetch_8): New function.
(__sync_exchange_methods): New macro.
(__sync_val_compare_and_swap_4): New function.
(__sync_bool_compare_and_swap_4): New function.
(__sync_lock_test_and_test_4): New function.
(__sync_val_compare_and_swap_8): New function.
(__sync_bool_compare_and_swap_8): New function.
(__sync_lock_test_and_test_8): New function.
(__subword_cmpxchg_body): New macro.
(__atomic_compare_exchange_1): Use __subword_cmpxchg_body.
(__atomic_compare_exchange_2): Ditto.
(__sync_subword_cmpxchg): New macro.
(__sync_val_compare_and_swap_1): New function.
(__sync_bool_compare_and_swap_1): New function.
(__sync_val_compare_and_swap_2): New function.
(__sync_bool_compare_and_swap_2): New function.
(__atomic_subword): Rename to ...
(__subword): ... New name.
(__atomic_subword_fetch): Use __subword.
(__sync_subword_fetch): New macro.
(__sync_fetch_and_add_1): New function.
(__sync_fetch_and_sub_1): New function.
(__sync_fetch_and_or_1): New function.
(__sync_fetch_and_and_1): New function.
(__sync_fetch_and_xor_1): New function.
(__sync_fetch_and_nand_1): New function.
(__sync_fetch_and_add_2): New function.
(__sync_fetch_and_sub_2): New function.
(__sync_fetch_and_or_2): New function.
(__sync_fetch_and_and_2): New function.
(__sync_fetch_and_xor_2): New function.
(__sync_fetch_and_nand_2): New function.
(__sync_add_and_fetch_1): New function.
(__sync_sub_and_fetch_1): New function.
(__sync_or_and_fetch_1): New function.
(__sync_and_and_fetch_1): New function.
(__sync_xor_and_fetch_1): New function.
(__sync_nand_and_fetch_1): New function.
(__sync_add_and_fetch_2): New function.
(__sync_sub_and_fetch_2): New function.
(__sync_or_and_fetch_2): New function.
(__sync_and_and_fetch_2): New function.
(__sync_xor_and_fetch_2): New function.
(__sync_nand_and_fetch_2): New function.
(__atomic_subword_lock): Use __subword.
(__sync_subword_lock): New macro.
(__sync_lock_test_and_set_1): New function.
(__sync_lock_test_and_set_2): New function.
From-SVN: r207087
2014-01-25 Walter Lee <walt@tilera.com>
* config/tilepro/atomic.c (BIT_OFFSET): Define.
(__atomic_subword_cmpxchg): Use BIT_OFFSET.
(__atomic_subword): Ditto.
From-SVN: r207086
2014-01-25 Walter Lee <walt@tilera.com>
* config/tilepro/atomic.c (__atomic_do_and_fetch): Add a
prefix op argument.
(__atomic_nand_fetch_4): Add prefix op.
(__atomic_nand_fetch_8): Ditto.
From-SVN: r207085
libgcc:
* config/rs6000/ibm-ldouble.c (__gcc_qdiv): Scale up arguments in
case of small numerator and finite nonzero result.
gcc/testsuite:
* gcc.target/powerpc/rs6000-ldouble-3.c: New test.
From-SVN: r206310
gcc/
* common/config/arc/arc-common.c, config/arc/arc-modes.def,
config/arc/arc-protos.h, config/arc/arc.c, config/arc/arc.h,
config/arc/arc.md, config/arc/arc.opt, config/arm/arm_neon_builtins.def,
config/arm/crypto.def, config/i386/avx512cdintrin.h,
config/i386/avx512erintrin.h, config/i386/avx512fintrin.h,
config/i386/avx512pfintrin.h, config/i386/btver2.md,
config/i386/shaintrin.h, config/i386/slm.md, config/linux-protos.h,
config/linux.c, config/winnt-c.c, diagnostic-color.c,
diagnostic-color.h, gimple-ssa-isolate-paths.c, vtable-verify.c,
vtable-verify.h: Use the standard form for the copyright notice.
gcc/c-family/
* array-notation-common.c, c-cilkplus.c: Use the standard form for
the copyright notice.
gcc/c/
* c-array-notation.c: Use the standard form for the copyright notice.
gcc/cp/
* cp-array-notation.c, cp-cilkplus.c, vtable-class-hierarchy.c: Use
the standard form for the copyright notice.
gcc/testsuite/
* gcc.target/arc/arc.exp: Use the standard form for the copyright
notice.
libgcc/
* config/arc/asm.h, config/arc/crtg.S, config/arc/crtgend.S,
config/arc/crti.S, config/arc/crtn.S, config/arc/divtab-arc700.c,
config/arc/dp-hack.h, config/arc/fp-hack.h,
config/arc/ieee-754/adddf3.S, config/arc/ieee-754/addsf3.S,
config/arc/ieee-754/arc600-dsp/divdf3.S,
config/arc/ieee-754/arc600-dsp/divsf3.S,
config/arc/ieee-754/arc600-dsp/muldf3.S,
config/arc/ieee-754/arc600-dsp/mulsf3.S,
config/arc/ieee-754/arc600-mul64/divdf3.S,
config/arc/ieee-754/arc600-mul64/divsf3.S,
config/arc/ieee-754/arc600-mul64/muldf3.S,
config/arc/ieee-754/arc600-mul64/mulsf3.S,
config/arc/ieee-754/arc600/divsf3.S,
config/arc/ieee-754/arc600/mulsf3.S,
config/arc/ieee-754/divdf3.S, config/arc/ieee-754/divsf3-stdmul.S,
config/arc/ieee-754/divsf3.S, config/arc/ieee-754/divtab-arc-df.c,
config/arc/ieee-754/divtab-arc-sf.c, config/arc/ieee-754/eqdf2.S,
config/arc/ieee-754/eqsf2.S, config/arc/ieee-754/extendsfdf2.S,
config/arc/ieee-754/fixdfsi.S, config/arc/ieee-754/fixsfsi.S,
config/arc/ieee-754/fixunsdfsi.S, config/arc/ieee-754/floatsidf.S,
config/arc/ieee-754/floatsisf.S, config/arc/ieee-754/floatunsidf.S,
config/arc/ieee-754/gedf2.S, config/arc/ieee-754/gesf2.S,
config/arc/ieee-754/gtdf2.S, config/arc/ieee-754/gtsf2.S,
config/arc/ieee-754/muldf3.S, config/arc/ieee-754/mulsf3.S,
config/arc/ieee-754/orddf2.S, config/arc/ieee-754/ordsf2.S,
config/arc/ieee-754/truncdfsf2.S, config/arc/ieee-754/uneqdf2.S,
config/arc/ieee-754/uneqsf2.S, config/arc/initfini.c,
config/arc/lib1funcs.S, config/arc/t-arc, config/arc/t-arc-newlib,
config/cris/umulsidi3.S, config/msp430/cmpsi2.S,
config/msp430/epilogue.S, config/msp430/lib2bitcountHI.c,
config/msp430/lib2divHI.c, config/msp430/lib2divQI.c,
config/msp430/lib2divSI.c, config/msp430/lib2mul.c,
config/msp430/msp430-divmod.h, config/msp430/msp430-mul.h,
config/msp430/slli.S, config/msp430/srai.S, config/msp430/srli.S,
config/rl78/divmodhi.S, config/rl78/divmodqi.S, config/rl78/divmodsi.S,
config/rl78/signbit.S, vtv_end.c, vtv_end_preinit.c, vtv_start.c,
vtv_start_preinit.c: Use the standard form for the copyright notice.
libgomp/
* hashtab.h: Use the standard form for the copyright notice.
libstdc++-v3/
* testsuite/18_support/new_handler.cc,
testsuite/18_support/terminate_handler.cc,
testsuite/18_support/unexpected_handler.cc: Use the standard form for
the copyright notice.
From-SVN: r206288
contrib/
2013-12-31 Chung-Lin Tang <cltang@codesourcery.com>
* config-list.mk: Add nios2-elf, nios2-linux-gnu. Corrected
ordering of some configs.
gcc/
2013-12-31 Chung-Lin Tang <cltang@codesourcery.com>
Sandra Loosemore <sandra@codesourcery.com>
Based on patches from Altera Corporation
* config.gcc (nios2-*-*): Add nios2 config targets.
* configure.ac (TLS_SECTION_ASM_FLAG): Add nios2 case.
("$cpu_type"): Add nios2 as new cpu type.
* configure: Regenerate.
* config/nios2/nios2.c: New file.
* config/nios2/nios2.h: New file.
* config/nios2/nios2-opts.h: New file.
* config/nios2/nios2-protos.h: New file.
* config/nios2/elf.h: New file.
* config/nios2/elf.opt: New file.
* config/nios2/linux.h: New file.
* config/nios2/nios2.opt: New file.
* config/nios2/nios2.md: New file.
* config/nios2/predicates.md: New file.
* config/nios2/constraints.md: New file.
* config/nios2/t-nios2: New file.
* common/config/nios2/nios2-common.c: New file.
* doc/invoke.texi (Nios II options): Document Nios II specific
options.
* doc/md.texi (Nios II family): Document Nios II specific
constraints.
* doc/extend.texi (Function Specific Option Pragmas): Document
Nios II supported target pragma functionality.
gcc/testsuite/
2013-12-31 Sandra Loosemore <sandra@codesourcery.com>
Chung-Lin Tang <cltang@codesourcery.com>
Based on patches from Altera Corporation
* gcc.dg/stack-usage-1.c (SIZE): Define case for __nios2__.
* gcc.dg/20040813-1.c: Skip for nios2-*-*.
* gcc.dg/20020312-2.c: Add __nios2__ case.
* g++.dg/other/PR23205.C: Skip for nios2-*-*.
* g++.dg/other/pr23205-2.C: Skip for nios2-*-*.
* g++.dg/cpp0x/constexpr-rom.C: Skip for nios2-*-*.
* g++.dg/cpp0x/alias-decl-debug-0.C: Skip for nios2-*-*.
* g++.old-deja/g++.jason/thunk3.C: Skip for nios2-*-*.
* lib/target-supports.exp (check_profiling_available): Check for
nios2-*-elf.
* gcc.c-torture/execute/pr47237.x:: Skip for nios2-*-*.
* gcc.c-torture/execute/20101011-1.c: Skip for nios2-*-*.
* gcc.c-torture/execute/builtins/lib/chk.c (memset): Place
char-based memset loop before inline check, to prevent
problems when called to initialize .bss. Update comments.
* gcc.target/nios2/nios2.exp: New DejaGNU file.
* gcc.target/nios2/nios2-custom-1.c: New test.
* gcc.target/nios2/nios2-trap-insn.c: New test.
* gcc.target/nios2/nios2-builtin-custom.c: New test.
* gcc.target/nios2/nios2-builtin-io.c: New test.
* gcc.target/nios2/nios2-stack-check-1.c: New test.
* gcc.target/nios2/nios2-stack-check-2.c: New test.
* gcc.target/nios2/nios2-rdctl.c: New test.
* gcc.target/nios2/nios2-wrctl.c: New test.
* gcc.target/nios2/nios2-wrctl-zero.c: New test.
* gcc.target/nios2/nios2-wrctl-not-zero.c: New test.
* gcc.target/nios2/nios2-rdwrctl-1.c: New test.
* gcc.target/nios2/nios2-reg-constraints.c: New test.
* gcc.target/nios2/nios2-ashlsi3-one_shift.c: New test.
* gcc.target/nios2/nios2-mul-options-1.c: New test.
* gcc.target/nios2/nios2-mul-options-2.c: New test.
* gcc.target/nios2/nios2-mul-options-3.c: New test.
* gcc.target/nios2/nios2-mul-options-4.c: New test.
* gcc.target/nios2/nios2-nor.c: New test.
* gcc.target/nios2/nios2-stxio.c: New test.
* gcc.target/nios2/custom-fp-1.c: New test.
* gcc.target/nios2/custom-fp-2.c: New test.
* gcc.target/nios2/custom-fp-3.c: New test.
* gcc.target/nios2/custom-fp-4.c: New test.
* gcc.target/nios2/custom-fp-5.c: New test.
* gcc.target/nios2/custom-fp-6.c: New test.
* gcc.target/nios2/custom-fp-7.c: New test.
* gcc.target/nios2/custom-fp-8.c: New test.
* gcc.target/nios2/custom-fp-cmp-1.c: New test.
* gcc.target/nios2/custom-fp-conversion.c: New test.
* gcc.target/nios2/custom-fp-double.c: New test.
* gcc.target/nios2/custom-fp-float.c: New test.
* gcc.target/nios2/nios2-int-types.c: New test.
* gcc.target/nios2/nios2-cache-1.c: New test.
* gcc.target/nios2/nios2-cache-2.c: New test.
libgcc/
2013-12-31 Sandra Loosemore <sandra@codesourcery.com>
Chung-Lin Tang <cltang@codesourcery.com>
Based on patches from Altera Corporation
* config.host (nios2-*-*,nios2-*-linux*): Add nios2 host cases.
* config/nios2/lib2-nios2.h: New file.
* config/nios2/lib2-divmod-hi.c: New file.
* config/nios2/linux-unwind.h: New file.
* config/nios2/lib2-divmod.c: New file.
* config/nios2/linux-atomic.c: New file.
* config/nios2/t-nios2: New file.
* config/nios2/crti.asm: New file.
* config/nios2/t-linux: New file.
* config/nios2/lib2-divtable.c: New file.
* config/nios2/lib2-mul.c: New file.
* config/nios2/tramp.c: New file.
* config/nios2/crtn.asm: New file.
From-SVN: r206256
* config/i386/cpuinfo.c (enum vendor_signatures): Remove.
(__cpu_indicator_init): Use signature_INTEL_ebx and signature_AMD_ebx
from cpuid.h to check vendor signatures.
From-SVN: r206211
2013-12-04 Kugan Vivekanandarajah <kuganv@linaro.org>
* config/arm/bpapi-lib.h (TARGET_HAS_NO_HW_DIVIDE): Define for
architectures that do not have hardware divide instruction.
i.e. architectures that do not define __ARM_ARCH_EXT_IDIV__.
From-SVN: r205666
libgcc/ChangeLog:
2013-12-03 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
* config/rs6000/ibm-ldouble.c (__gcc_qadd): Fix add
of normal number and qNaN to not raise an inexact exception.
gcc/testsuite/ChangeLog:
2013-12-03 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
* gcc.target/powerpc/pr57363.c: New test.
From-SVN: r205645
2013-11-26 Matthew Leach <matthew.leach@arm.com>
* config/aarch64/linux-unwind.h (aarch64_fallback_frame_state): Check
for correct opcodes on BE.
From-SVN: r205479
2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
Alan Modra <amodra@gmail.com>
* config/rs6000/linux-unwind.h (ppc_fallback_frame_state): Correct
location of CR save area for 64-bit little-endian systems.
Co-Authored-By: Alan Modra <amodra@gmail.com>
From-SVN: r204800
2013-11-10 Kai Tietz <ktietz@redhat.com>
* config/i386/cygming-crtbegin.c (__gcc_register_frame):
Increment load-count on use of LIBGCC_SONAME DLL.
(hmod_libgcc): New static variable to hold handle of
LIBGCC_SONAME DLL.
(__gcc_deregister_frame): Decrement load-count of
LIBGCC_SONAME DLL.
From-SVN: r204635
* config/i386/sfp-exceptions.c (__sfp_handle_exceptions): Handle
FP_EX_DENORM. Store result to volatile location after SSE division
to close interrupt window. Remove unneeded fwait after x87
division since interrupt window will be closed by emitted fstp.
From-SVN: r204540
gcc/
* config/i386/i386-c.c (ix86_target_macros): Define _SOFT_FLOAT
for !TARGET_80387.
* config/i386/rtemself.h (TARGET_OS_CPP_BUILTINS): Do not define
_SOFT_FLOAT here.
(LONG_DOUBLE_TYPE_SIZE): New define.
(LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Ditto.
libgcc/
* config/i386/32/sfp-machine.h (_FP_MUL_MEAT_S): Define.
(_FP_MUL_MEAT_D): Ditto.
(_FP_DIV_MEAT_S): Ditto.
(_FP_DIV_MEAT_D): Ditto.
* config.host (i[34567]86-*-rtems*): Remove i386/t-softfp, add
t-softfp-sfdf and t-softfp to tmake_file.
M gcc/config/i386/i386-c.c
M gcc/config/i386/rtemself.h
M gcc/ChangeLog
M libgcc/ChangeLog
M libgcc/config.host
M libgcc/config/i386/32/sfp-machine.h
From-SVN: r204404
* config.host (cpu_type) <Setting default>: Add entry for
crisv32-*-*.
(tmake_file) <crisv32-*-elf, cris-*-elf, cris-*-linux*>
<crisv32-*-linux*>: Adjust.
* longlong.h: Wrap the whole CRIS section in a single
defined(__CRIS__) conditional. Add comment about add_ssaaaa
and sub_ddmmss.
(COUNT_LEADING_ZEROS_0): Define when count_leading_zeros is
defined.
[__CRIS__] (__umulsidi3): Define.
[__CRIS__] (umul_ppmm): Define in terms of __umulsidi3.
* config/cris/sfp-machine.h: New file.
* config/cris/umulsidi3.S: New file.
* config/cris/t-elfmulti (LIB2ADD_ST): Add umulsidi3.S.
* config/cris/arit.c (SIGNMULT): New macro.
(__Div, __Mod): Use SIGNMULT instead of naked multiplication.
* config/cris/mulsi3.S: Tweak to avoid redundant register-copying;
saving 3 out of originally 33 cycles from the fastest
path, 3 out of 54 from the medium path and one from the longest
path. Improve comments.
From-SVN: r203640
* config/mips/mips16.S (CE_STARTFN, CE_ENDFN): New macros.
(RET_FUNCTION): Use them in place of STARTFN and ENDFN.
(CALL_STUB_NO_RET): Likewise.
(CALL_STUB_RET): Likewise.
* config/mips/libgcc-mips16.ver: Remove __mips16_call_stub and
__mips16_ret call/return stub symbols.
* config.host <mips*-*-linux>: For non-R5900 add t-slibgcc-libgcc
to tmake_file.
Co-Authored-By: Catherine Moore <clm@codesourcery.com>
Co-Authored-By: Richard Sandiford <rdsandiford@googlemail.com>
From-SVN: r201805
2013-07-23 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/s390/linux-unwind.h: Use the proper dwarf to hard reg
mapping for FPRs when creating the fallback framestate.
From-SVN: r201156
gcc/
PR target/57516
* config/avr/avr-fixed.md (round<mode>3_const): Turn expander to insn.
* config/avr/avr.md (adjust_len): Add `round'.
* config/avr/avr-protos.h (avr_out_round): New prototype.
(avr_out_plus): Add `out_label' argument.
* config/avr/avr.c (avr_out_plus_1): Add `out_label' argument.
(avr_out_plus): Pass down `out_label' to avr_out_plus_1.
Handle the case where `insn' is just a pattern.
(avr_out_bitop): Handle the case where `insn' is just a pattern.
(avr_out_round): New function.
(avr_adjust_insn_length): Handle ADJUST_LEN_ROUND.
libgcc/
PR target/57516
* config/avr/lib1funcs-fixed.S (__roundqq3, __rounduqq3)
(__round_s2_const, __round_u2_const)
(__round_s4_const, __round_u4_const, __round_x8):
Saturate result if addition result cannot be represented.
gcc/testsuite/
PR target/57516
* gcc.target/avr/torture/builtins-4-roundfx.c (test2hr, test2k):
Adjust to corrected rounding.
From-SVN: r201051
PR target/6526
* config/sh/lib1funcs.S (sdivsi3_i4, udivsi3_i4): Do not change bits
other than FPSCR.PR and FPSCR.SZ. Add SH4A implementation.
PR target/6526
* gcc.target/sh/pr6526.c: New.
From-SVN: r199873
* config/tilepro/atomic.h: Don't include stdint.h or features.h.
Replace int64_t with long long. Add __extension__ where
appropriate.
* config/tilepro/atomic.c: Include config.h.
From-SVN: r199855
* config/sparc/sol2-unwind.h (MD_FALLBACK_FRAME_STATE_FOR): Do not set
fs->signal_frame for SIGFPE raised for IEEE-754 exceptions.
* config/i386/sol2-unwind.h (x86_fallback_frame_state): Likewise.
From-SVN: r199381
* config/sparc/sol2-unwind.h (sparc64_frob_update_context): Do it for
signal frames as well.
(MD_FALLBACK_FRAME_STATE_FOR): Do minor cleanups throughout and add the
STACK_BIAS to the CFA offset.
From-SVN: r199191
libgcc/
* config/aarch64/sfp-machine.h (_FP_W_TYPE): Change to define
as 'unsigned long long' instead of 'unsigned long'.
(_FP_WS_TYPE): Change to define as 'signed long long' instead of
'signed long'.
From-SVN: r198090
* config/arm/linux-atomic.c (SUBWORD_SYNC_OP, SUBWORD_VAL_CAS)
(SUBWORD_TEST_AND_SET): Use signed char/short types instead of
unsigned char/unsigned short.
(__sync_val_compare_and_swap_{1,2}): Handle signed argument.
From-SVN: r197806
libgcc/
2013-04-04 Meador Inge <meadori@codesourcery.com>
* config/arm/bpabi.S (aeabi_ldivmod): Add DWARF information for
computing the location of the link register.
(aeabi_uldivmod): Ditto.
From-SVN: r197493
PR target/55431
* config/rs6000/linux-unwind.h (ppc_linux_aux_vector): Delete.
(ppc_fallback_frame_state): Always set up save locations for fp
and altivec. Don't bother with non-callee-saved regs, r0-r13
except for r2 on ppc64, fr0-fr13, v0-v19, vscr.
From-SVN: r196077
gcc/
PR target/54222
* config/avr/avr.md (unspec) <UNSPEC_ROUND>: Add.
* config/avr/avr-fixed.md (ALL4QA, ALL124QA): New mode iterators.
(round<mode>3, round<mode>3_const): New expanders for fixed-mode.
(*round<mode>3.libgcc): New insns for fixed-modes.
* config/avr/builtins.def (ABSxx): Use a non-NULL LIBNAME.
(ROUNDxx, COUNTLSxx, BITSxx, xxBITS): New DEF_BUILTINs.
(ROUNDFX, COUNTLSFX, ABSFX): New DEF_BUILTINs.
* config/avr/stdfix.h (absFX, bitsFX, FXbits): Remove inline
implementations. Define to __builtin_avr_absFX,
__builtin_avr_bitsFX, __builtin_avr_FXbits, respectively.
(roundFX, countlsFX): Define to __builtin_avr_roundFX,
__builtin_avr_countlsFX, respectively.
* config/avr/avr-c.c (target.h): Include it.
(enum avr_builtin_id): New enum.
(avr_resolve_overloaded_builtin): New static function.
(avr_register_target_pragmas): Use it to set
targetm.resolve_overloaded_builtin.
* config/avr/avr.c (avr_init_builtins): Supply myriads of local
tree nodes used by DEF_BUILTIN.
(avr_expand_builtin) <AVR_BUILTIN_ROUNDxx>: Sanity-check them.
(avr_fold_builtin) <AVR_BUILTIN_BITSxx>: Fold to VIEW_COVERT_EXPR.
<AVR_BUILTIN_xxBITS>: Same.
libgcc/
PR target/54222
* config/avr/lib2funcs.c: New C sources for modules for libgcc.a.
* config/avr/lib2-object.mk: New iterator to build objects from it.
* config/avr/t-avr: Iterate lib2-object.mk to build objects from
lib2funcs.c.
(LIB2FUNCS_EXCLUDE): Add _clrsbdi2.
(LIB1ASMFUNCS): Add: _ssabs_1, _mask1, _ret, _roundqq3, _rounduqq3,
_round_s2, _round_u2, _round_2_const, _addmask_2, _round_s4,
_round_u4, _round_4_const, _addmask_4, _round_x8, _rounddq3
_roundudq3, _roundda3 _rounduda3, _roundta3 _rounduta3.
* config/avr/lib1funcs-fixed.S: Implement them.
gcc/testsuite/
PR target/54222
* gcc.target/avr/torture/builtins-4-roundfx.c: New test.
* gcc.target/avr/torture/builtins-5-countlsfx.c: New test.
From-SVN: r195878
* config/v850/lib1funcs.S: Add support for e3v5 architecture
variant.
* config/v850/constraints.md (Q): Define as a memory constraint.
* config/v850/predicates.md (label_ref_operand): New predicate.
(e3v5_shift_operand): New predicate.
(ior_operator): New predicate.
* config/v850/t-v850: Add e3v5 multilib.
* config/v850/v850-protos.h (v850_adjust_insn_length): Prototype.
(v850_gen_movdi): Prototype.
* config/v850/v850.c: Add support for e3v5 architecture.
Rename all uses of TARGET_V850E || TARGET_V850E2_ALL to
TARGET_V850E_UP.
(construct_save_jarl): Add e3v5 long JARL support.
(v850_adjust_insn_length): New function. Adjust length of call
insns when using e3v5 instructions.
(v850_gen_movdi): New function: Generate instructions to move a
DImode value.
* config/v850/v850.h (TARGET_CPU_v850e3v5): Define.
(CPP_SPEC): Define __v850e3v5__ as appropriate.
(TARGET_USE_FPU): Enable for e3v5.
(CONST_OK_FOR_W): New macro.
(ADJUST_INSN_LENGTH): Define.
* config/v850/v850.md (UNSPEC_LOOP): Define.
(attr cpu): Add v850e3v5.
Rename all uses of TARGET_V850E2 to TARGET_V850E2V3_UP.
(movdi): New pattern.
(movdi_internal): New pattern.
(cbranchsf4): Conditionalize on TARGET_USE_FPU.
(cbranchdf4): Conditionalize on TARGET_USE_FPU.
(cstoresf4): Likewise.
(cstoredf4): Likewise.
(insv): New pattern.
(rotlso3_a): New pattern.
(rotlsi3_b): New pattern
(rotlsi3_v850e3v5): New pattern.
(doloop_begin): New pattern.
(fix_loop_counter): New pattern.
(doloop_end): New pattern.
(branch_normal): Add e3v5 long branch support.
(branch_invert): Likewise.
(branch_z_normal): Likewise.
(branch_z_invert): Likewise.
(branch_nz_normal): Likewise.
(branch_nz_invert): Likewise.
(call_internal_short): Add e3v5 register-indirect JARL support.
(call_internal_long): Likewise.
(call_value_internal_short): Likewise.
(call_value_internal_long): Likewise.
* config/v850/v850.opt (mv850e3v5, mv850e2v4): New options.
(mloop): New option.
* config.gcc: Add support for configuring v840e3v5 target.
* doc/invoke.texi: Document new v850 specific command line
options.
From-SVN: r195623
gcc: PR target/54663
* config.gcc (microblaze*-linux*): Add tmake_file to allow building
of microblaze-c.o.
libgcc:
* config.host(microblaze*-linux*): tmake_file: Remove
t-slibgcc-nolc-override, add t-slibgcc-libgcc.
* config/microblaze/t-microblaze: Set LIB2FUNCS_EXCLUDE
to exclude functions from being built with libgcc.c and use
the microblaze assembly.
From-SVN: r195488
2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
* config/aarch64/sync-cache.c (__aarch64_sync_cache_range): Cast the
results of (dcache_lsize - 1) and (icache_lsize - 1) to the type
__UINTPTR_TYPE__; also cast 'base' to the same type before the
alignment operation.
From-SVN: r195266
libgcc/
Adjust decimal point of signed accum mode to GCC default.
PR target/54222
* config/avr/t-avr (LIB1ASMFUNCS): Add _fractsfsq _fractsfusq,
_divqq_helper.
* config/avr/lib1funcs-fixed.S (__fractqqsf, __fracthqsf)
(__fractsasf, __fractsfha, __fractusqsf, __fractsfsa)
(__mulha3, __mulsa3)
(__divqq3, __divha3, __divsa3): Adjust to new position of
decimal point of signed accum types.
(__mulusa3_round): New function.
(__mulusa3): Use it.
(__divqq_helper): New function.
(__udivuqq3): Use it.
gcc/
Adjust decimal point of signed accum mode to GCC default.
PR target/54222
* config/avr/avr-modes.def (HA, SA, DA): Remove mode adjustments.
(TA): Move decimal point one bit to the right.
* config/avr/avr.c (avr_out_fract): Rewrite.
From-SVN: r193721
