* gcc-changelog/git_check_commit.py: New file.
* gcc-changelog/git_commit.py: New file.
* gcc-changelog/git_email.py: New file.
* gcc-changelog/git_repository.py: New file.
* gcc-changelog/git_update_version.py: New file.
The following testcase fails with -fcompare-debug, the bug used to be latent
since introduction of -fcompare-debug.
The loop at the start of purge_dead_edges behaves differently between -g0
and -g - if the last insn is a DEBUG_INSN, then it skips not just
DEBUG_INSNs but also NOTEs until it finds some other real insn (or bb head),
while with -g0 it will not skip any NOTEs, so if we have
real_insn
note
debug_insn // not present with -g0
then with -g it might remove useless REG_EH_REGION from real_insn, while
with -g0 it will not.
Yet another option would be not skipping NOTE_P in the loop; I couldn't find
in history rationale for why it is done.
2020-05-13 Jakub Jelinek <jakub@redhat.com>
PR debug/95080
* cfgrtl.c (purge_dead_edges): Skip over debug and note insns even
if the last insn is a note.
* g++.dg/opt/pr95080.C: New test.
match.pd already has simplifications for negation of a FMA (FMS, FNMA, FNMS)
call if it is single use, but when the widening_mul pass discovers FMAs,
nothing folds the statements anymore.
So, the following patch adjusts the widening_mul pass to handle that.
I had to adjust quite a lot of tests, because they have in them nested FMAs
(one FMA feeding another one) and the patch results in some (equivalent) changes
in the chosen instructions, previously the negation of one FMA's result
would result in the dependent FMA being adjusted for the negation, but now
instead the first FMA is adjusted.
2020-05-13 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/95060
* tree-ssa-math-opts.c (convert_mult_to_fma_1): Fold a NEGATE_EXPR
if it is the single use of the FMA internal builtin.
* gcc.target/i386/avx512f-pr95060.c: New test.
* gcc.target/i386/fma_double_1.c: Adjust expected insn counts.
* gcc.target/i386/fma_double_2.c: Likewise.
* gcc.target/i386/fma_double_3.c: Likewise.
* gcc.target/i386/fma_double_4.c: Likewise.
* gcc.target/i386/fma_double_5.c: Likewise.
* gcc.target/i386/fma_double_6.c: Likewise.
* gcc.target/i386/fma_float_1.c: Likewise.
* gcc.target/i386/fma_float_2.c: Likewise.
* gcc.target/i386/fma_float_3.c: Likewise.
* gcc.target/i386/fma_float_4.c: Likewise.
* gcc.target/i386/fma_float_5.c: Likewise.
* gcc.target/i386/fma_float_6.c: Likewise.
* gcc.target/i386/l_fma_double_1.c: Likewise.
* gcc.target/i386/l_fma_double_2.c: Likewise.
* gcc.target/i386/l_fma_double_3.c: Likewise.
* gcc.target/i386/l_fma_double_4.c: Likewise.
* gcc.target/i386/l_fma_double_5.c: Likewise.
* gcc.target/i386/l_fma_double_6.c: Likewise.
* gcc.target/i386/l_fma_float_1.c: Likewise.
* gcc.target/i386/l_fma_float_2.c: Likewise.
* gcc.target/i386/l_fma_float_3.c: Likewise.
* gcc.target/i386/l_fma_float_4.c: Likewise.
* gcc.target/i386/l_fma_float_5.c: Likewise.
* gcc.target/i386/l_fma_float_6.c: Likewise.
Vxworks 7's malloc, like Solaris', only ensures 8-byte alignment of
returned pointers on 32-bit x86, though GCC's stddef.h defines
max_align_t with 16-byte alignment for __float128. This patch enables
on x86-vxworks the same memory_resource workaround used for x86-solaris.
The testsuite also had a workaround, defining BAD_MAX_ALIGN_T and
xfailing the test; extend those to x86-vxworks as well, and remove the
check for char-aligned requested allocation to be aligned like
max_align_t. With that change, the test passes on x86-vxworks; I'm
guessing that's the same reason for the test not to pass on
x86-solaris (and on x86_64-solaris -m32), so with the fix, I'm
tentatively removing the xfail.
for libstdc++-v3/ChangeLog
PR libstdc++/77691
* include/experimental/memory_resource
(__resource_adaptor_imp::do_allocate): Handle max_align_t on
x86-vxworks as on x86-solaris.
(__resource_adaptor_imp::do_deallocate): Likewise.
* testsuite/experimental/memory_resource/new_delete_resource.cc:
Drop xfail.
(BAD_MAX_ALIGN_T): Define on x86-vxworks as on x86-solaris.
(test03): Drop max-align test for char-aligned alloc.
Current data dependence analysis misses unit distant vector if DRs in
DDR have the same invariant access functions. This adds the vector as
the constant access function case.
2020-05-13 Bin Cheng <bin.cheng@linux.alibaba.com>
PR tree-optimization/94969
gcc/
* tree-data-dependence.c (constant_access_functions): Rename to...
(invariant_access_functions): ...this. Add parameter. Check for
invariant access function, rather than constant.
(build_classic_dist_vector): Call above function.
* tree-loop-distribution.c (pg_add_dependence_edges): Add comment.
gcc/testsuite/
* gcc.dg/tree-ssa/pr94969.c: New test.
Documents operand modifiers which are available in asm stmt but missing in document.
| Modifier | Description | Available in asm stmt | Existed in documentation |
| --- | --- | ------- | ----- |
| L,W,B,Q,S,T | print the opcode suffix for specified size of operand. | Available | Not |
| C | print opcode suffix for set/cmov insn. | Not | - |
| c | like C, but print reversed condition | Not | - |
| F,f | likewise, but for floating-point. | Not | - |
| O | if HAVE_AS_IX86_CMOV_SUN_SYNTAX, expand to "w.", "l." or "q.", otherwise nothing | Not | - |
| R | print embedded rounding and sae. | Available | Not |
| r | print only sae. | Available | Not |
| z | print the opcode suffix for the size of the current operand. | Available | Existed |
| Z | likewise, with special suffixes for x87 instructions. | Availble | Not |
| * | print a star (in certain assembler syntax) | Not | - |
| A | print an absolute memory reference. | Available | Existed |
| E | print address with DImode register names if TARGET_64BIT. | Available | Existed |
| w | print the operand as if it's a "word" (HImode) even if it isn't. | Available | Existed |
| s | print a shift double count, followed by the assemblers argument delimiter. | Available | Not |
| b | print the QImode name of the register for the indicated operand %b0 would print %al if operands[0] is reg 0. | Available | Existed |
| w | likewise, print the HImode name of the register. | Available | Existed |
| k | likewise, print the SImode name of the register. | Available | Existed |
| q | likewise, print the DImode name of the register. | Available | Existed |
| x | likewise, print the V4SFmode name of the register. | Available | Not |
| t | likewise, print the V8SFmode name of the register. | Available | Not |
| g | likewise, print the V16SFmode name of the register. | Avaliable | Not |
| h | print the QImode name for a "high" register, either ah, bh, ch or dh. | Available | Existed |
| y | print "st(0)" instead of "st" as a register. | Available | Not |
| d | print duplicated register operand for AVX instruction. | Available | Not |
| D | print condition for SSE cmp instruction. | Not | - |
| P | if PIC, print an @PLT suffix. | Available | Existed |
| p | print raw symbol name. | Available | Existed |
| X | don't print any sort of PIC '@' suffix for a symbol. | Not | - |
| & | print some in-use local-dynamic symbol name. | Not | - |
| H | print a memory address offset by 8; used for sse high-parts | Available | Existed |
| Y | print condition for XOP pcom* instruction. | Not | - |
| V | print naked full integer register name without %. | Available | Existed |
| + | print a branch hint as 'cs' or 'ds' prefix | Not | - |
| ; | print a semicolon (after prefixes due to bug in older gas). | Not | - |
| ~ | print "i" if TARGET_AVX2, "f" otherwise. | Not | - |
| ^ | print addr32 prefix if TARGET_64BIT and Pmode != word_mode | Not | - |
| M | print addr32 prefix for TARGET_X32 with VSIB address. | Not | - |
| ! | print NOTRACK prefix for jxx/call/ret instructions if required. | Not | - |
| N | print maskz if it's constant 0 operand. | Available | Not |
| I | print comparision predicate operand for sse cmp condition. | Not | - |
gcc/ChangeLog
PR target/94118
* doc/extend.texi (x86Operandmodifiers): Document more x86
operand modifier.
* gcc/config/i386/i386.c: Add comment for operand modifier N
and I.
Modified-by: liuhongt <hongtao.liu@intel.com>
Refactor tree-vrp.c to eliminate all global variables except
'x_vrp_values', which will require that 'thread_outgoing_edges'
to accept an extra argument and pass it to the 'simplify' callback.
It also removes every access to 'cfun', retrieving the function being
compiled from the pass engine.
gcc/ChangeLog
2020-05-12 Giuliano Belinassi <giuliano.belinassi@usp.br>
* tree-vrp.c (class vrp_insert): New.
(insert_range_assertions): Move to class vrp_insert.
(dump_all_asserts): Same as above.
(dump_asserts_for): Same as above.
(live): Same as above.
(need_assert_for): Same as above.
(live_on_edge): Same as above.
(finish_register_edge_assert_for): Same as above.
(find_switch_asserts): Same as above.
(find_assert_locations): Same as above.
(find_assert_locations_1): Same as above.
(find_conditional_asserts): Same as above.
(process_assert_insertions): Same as above.
(register_new_assert_for): Same as above.
(vrp_prop): New variable fun.
(vrp_initialize): New parameter.
(identify_jump_threads): Same as above.
(execute_vrp): Same as above.
default_unique_section uses ".sdata2" as a prefix for SECCAT_SRODATA
unique sections, but RISC-V uses ".srodata" instead. Override the
TARGET_ASM_UNIQUE_SECTION function to catch this case, allowing the
default to be used for all other sections.
Signed-off-by: Keith Packard <keithp@keithp.com>
gcc/
* config/riscv/riscv.c (riscv_unique_section): New.
(TARGET_ASM_UNIQUE_SECTION): New.
gcc/
* config.gcc: Add riscv-shorten-memrefs.o to extra_objs for riscv.
* config/riscv/riscv-passes.def: New file.
* config/riscv/riscv-protos.h (make_pass_shorten_memrefs): Declare.
* config/riscv/riscv-shorten-memrefs.c: New file.
* config/riscv/riscv.c (tree-pass.h): New include.
(riscv_compressed_reg_p): New Function
(riscv_compressed_lw_offset_p): Likewise.
(riscv_compressed_lw_address_p): Likewise.
(riscv_shorten_lw_offset): Likewise.
(riscv_legitimize_address): Attempt to convert base + large_offset
to compressible new_base + small_offset.
(riscv_address_cost): Make anticipated compressed load/stores
cheaper for code size than uncompressed load/stores.
(riscv_register_priority): Move compressed register check to
riscv_compressed_reg_p.
* config/riscv/riscv.h (C_S_BITS): Define.
(CSW_MAX_OFFSET): Define.
* config/riscv/riscv.opt (mshorten-memefs): New option.
* config/riscv/t-riscv (riscv-shorten-memrefs.o): New rule.
(PASSES_EXTRA): Add riscv-passes.def.
* doc/invoke.texi: Document -mshorten-memrefs.
* config/riscv/riscv.c (riscv_new_address_profitable_p): New function.
(TARGET_NEW_ADDRESS_PROFITABLE_P): Define.
* doc/tm.texi: Regenerate.
* doc/tm.texi.in (TARGET_NEW_ADDRESS_PROFITABLE_P): New hook.
* sched-deps.c (attempt_change): Use old address if it is cheaper than
new address.
* target.def (new_address_profitable_p): New hook.
* targhooks.c (default_new_address_profitable_p): New function.
* targhooks.h (default_new_address_profitable_p): Declare.
gcc/testsuite/
* gcc.target/riscv/shorten-memrefs-1.c: New test.
* gcc.target/riscv/shorten-memrefs-2.c: New test.
* gcc.target/riscv/shorten-memrefs-3.c: New test.
* gcc.target/riscv/shorten-memrefs-4.c: New test.
* gcc.target/riscv/shorten-memrefs-5.c: New test.
* gcc.target/riscv/shorten-memrefs-6.c: New test.
* gcc.target/riscv/shorten-memrefs-7.c: New test.
The C/C++ bindings generated by means of -fdump-ada-spec always contain
with and use clauses for Interfaces.C, but they can be unused in some
cases so make sure to avoid warning about that.
* c-ada-spec.c (dump_ads): Output pragma Warnings ("U"); on entry.
My recent C++ parser change to pay attention to EOF location uncovered
a separate bug. The preprocesor's EOF logic would set the EOF
location to be the beginning of the last line of text in the file --
not the 'line' after that, which contains no characters. Mostly.
This fixes things so that when we attempt to read the last line of the
main file, we don't pop the buffer until the tokenizer has a chance to
create an EOF token with the correct location information. It is then
responsible for popping the buffer. As it happens, raw string literal
tokenizing contained a bug -- it would increment the line number
prematurely, because it cached buffer->cur in a local variable, but
checked buffer->cur before updating it to figure out if it was at end
of file. We fix up that too.
The EOF token intentionally doesn't have a column number -- it's not a
position on a line, it's a non-existant line.
The testsuite churn is just correcting the EOF location diagnostics.
libcpp/
PR preprocessor/95013
* lex.c (lex_raw_string): Process line notes before incrementing.
Correct incrementing condition. Adjust for new
_cpp_get_fresh_line EOF behaviour.
(_cpp_get_fresh_line): Do not pop buffer at EOF, increment line
instead.
(_cpp_lex_direct): Adjust for new _cpp_get_fresh_line behaviour.
(cpp_directive_only_process): Assert we got a fresh line.
* traditional.c (_cpp_read_logical_line_trad): Adjust for new
_cpp_get_fresh_line behaviour.
gcc/testsuite/
* c-c++-common/goacc/pr79428-1.c: Adjust EOF diagnostic location.
* c-c++-common/gomp/pr79428-2.c: Likewise.
* g++.dg/cpp0x/decltype63.C: Likewise.
* g++.dg/cpp0x/gen-attrs-64.C: Likewise.
* g++.dg/cpp0x/pr68726.C: Likewise.
* g++.dg/cpp0x/pr78341.C: Likewise.
* g++.dg/cpp1y/pr65202.C: Likewise.
* g++.dg/cpp1y/pr65340.C: Likewise.
* g++.dg/cpp1y/pr68578.C: Likewise.
* g++.dg/cpp1z/class-deduction44.C: Likewise.
* g++.dg/diagnostic/unclosed-extern-c.C: Likewise.
* g++.dg/diagnostic/unclosed-function.C: Likewise.
* g++.dg/diagnostic/unclosed-namespace.C: Likewise.
* g++.dg/diagnostic/unclosed-struct.C: Likewise.
* g++.dg/ext/pr84598.C: Likewise.
* g++.dg/other/switch4.C: Likewise.
* g++.dg/parse/attr4.C: Likewise.
* g++.dg/parse/cond4.C: Likewise.
* g++.dg/parse/crash10.C: Likewise.
* g++.dg/parse/crash18.C: Likewise.
* g++.dg/parse/crash27.C: Likewise.
* g++.dg/parse/crash34.C: Likewise.
* g++.dg/parse/crash35.C: Likewise.
* g++.dg/parse/crash52.C: Likewise.
* g++.dg/parse/crash59.C: Likewise.
* g++.dg/parse/crash61.C: Likewise.
* g++.dg/parse/crash67.C: Likewise.
* g++.dg/parse/error14.C: Likewise.
* g++.dg/parse/error56.C: Likewise.
* g++.dg/parse/invalid1.C: Likewise.
* g++.dg/parse/parameter-declaration-1.C: Likewise.
* g++.dg/parse/parser-pr28152-2.C: Likewise.
* g++.dg/parse/parser-pr28152.C: Likewise.
* g++.dg/parse/pr68722.C: Likewise.
* g++.dg/pr46852.C: Likewise.
* g++.dg/pr46868.C: Likewise.
* g++.dg/template/crash115.C: Likewise.
* g++.dg/template/crash43.C: Likewise.
* g++.dg/template/crash90.C: Likewise.
* g++.dg/template/error-recovery1.C: Likewise.
* g++.dg/template/error57.C: Likewise.
* g++.old-deja/g++.other/crash31.C: Likewise.
* gcc.dg/empty-source-2.c: Likewise.
* gcc.dg/empty-source-3.c: Likewise.
* gcc.dg/noncompile/pr30552-3.c: Likewise.
* gcc.dg/noncompile/pr35447-1.c: Likewise.
* gcc.dg/pr20245-1.c: Likewise.
* gcc.dg/pr28419.c: Likewise.
* gcc.dg/rtl/truncated-rtl-file.c: Likewise.
* gcc.dg/unclosed-init.c: Likewise.
* obj-c++.dg/property/property-neg-6.mm: Likewise.
* obj-c++.dg/syntax-error-10.mm: Likewise.
* obj-c++.dg/syntax-error-8.mm: Likewise.
* obj-c++.dg/syntax-error-9.mm: Likewise.
This makes sure that gigi is prepared to handle more aggregates in the
special memset code path.
* sem_aggr.ads (Is_Single_Aggregate): New function.
* sem_aggr.adb (Is_Others_Aggregate): Use local variable.
(Is_Single_Aggregate): New function to recognize an aggregate with
a single association containing a single choice.
* fe.h (Is_Others_Aggregate): Delete.
(Is_Single_Aggregate): New declaration.
* gcc-interface/trans.c (gnat_to_gnu) <N_Assignment_Statement>: Call
Is_Single_Aggregate instead of Is_Others_Aggregate.
I noticed that we don't implement [basic.lookup.argdep]/3: quite correctly;
it says "If X (the lookup set produced by unqualified lookup) contains
-- a block-scope function declaration that is not a using-declaration
[...]
then Y (the lookup set produced by ADL) is empty."
but we were still performing ADL in fn1 in the attached test. The
problem was that we were only looking at the first function in the
overload set which in this case happened to be a using-declaration, and
those don't suppress ADL. We have to look through the whole set to find
out if unqualified lookup found a block-scope function declaration, or
a member function declaration.
PR c++/95074
* parser.c (cp_parser_postfix_expression) <case CPP_OPEN_PAREN>: When
looking for a block-scope function declaration, look through the whole
set, not just the first function in the overload set.
* g++.dg/lookup/koenig15.C: New test.
asan.exp adds -fsanitize=address which is incompatible with -fsanitize=kernel-address,
so we need to disable it first.
2020-05-12 Jakub Jelinek <jakub@redhat.com>
PR sanitizer/95051
* gcc.dg/asan/pr95051.c: Add -fno-sanitize=all to dg-options.
I discovered that libitm:
(a) declares __cxa_allocate_exception and friends directly,
(b) doesn't mark them as 'throw()'
(c) doesn't mark the replacment fns _ITM_$foo as nothrow either
We happen to get away with it because of code in the compiler that,
although it checks the parameter types, doesn't check the exception
specification. (One reason being they used to not be part of the
language's type system, but now they are.) I suspect this can lead us
to generate pessimal code later, if we've seen one of these decls
earlier. Anyway, with modules it becomes trickier[*], so I'm trying
to clean it up and not be a problem. I see Jakub fixed part of the
problem
(https://gcc.gnu.org/pipermail/gcc-patches/2018-December/513302.html)
AFAICT, he did fix libitm's decls, but left the lax parm-type checking
in the compiler.
libitm.h is not very informative about specification:
in version 1 of http://www.intel.com/some/path/here.pdf. */
Anyway, it was too fiddly to have libitm pick up the declarations from
libsupc++. Besides it makes them weak declarations, and then provides
definitions for non-elf systems. So this patch adds the expected
'throw()'
* libitm/libitm.h (_ITM_NOTHROW): Define.
(_ITM_cxa_allocate_exception, _ITM_cxa_free_exception)
(_ITM_cxa_begin_catch): Use it.
* eh_cpp.cc: Add throw() to __cxa_allocate_exception,
__cxa_free_exception, __cxa_begin_catch, __cxa_tm_cleanup,
__cxa_get_globals.
(_ITM_cxa_allocate_exception, _ITM_cxa_free_exception)
(_ITM_cxa_begin_catch): Likewise.
Don't perform CET run-time check for host when cross compiling. Instead,
enable CET in cross compiler if possible so that it will run on both CET
and non-CET hosts.
config/
PR bootstrap/94998
* cet.m4 (GCC_CET_HOST_FLAGS): Enable CET in cross compiler if
possible.
libiberty/
PR bootstrap/94998
* configure: Regenerated.
lto-plugin/
PR bootstrap/94998
* configure: Regenerated.
This adds an abbreviated function template version of the testcase in
PR78752, which seems to already be fixed.
gcc/testsuite/ChangeLog:
PR c++/78752
* g++.dg/cpp2a/concepts-pr78752-2.C: New test.
When --enable-cet is used to configure GCC, enable Intel CET in target
zlib.
* Makefile.am (AM_CFLAGS): New.
* configure.ac (CET_FLAGS): Add GCC_CET_FLAGS and AC_SUBST.
* Makefile.in: Regenerated.
* aclocal.m4: Likewise.
* configure.ac: Likewise.
Since on Intel CET enabled host, dlopen in Intel CET enabled applications
fails on shared libraries which aren't Intel CET enabled, compile with
-fcf-protection on Intel CET enabled host when jit is enabled to enable
Intel CET on libgccjit.
* Makefile.am (AM_CFLAGS): Add $(CET_HOST_FLAGS).
* configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
AC_SUBST(CET_HOST_FLAGS). Clear CET_HOST_FLAGS if jit isn't
enabled.
* Makefile.in: Regenerated.
* configure: Likewise.
Since on Intel CET enabled host, dlopen in Intel CET enabled applications
fails on shared libraries which aren't Intel CET enabled, compile with
-fcf-protection on Intel CET enabled host when jit is enabled to enable
Intel CET on libgccjit.
* Makefile.in (CET_HOST_FLAGS): New.
(COMPILER): Add $(CET_HOST_FLAGS).
* configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
AC_SUBST(CET_HOST_FLAGS). Clear CET_HOST_FLAGS if jit isn't
enabled.
* aclocal.m4: Regenerated.
* configure: Likewise.
Since on Intel CET enabled host, dlopen in Intel CET enabled applications
fails on shared libraries which aren't Intel CET enabled, compile with
-fcf-protection on Intel CET enabled host when jit is enabled to enable
Intel CET on libgccjit.
* Makefile.in (CET_HOST_FLAGS): New.
(COMPILER): Add $(CET_HOST_FLAGS).
* configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
AC_SUBST(CET_HOST_FLAGS). Clear CET_HOST_FLAGS if jit isn't
enabled.
* aclocal.m4: Regenerated.
* configure: Likewise.
Since on Intel CET enabled host, dlopen in Intel CET enabled applications
fails on shared libraries which aren't Intel CET enabled, compile with
-fcf-protection on Intel CET enabled host when jit is enabled to enable
Intel CET on libgccjit.
* Makefile.in (CET_HOST_FLAGS): New.
(COMPILER): Add $(CET_HOST_FLAGS).
* configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
AC_SUBST(CET_HOST_FLAGS). Clear CET_HOST_FLAGS if jit isn't
enabled.
* aclocal.m4: Regenerated.
* configure: Likewise.
Since on Intel CET enabled host, dlopen in Intel CET enabled applications
fails on shared libraries which aren't Intel CET enabled, enable Intel
CET in libcc1 on Intel CET enabled host.
* Makefile.am (AM_CXXFLAGS): Add $(CET_HOST_FLAGS).
* configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
AC_SUBST(CET_HOST_FLAGS).
* Makefile.in: Regenerated.
* aclocal.m4: Likewise.
* configure: Likewise.
This removes debug-bind resets aka
# DEBUG b = NULL
when the reset variable is otherwise unused. I've gathered statistics
for a single TU, fold-const.ii which at -O2 -g shows
28 ssa "dead debug bind reset" 1
34 einline "dead debug bind reset" 340
54 release_ssa "dead debug bind reset" 176
54 release_ssa "live debug bind reset of dead var" 4
86 inline "dead debug bind reset" 5131
86 inline "live debug bind reset of dead var" 61
241 optimized "dead debug bind reset" 970
241 optimized "live debug bind reset of dead var" 287
where "live debug bind reset of dead var" means the variable is unused
but there were debug binds with a value for them and
"dead debug bind reset" means the variable is unused and there were
only debug bind resets (each reset of the same variable is counted
for both counters). This shows A considerable amount of dead stmts
removed esp. after IPA inlining.
2020-05-12 Richard Biener <rguenther@suse.de>
* tree-ssa-live.c (remove_unused_locals): Remove dead debug
bind resets.
The testcase only works for little-endian, mark it so.
2020-05-12 Richard Biener <rguenther@suse.de>
PR middle-end/94988
* gcc.dg/torture/pr94988.c: Disable runtime test for
* non-little-endian.
gcc/ChangeLog:
2020-05-12 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* config/msp430/msp430-protos.h (msp430_output_aligned_decl_common):
Update prototype to include "local" argument.
* config/msp430/msp430.c (msp430_output_aligned_decl_common): Add
"local" argument. Handle local common decls.
* config/msp430/msp430.h (ASM_OUTPUT_ALIGNED_DECL_COMMON): Adjust
msp430_output_aligned_decl_common call with 0 for "local" argument.
(ASM_OUTPUT_ALIGNED_DECL_LOCAL): Define.
gcc/testsuite/ChangeLog:
2020-05-12 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* gcc.c-torture/execute/noinit-attribute.c: Skip for msp430
in the large memory model.
This fixes an oversight in the new canonicalization code for packable
types: it does not take into account the scalar storage order.
PR ada/95035
* gcc-interface/utils.c (packable_type_hasher::equal): Also compare
the scalar storage order.
(hash_packable_type): Also hash the scalar storage order.
(hash_pad_type): Likewise.
This moves EDGE_DFS_BACK to the appropriate edge when the split
edge had it set.
2020-05-12 Richard Biener <rguenther@suse.de>
* cfghooks.c (split_edge): Preserve EDGE_DFS_BACK if set.
The r11-15 change broke this testcase, as it now asserts type is equal to
the type of the DECL_VALUE_EXPR, but for DECL_OMP_PRIVATIZED_MEMBER artificial
vars mapping to bitfields it wasn't. Fixed by changing the
DECL_OMP_PRIVATIZED_MEMBER var type in that case.
2020-05-12 Jakub Jelinek <jakub@redhat.com>
PR c++/95063
* pt.c (tsubst_decl): Deal with DECL_OMP_PRIVATIZED_MEMBER for
a bit-field.
* g++.dg/gomp/pr95063.C: New test.
This third patch of three actually fixes the PR. We were using
8-bit BIT_FIELD_REFs to access single-bit elements, and multiplying
the vector index by 8 bits rather than 1 bit.
2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
gcc/
PR tree-optimization/94980
* tree-vect-generic.c (expand_vector_comparison): Use
vector_element_bits_tree to get the element size in bits,
rather than using TYPE_SIZE.
(expand_vector_condition, vector_element): Likewise.
gcc/testsuite/
PR tree-optimization/94980
* gcc.target/i386/pr94980.c: New test.
This patch makes build_replicated_const take the number of bits
in VALUE rather than calculating the width from the element type.
The callers can then use vector_element_bits to calculate the
correct element size from the vector type.
2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
gcc/
PR tree-optimization/94980
* tree-vect-generic.c (build_replicated_const): Take the number
of bits as a parameter, instead of the type of the elements.
(do_plus_minus): Update accordingly, using vector_element_bits
to calculate the correct number of bits.
(do_negate): Likewise.
A lot of code that wants to know the number of bits in a vector
element gets that information from the element's TYPE_SIZE,
which is always equal to TYPE_SIZE_UNIT * BITS_PER_UNIT.
This doesn't work for SVE and AVX512-style packed boolean vectors,
where several elements can occupy a single byte.
This patch introduces a new pair of helpers for getting the true
(possibly sub-byte) size. I made a token attempt to convert obvious
element size calculations, but I'm sure I missed some.
2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
gcc/
PR tree-optimization/94980
* tree.h (vector_element_bits, vector_element_bits_tree): Declare.
* tree.c (vector_element_bits, vector_element_bits_tree): New.
* match.pd: Use the new functions instead of determining the
vector element size directly from TYPE_SIZE(_UNIT).
* tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise.
* tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
* tree-vect-stmts.c (vect_is_simple_cond): Likewise.
* tree-vect-generic.c (expand_vector_piecewise): Likewise.
(expand_vector_conversion): Likewise.
(expand_vector_addition): Likewise for a TYPE_SIZE_UNIT used as
a divisor. Convert the dividend to bits to compensate.
* tree-vect-loop.c (vectorizable_live_operation): Call
vector_element_bits instead of open-coding it.
This attempts to implement what the OpenMP 5.0 spec in declare target section
says as ammended by the 5.1 changes so far (related to device_type(host)), except
that it doesn't have the device(ancestor: ...) handling yet because we do not
support it yet, and I've left so far out the except lambda note, because I need
that clarified.
2020-05-12 Jakub Jelinek <jakub@redhat.com>
* omp-offload.h (omp_discover_implicit_declare_target): Declare.
* omp-offload.c: Include context.h.
(omp_declare_target_fn_p, omp_declare_target_var_p,
omp_discover_declare_target_fn_r, omp_discover_declare_target_var_r,
omp_discover_implicit_declare_target): New functions.
* cgraphunit.c (analyze_functions): Call
omp_discover_implicit_declare_target.
* testsuite/libgomp.c/target-39.c: New test.
This canonicalizes those to a constant literal.
2020-05-12 Richard Biener <rguenther@suse.de>
* gimple-fold.c (maybe_canonicalize_mem_ref_addr): Canonicalize
literal constant &MEM[..] to a constant literal.
Since we apply SM to an edge which exits multiple loops we have
to make sure to commit insertions on it immediately since otherwise
store order is not preserved.
2020-05-12 Richard Biener <rguenther@suse.de>
PR tree-optimization/95045
* dbgcnt.def (lim): Add debug-counter.
* tree-ssa-loop-im.c: Include dbgcnt.h.
(find_refs_for_sm): Use lim debug counter for store motion
candidates.
(do_store_motion): Rename form store_motion. Commit edge
insertions...
(store_motion_loop): ... here.
(tree_ssa_lim): Adjust.
* include/bits/atomic_base.h (atomic_flag): Implement test member
function.
* include/std/version: Define __cpp_lib_atomic_flag_test.
* testsuite/29_atomics/atomic_flag/test/explicit.cc: New file.
* testsuite/29_atomics/atomic_flag/test/implicit.cc: New file.
