We unnecessarily align data to 8 byte alignments even when -Os is
specified. This brings the logic in the AArch64 backend more in line
with the ARM backend and helps gain some image size in a few
places. Caught by an internal report on the size of rodata sections
being high with aarch64 gcc.
* config/aarch64/aarch64.h (AARCH64_EXPAND_ALIGNMENT): New.
(DATA_ALIGNMENT): Update to use AARCH64_EXPAND_ALIGNMENT.
(LOCAL_ALIGNMENT): Update to use AARCH64_EXPAND_ALIGNMENT.
Bootstrapped and regression tested on aarch64-none-linux-gnu with no
regressions.
From-SVN: r249764
Current multiarch directory name is always *-linux-gnu* on linux,
this patch configures different names for uclibc and musl targets.
2017-06-28 Szabolcs Nagy <szabolcs.nagy@arm.com>
* config.gcc (*-linux-musl*): Add t-musl tmake_file.
(*-linux-uclibc*): Add t-uclibc tmake_file.
* config/t-musl: New.
* config/t-uclibc: New.
From-SVN: r249745
Conditions checked for ARM targets in vector-related effective targets
are inconsistent:
* sometimes arm*-*-* is checked
* sometimes Neon is checked
* sometimes arm_neon_ok and sometimes arm_neon is used for neon check
* sometimes check_effective_target_* is used, sometimes
* is-effective-target
This patch consolidate all of these check into using is-effective-target
arm_neon and when little endian was checked, the check is kept.
2017-06-28 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/testsuite/
* lib/target-supports.exp (check_effective_target_vect_int): Replace
current ARM check by ARM NEON's availability check.
(check_effective_target_vect_intfloat_cvt): Likewise.
(check_effective_target_vect_uintfloat_cvt): Likewise.
(check_effective_target_vect_floatint_cvt): Likewise.
(check_effective_target_vect_floatuint_cvt): Likewise.
(check_effective_target_vect_shift): Likewise.
(check_effective_target_whole_vector_shift): Likewise.
(check_effective_target_vect_bswap): Likewise.
(check_effective_target_vect_shift_char): Likewise.
(check_effective_target_vect_long): Likewise.
(check_effective_target_vect_float): Likewise.
(check_effective_target_vect_perm): Likewise.
(check_effective_target_vect_perm_byte): Likewise.
(check_effective_target_vect_perm_short): Likewise.
(check_effective_target_vect_widen_sum_hi_to_si_pattern): Likewise.
(check_effective_target_vect_widen_sum_qi_to_hi): Likewise.
(check_effective_target_vect_widen_mult_qi_to_hi): Likewise.
(check_effective_target_vect_widen_mult_hi_to_si): Likewise.
(check_effective_target_vect_widen_mult_qi_to_hi_pattern): Likewise.
(check_effective_target_vect_widen_mult_hi_to_si_pattern): Likewise.
(check_effective_target_vect_widen_shift): Likewise.
(check_effective_target_vect_extract_even_odd): Likewise.
(check_effective_target_vect_interleave): Likewise.
(check_effective_target_vect_multiple_sizes): Likewise.
(check_effective_target_vect64): Likewise.
(check_effective_target_vect_max_reduc): Likewise.
From-SVN: r249744
ACLE explicitly states that when targetting the common subset of
ARMv7-A, ARMv7-R and ARMv7-M, the __ARM_ARCH_PROFILE macro should not
be set. We currently set it to 'M' which is clearly erroneous.
The logic for creating this is very convoluted and also somewhat
fragile, so I've taken the opportunity to use the new CPU and
architecture definition infrastructure to record the profile for each
architecture explicitly rather than try to reconstruct it from other
data. I think this results in a much more robust solution.
2017-06-28 Richard Earnshaw <rearnsha@arm.com>
* config/arm/parsecpu.awk (profile): Parse new keyword in an arch
context.
(gen_comm_data): Emit architectural setting of arch_prof.
* config/arm/arm-cpus.in (armv6-m, armv6s-m, armv7-a, armv7ve): Set the
profile.
(armv7-r, armv7-m, armv7e-m, armv8-a, armv8.1-a, armv8.2-a): Likewise.
(armv8-m.base, armv8-m.main): Likewise.
* arm-protos.h (arm_build_target): Add profile field.
(arch_option): Likewise.
* config/arm/arm.c (arm_configure_build_target): Copy the profile to
the active target.
* config/arm/arm.h (TARGET_ARM_ARCH_PROFILE): Use
arm_active_target.profile.
From-SVN: r249743
2017-06-28 Richard Biener <rguenther@suse.de>
PR middle-end/81227
* fold-const.c (negate_expr_p): Use TYPE_UNSIGNED, not
TYPE_OVERFLOW_WRAPS.
* match.pd (negate_expr_p): Likewise.
* tree-ssa-reassoc.c (optimize_range_tests_diff): Use
fold_build2, not fold_binary.
* gcc.dg/pr81227.c: New testcase.
From-SVN: r249742
This patch fixes a failure in gcc.target/aarch64/reload-valid-spoff.c
triggered by https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01367.html.
In ILP32 all memory accesses must have Pmode as the base address, but
aarch64_expand_mov_immediate wasn't emitting a conversion in one case.
Besides fixing this add an assert that flags any MEM operands that are
not Pmode.
gcc/
* config/aarch64/aarch64 (aarch64_expand_mov_immediate):
Convert memory address to Pmode.
(aarch64_print_operand): Assert MEM operands are always Pmode.
From-SVN: r249741
The aarch_forward_to_shift_is_not_shifted_reg bypass always returns true
on AArch64 shifted instructions. This causes the bypass to activate in
too many cases, resulting in slower execution on Cortex-A53 like reported
in PR79665.
This patch uses the arm_no_early_alu_shift_dep condition instead which
improves the example in PR79665 by ~7%. Given it is no longer used,
remove aarch_forward_to_shift_is_not_shifted_reg. Also remove an
unnecessary REG_P check.
gcc/
PR target/79665
* config/arm/aarch-common.c (arm_no_early_alu_shift_dep):
Remove redundant if.
(aarch_forward_to_shift_is_not_shifted_reg): Remove.
* config/arm/aarch-common-protos.h
(aarch_forward_to_shift_is_not_shifted_re): Remove.
* config/arm/cortex-a53.md: Use arm_no_early_alu_shift_dep in bypass.
From-SVN: r249740
[gcc]
2017-06-28 Michael Meissner <meissner@linux.vnet.ibm.com>
PR ipa/81238
* multiple_target.c (create_dispatcher_calls): Set the default
clone to be static, not public.
[gcc/testsuite]
2017-06-28 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/81193
* lib/target-supports.exp
(check_ppc_cpu_supports_hw_available): New test to make sure
__builtin_cpu_supports works on power7 and newer.
From-SVN: r249737
2017-06-28 Martin Liska <mliska@suse.cz>
PR ipa/81128
* ipa-visibility.c (non_local_p): Handle visibility.
2017-06-28 Martin Liska <mliska@suse.cz>
PR ipa/81128
* c-attribs.c (handle_alias_ifunc_attribute): Append ifunc alias
to a function declaration.
2017-06-28 Martin Liska <mliska@suse.cz>
PR ipa/81128
* gcc.target/i386/pr81128.c: New test.
From-SVN: r249735
2017-06-28 Marc Glisse <marc.glisse@inria.fr>
gcc/
* match.pd ((X & ~Y) | (~X & Y)): Generalize to + and ^.
(x * C EQ/NE y * C): New transformation.
gcc/testsuite/
* gcc.dg/tree-ssa/addadd.c: Remove test duplicated in addadd-2.c.
* gcc.dg/tree-ssa/mulcmp-1.c: New file.
From-SVN: r249732
Current glibc no longer gives the ucontext_t type the tag struct
ucontext, to conform with POSIX namespace rules. This requires
various linux-unwind.h files in libgcc, that were previously using
struct ucontext, to be fixed to use ucontext_t instead. This is
similar to the removal of the struct siginfo tag from siginfo_t some
years ago.
This patch changes those files to use ucontext_t instead. As the
standard name that should be unconditionally safe, so this is not
restricted to architectures supported by glibc, or conditioned on the
glibc version.
Tested compilation together with current glibc with glibc's
build-many-glibcs.py.
* config/aarch64/linux-unwind.h (aarch64_fallback_frame_state),
config/alpha/linux-unwind.h (alpha_fallback_frame_state),
config/bfin/linux-unwind.h (bfin_fallback_frame_state),
config/i386/linux-unwind.h (x86_64_fallback_frame_state,
x86_fallback_frame_state), config/m68k/linux-unwind.h (struct
uw_ucontext), config/nios2/linux-unwind.h (struct nios2_ucontext),
config/pa/linux-unwind.h (pa32_fallback_frame_state),
config/riscv/linux-unwind.h (riscv_fallback_frame_state),
config/sh/linux-unwind.h (sh_fallback_frame_state),
config/tilepro/linux-unwind.h (tile_fallback_frame_state),
config/xtensa/linux-unwind.h (xtensa_fallback_frame_state): Use
ucontext_t instead of struct ucontext.
From-SVN: r249731
* gcc.target/i386/cmov7.c (sgn): Renamed to ...
(foo): ... this. Change constants such that it isn't matched
as __builtin_copysign, yet tests the combiner the same.
From-SVN: r249729
2017-06-28 Martin Liska <mliska@suse.cz>
PR sanitizer/81224
* asan.c (instrument_derefs): Bail out inner references
that are hard register variables.
2017-06-28 Martin Liska <mliska@suse.cz>
PR sanitizer/81224
* gcc.dg/asan/pr81224.c: New test.
From-SVN: r249728
PR target/81175
* config/i386/i386.c (ix86_init_mmx_sse_builtins): Use def_builtin
rather than def_builtin_pure for __builtin_ia32_gatherpf*.
From-SVN: r249727
2017-06-28 Michael Collison <michael.collison@arm.com>
PR target/68535
* config/arm/arm.c (gen_ldm_seq): Remove last unnecessary
set of base_reg
(arm_gen_movmemqi): Removed unused variable 'i'.
Convert 'for' loop into 'while' loop.
(arm_expand_prologue): Remove last unnecessary set of insn.
(thumb_pop): Remove unused variable 'pushed_words'.
(thumb_exit): Remove last unnecessary set of regs_to_pop.
From-SVN: r249721
For hotpatching it might be required to introduce new .text parts
while keep using the existing .data/.bss sections. To make this work
the backend needs to be prevented from using relative addressing
between code and data.
This only works when already building PIC
since the addressing will then be handling via GOT.
gcc/testsuite/ChangeLog:
2017-06-28 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/nodatarel-1.c: New test.
gcc/ChangeLog:
2017-06-28 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/predicates.md: Use s390_rel_address_ok_p.
* config/s390/s390-protos.h: Add prototype of
s390_rel_address_ok_p.
* config/s390/s390.c (s390_got_symbol): New function.
(s390_rel_address_ok_p): New function.
(legitimize_pic_address): Use s390_rel_address_ok_p.
(s390_load_got): Use s390_got_symbol.
(s390_option_override): Issue error if
-mno-pic-data-is-text-relative is used without -fpic/-fPIC.
* config/s390/s390.h (TARGET_DEFAULT_PIC_DATA_IS_TEXT_RELATIVE):
New macro.
* config/s390/s390.opt: New option mpic-data-is-text-relative.
From-SVN: r249720
2017-06-27 Jerry DeLisle <jvdelisle@gcc.gnu.org>
PR fortran/80164
* trans-stmt.c (gfc_trans_call): If no code expr, use code->loc
as warning/error locus.
* gfortran.dg/array_temporaries_4.f90: New test.
From-SVN: r249718
On AIX:
* mmap does not allow to map an already mapped range,
* mmap range start at 0x30000000 for 32 bits processes,
* mmap range start at 0x70000000_00000000 for 64 bits processes
This is adapted from change 37845.
Issue golang/go#19200
Reviewed-on: https://go-review.googlesource.com/46772
From-SVN: r249713
Fixes required now that we #include <linux/ptrace.h> in sysinfo.c.
Patch by Andreas Krebbel.
Reviewed-on: https://go-review.googlesource.com/46839
From-SVN: r249712
PR libstdc++/80187
* include/std/variant (variant::variant, variant::~variant,
variant::operator=): Implement triviality forwarding for four
special member functions.
* testsuite/20_util/variant/compile.cc: Tests.
From-SVN: r249706
genmultilib computes combination_space, a list of all combinations of
options in MULTILIB_OPTIONS that might have multilibs built for them
(some of which may end up not having multilibs built for them, and
some of those may end up being mapped to other multilibs with
MULTILIB_REUSE). It is then used to validate the right hand part of
MULTILIB_REUSE rules, checking with expr that combination_space
matches a basic regular expression derived from that right hand part.
There are two problems with this approach to validation:
* It requires that right hand part to have options in the same order
as in MULTILIB_OPTIONS, in contradiction to the documentation of
MULTILIB_REUSE saying that order does not matter there.
* combination_space can be so large that the expr call fails with an
E2BIG error. I have a local ARM configuration with 40 multilibs but
3840 combinations of options from MULTILIB_OPTIONS (so 3839 listed
in combination_space, since it doesn't list the default multilib)
and 996 MULTILIB_REUSE rules. This generates a combination_space
string longer than the Linux kernel's MAX_ARG_STRLEN (PAGE_SIZE *
32, the limit on the length of a single argv string), so that expr
cannot be run.
This patch changes the validation approach to generate a much shorter
extended regular expression for any sequence of multilib options in
any order, and uses that for the validation instead.
Tested with a build for arm-none-eabi --with-multilib-list=aprofile
(as a configuration that uses MULTILIB_REUSE).
* genmultilib (combination_space): Remove variable.
Validate reuse rules against regular expression for any sequence
of multilib options in any order.
From-SVN: r249703
* cp-tree.h (CLASSTYPE_DESTRUCTORS): Rename to ...
(CLASSTYPE_DESTRUCTOR): ... this.
* class.c (accessible_nvdtor_p)
maybe_warn_about_overly_private_class,
add_implicitly_declared_members,
clone_constructors_and_destructors, type_has_virtual_destructor):
Adjust for CLASSTYPE_DESTRUCTOR.
(deduce_noexcept_on_destructors): Absorb into ...
(check_bases_and_members): ... here.
* except.c (dtor_nothrow): Adjust for CLASSTYPE_DESTRUCTOR.
* init.c (build_delete): Likewise.
* parser.c (cp_parser_lookup_name): Likewise.
* pt.c (check_explicit_specialization): Likewise.
* rtti.c (emit_support_tinfos): Likewise.
* search.c (lookup_fnfields_idx_nolazy): Likewise.
(--This line, and those below, will be ignored--
M cp/cp-tree.h
M cp/search.c
M cp/init.c
M cp/class.c
M cp/rtti.c
M cp/except.c
M cp/ChangeLog
M cp/pt.c
M cp/parser.c
From-SVN: r249701
2017-06-27 Tom de Vries <tom@codesourcery.com>
* plugin/plugin-nvptx.c (notify_var): New function.
(nvptx_exec): Use notify_var for GOMP_OPENACC_DIM.
From-SVN: r249695
2017-06-27 Tom de Vries <tom@codesourcery.com>
* env.c (parse_unsigned_long_1): Factor out of ...
(parse_unsigned_long): ... here.
(parse_int_1): Factor out of ...
(parse_int): ... here.
(parse_int_secure): New function.
(initialize_env): Use parse_int_secure for GOMP_DEBUG.
* secure_getenv.h: Factor out of ...
* plugin/plugin-hsa.c: ... here.
* testsuite/libgomp.oacc-c-c++-common/gomp-debug-env.c: New test.
From-SVN: r249694
