The C file has a build tag, but the procedure we use for building C
files ignores build tags.
This should fix the libgo build on non-x86 systems.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194378
From-SVN: r275544
2019-09-09 Bernd Edlinger <bernd.edlinger@hotmail.de>
* expmed.c (extract_bit_field): Update function comment
regarding alt_rtl.
* expr.c (expand_expr_real): Update function comment
regarding alt_rtl.
(expand_misaligned_mem_ref): New helper function.
(expand_expr_real_2): Use expand_misaligned_mem_ref.
Remove duplicate assignment to "base" at case MEM_REF.
Remove a shadowed variable "unsignedp" at case VCE.
From-SVN: r275541
For the main package we add an implicit import of the runtime package,
to ensure that it is initialized. That import used the predeclared
location, which caused various tests, notably Named_type::is_builtin,
to treat these imported names as builtin. Start using a real location,
so that those tests do the right thing.
By the way, this implicit import is a partial cause of golang/go#19773.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194337
From-SVN: r275540
We forgot to ever traverse types of constant expressions. This rarely
makes a difference--evidently, since nobody noticed--but it does
matter when we inline constant expressions: we need to ensure that the
type is visible to the importing code.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194317
From-SVN: r275539
We currently maintain global REG_SET versions of fixed_reg_set
and regs_invalidated_by_call. With bitmap_view, we can instead
operate directly on the underlying HARD_REG_SETs, avoiding the
need to keep the two pieces of data in sync.
I have a series of patches that removes the assumption that there's
a single global ABI for all functions in the translation unit,
which includes not relying on having a global regs_invalidated_by_call.
Removing the REG_SET equivalent is one step to doing that.
Note that the affected DF code is used for EH edges or dumping only,
so shouldn't be performance critical.
2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* regset.h (regs_invalidated_by_call_regset): Delete.
(fixed_reg_set_regset): Likewise.
* reginfo.c (regs_invalidated_by_call_regset): Likewise.
(fixed_reg_set_regset, persistent_obstack): Likewise.
(init_reg_sets_1, globalize_reg): Update accordingly.
* df.h (df_print_regset, df_print_word_regset): Take a const_bitmap
instead of a bitmap.
* df-core.c (df_print_regset, df_print_word_regset): Likewise.
* df-problems.c (df_rd_local_compute): Use regs_invalidated_by_call
instead of regs_invalidated_by_call_regset.
(df_lr_confluence_n, df_md_confluence_n): Likewise.
* df-scan.c (df_scan_start_dump): Likewise.
* dse.c (copy_fixed_regs): Likewise.
* config/sh/sh.c (sh_find_equiv_gbr_addr): Likewise.
From-SVN: r275537
This patch adds a bitmap_view<X> class that creates a read-only,
on-stack bitmap representation of an array-like object X. The main
use case is to allow HARD_REG_SETs to be used in REG_SET (i.e. bitmap)
operations.
For now it only handles constant-sized arrays, but I've tried to
define the types in a way that could handle variable-sized arrays
in future (although less efficiently). E.g. this might be useful
for combining bitmaps and sbitmaps.
For the read-only view to work as intended, I needed to make
bitmap_bit_p take a const_bitmap instead of a bitmap. Logically
the bitmap really is read-only, but we update the "current" and
"indx" fields of the bitmap_head after doing a search.
2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* array-traits.h: New file.
* coretypes.h (array_traits, bitmap_view): New types.
* bitmap.h: Include "array-traits.h"
(bitmap_bit_p): Take a const_bitmap instead of a bitmap.
(base_bitmap_view, bitmap_view): New classes.
* bitmap.c (bitmap_bit_p): Take a const_bitmap instead of a bitmap.
* hard-reg-set.h: Include array-traits.h.
(array_traits<HARD_REG_SET>): New struct.
* regset.h (IOR_REG_SET_HRS): New macro.
* loop-iv.c (simplify_using_initial_values): Use IOR_REG_SET_HRS
rather than iterating over each hard register.
* sched-deps.c (sched_analyze_insn): Likewise.
* sel-sched-ir.c (setup_id_implicit_regs): Likewise.
From-SVN: r275536
This patch makes ior_hard_reg_conflicts take a const_hard_reg_set
rather than a pointer, so that it can be passed a temporary object
in later patches.
2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* ira-int.h (ior_hard_reg_conflicts): Take a const_hard_reg_set
instead of a HARD_REG_SET *.
* ira-build.c (ior_hard_reg_conflicts): Likewise.
(ira_build): Update call accordingly.
* ira-emit.c (add_range_and_copies_from_move_list): Likewise.
From-SVN: r275535
I have a series of patches that (as a side effect) makes all rtl
passes use the information collected by -fipa-ra. This showed up a
latent bug in the liveness tracking in regrename.c, which doesn't take
CALL_INSN_FUNCTION_USAGE into account when processing clobbers.
This actually seems to be quite a common problem with passes that use
note_stores; only a handful remember to walk CALL_INSN_FUNCTION_USAGE
too. I think it was just luck that I saw it with regrename first.
This patch tries to make things more robust by passing an insn rather
than a pattern to note_stores. The old function is still available
as note_pattern_stores for the few places that need it.
When updating callers, I've erred on the side of using note_stores
rather than note_pattern_stores, because IMO note_stores should be
the default choice and we should only use note_pattern_stores if
there's a specific reason. Specifically:
* For cselib.c, "body" may be a COND_EXEC_CODE instead of the main
insn pattern.
* For ira.c, I wasn't sure whether extending no_equiv to
CALL_INSN_FUNCTION_USAGE really made sense, since we don't do that
for normal call-clobbered registers. Same for mark_not_eliminable
in reload1.c
* Some other places only have a pattern available, and since those
places wouldn't benefit from walking CALL_INSN_FUNCTION_USAGE,
it seemed better to alter the code as little as possible.
* In the config/ changes, quite a few callers have already weeded
out CALL insns. It still seemed better to use note_stores rather
than prematurely optimise. (note_stores should tail call to
note_pattern_stores once it sees that the insn isn't a call.)
The patch also documents what SETs mean in CALL_INSN_FUNCTION_USAGE.
2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* rtl.h (CALL_INSN_FUNCTION_USAGE): Document what SETs mean.
(note_pattern_stores): Declare.
(note_stores): Take an rtx_insn *.
* rtlanal.c (set_of): Use note_pattern_stores instead of note_stores.
(find_all_hard_reg_sets): Pass the insn rather than its pattern to
note_stores. Remove explicit handling of CALL_INSN_FUNCTION_USAGE.
(note_stores): Take an rtx_insn * as argument and process
CALL_INSN_FUNCTION_USAGE. Rename old function to...
(note_pattern_stores): ...this.
(find_first_parameter_load): Pass the insn rather than
its pattern to note_stores.
* alias.c (memory_modified_in_insn_p, init_alias_analysis): Likewise.
* caller-save.c (setup_save_areas, save_call_clobbered_regs)
(insert_one_insn): Likewise.
* combine.c (combine_instructions): Likewise.
(likely_spilled_retval_p): Likewise.
(try_combine): Use note_pattern_stores instead of note_stores.
(record_dead_and_set_regs): Pass the insn rather than its pattern
to note_stores.
(reg_dead_at_p): Likewise.
* config/bfin/bfin.c (workaround_speculation): Likewise.
* config/c6x/c6x.c (maybe_clobber_cond): Likewise. Take an rtx_insn *
rather than an rtx.
* config/frv/frv.c (frv_registers_update): Use note_pattern_stores
instead of note_stores.
(frv_optimize_membar_local): Pass the insn rather than its pattern
to note_stores.
* config/gcn/gcn.c (gcn_md_reorg): Likewise.
* config/i386/i386.c (ix86_avx_u128_mode_after): Likewise.
* config/mips/mips.c (vr4130_true_reg_dependence_p): Likewise.
(r10k_needs_protection_p, mips_sim_issue_insn): Likewise.
(mips_reorg_process_insns): Likewise.
* config/s390/s390.c (s390_regs_ever_clobbered): Likewise.
* config/sh/sh.c (flow_dependent_p): Likewise. Take rtx_insn *s
rather than rtxes.
* cse.c (delete_trivially_dead_insns): Pass the insn rather than
its pattern to note_stores.
* cselib.c (cselib_record_sets): Use note_pattern_stores instead
of note_stores.
* dce.c (mark_nonreg_stores): Remove the "body" parameter and pass
the insn to note_stores.
(prescan_insns_for_dce): Update call accordingly.
* ddg.c (mem_write_insn_p): Pass the insn rather than its pattern
to note_stores.
* df-problems.c (can_move_insns_across): Likewise.
* dse.c (emit_inc_dec_insn_before, replace_read): Likewise.
* function.c (assign_parm_setup_reg): Likewise.
* gcse-common.c (record_last_mem_set_info_common): Likewise.
* gcse.c (load_killed_in_block_p, compute_hash_table_work): Likewise.
(single_set_gcse): Likewise.
* ira.c (validate_equiv_mem): Likewise.
(update_equiv_regs): Use note_pattern_stores rather than note_stores
for no_equiv.
* loop-doloop.c (doloop_optimize): Pass the insn rather than its
pattern to note_stores.
* loop-invariant.c (calculate_loop_reg_pressure): Likewise.
* loop-iv.c (simplify_using_initial_values): Likewise.
* mode-switching.c (optimize_mode_switching): Likewise.
* optabs.c (emit_libcall_block_1): Likewise.
(expand_atomic_compare_and_swap): Likewise.
* postreload-gcse.c (load_killed_in_block_p): Likewise.
(record_opr_changes): Likewise. Remove explicit handling of
CALL_INSN_FUNCTION_USAGE.
* postreload.c (reload_combine, reload_cse_move2add): Likewise.
* regcprop.c (kill_clobbered_values): Likewise.
(copyprop_hardreg_forward_1): Pass the insn rather than its pattern
to note_stores.
* regrename.c (build_def_use): Likewise.
* reload1.c (reload): Use note_pattern_stores instead of note_stores
for mark_not_eliminable.
(reload_as_needed): Pass the insn rather than its pattern
to note_stores.
(emit_output_reload_insns): Likewise.
* resource.c (mark_target_live_regs): Likewise.
* sched-deps.c (init_insn_reg_pressure_info): Likewise.
* sched-rgn.c (sets_likely_spilled): Use note_pattern_stores
instead of note_stores.
* shrink-wrap.c (try_shrink_wrapping): Pass the insn rather than
its pattern to note_stores.
* stack-ptr-mod.c (pass_stack_ptr_mod::execute): Likewise.
* var-tracking.c (adjust_insn, add_with_sets): Likewise.
From-SVN: r275527
We have two styles of HARD_REG_SET: a single integer based on
HOST_WIDEST_FAST_INT (used when FIRST_PSEUDO_REGISTER is small enough)
or an array of integers. One of the nice properties of this arrangement
is that:
void foo (const HARD_REG_SET);
is passed by value as an integer when the set is small enough and
by reference otherwise.
(This is in constrast to "const HARD_REG_SET &", which would always
be passed by reference, and in contrast to passing a structure wrapper
like "struct s { T elts[1]; }" by value, where the structure might be
passed like a T or by reference, depending on the ABI.)
However, one of the disadvantages of using an array is that simple
assignment doesn't work. We need to use COPY_HARD_REG_SET instead.
This patch uses a structure wrapper around the array, and preserves
the above "nice property" using a new const_hard_reg_set typedef.
The patch also removes the manual unrolling for small array sizes;
I think these days we can rely on the compiler to do that for us.
This meant fixing two port-specific quirks:
- epiphany passed NULL as a HARD_REG_SET whose value doesn't matter.
The patch passes the NO_REGS set instead.
- ia64 reused TEST_HARD_REG_BIT and SET_HARD_REG_BIT for arrays that
are bigger than HARD_REG_SET. The patch just open-codes them.
The patch is probably being too conservative. Very few places actually
take advantage of the "nice property" above, and we could have a
cleaner interface if we used a structure wrapper for all cases.
2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* hard-reg-set.h (HARD_REG_SET): Define using a typedef rather
than a #define. Use a structure rather than an array as the
fallback definition. Remove special cases for low array sizes.
(const_hard_reg_set): New typedef.
(hard_reg_set_subset_p): Use it instead of "const HARD_REG_SET".
(hard_reg_set_equal_p, hard_reg_set_intersect_p): Likewise.
(hard_reg_set_empty_p): Likewise.
(SET_HARD_REG_BIT): Use a function rather than a macro to
handle the case in which HARD_REG_SET is a structure.
(CLEAR_HARD_REG_BIT, TEST_HARD_REG_BIT, CLEAR_HARD_REG_SET)
(SET_HARD_REG_SET, COPY_HARD_REG_SET, COMPL_HARD_REG_SET)
(AND_HARD_REG_SET, AND_COMPL_HARD_REG_SET, IOR_HARD_REG_SET)
(IOR_COMPL_HARD_REG_SET): Likewise.
(hard_reg_set_iterator::pset): Constify the pointer target.
(hard_reg_set_iter_init): Take a const_hard_reg_set instead
of a "const HARD_REG_SET". Update the handling of non-integer
HARD_REG_SETs.
* recog.h: Test HARD_CONST instead of CLEAR_HARD_REG_SET.
* reload.h: Likewise.
* rtl.h (choose_hard_reg_mode): Remove unnecessary line break.
* regs.h (in_hard_reg_set_p): Take a const_hard_reg_set instead
of a "const HARD_REG_SET".
(overlaps_hard_reg_set_p, range_overlaps_hard_reg_set_p): Likewise.
(range_in_hard_reg_set_p): Likewise.
* ira-costs.c (restrict_cost_classes): Likewise.
* shrink-wrap.c (move_insn_for_shrink_wrap): Likewise.
* config/epiphany/resolve-sw-modes.c (pass_resolve_sw_modes::execute):
Pass a NO_REGS HARD_REG_SET rather than NULL to emit_set_fp_mode.
* config/ia64/ia64.c (rws_insn): In the CHECKING_P version,
use unsigned HOST_WIDEST_FAST_INT rather than HARD_REG_ELT_TYPE.
(rws_insn_set, rws_insn_test): In the CHECKING_P version,
take an unsigned int and open-code the HARD_REG_SET operations.
From-SVN: r275526
bt-load.c has AFAIK been dead code since the removal of the SH5 port
in 2016. I have a patch series that would need to update the liveness
tracking in a nontrivial way, so it seemed better to remove the pass
rather than install an untested and probably bogus change.
2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* Makefile.in (OBJS): Remove bt-load.o.
* doc/invoke.texi (fbranch-target-load-optimize): Delete.
(fbranch-target-load-optimize2, fbtr-bb-exclusive): Likewise.
* common.opt (fbranch-target-load-optimize): Mark as Ignore and
document that the option no longer does anything.
(fbranch-target-load-optimize2, fbtr-bb-exclusive): Likewise.
* target.def (branch_target_register_class): Delete.
(branch_target_register_callee_saved): Likewise.
* doc/tm.texi.in (TARGET_BRANCH_TARGET_REGISTER_CLASS): Likewise.
(TARGET_BRANCH_TARGET_REGISTER_CALLEE_SAVED): Likewise.
* doc/tm.texi: Regenerate.
* tree-pass.h (make_pass_branch_target_load_optimize1): Delete.
(make_pass_branch_target_load_optimize2): Likewise.
* passes.def (pass_branch_target_load_optimize1): Likewise.
(pass_branch_target_load_optimize2): Likewise.
* targhooks.h (default_branch_target_register_class): Likewise.
* targhooks.c (default_branch_target_register_class): Likewise.
* opt-suggestions.c (test_completion_valid_options): Remove
-fbtr-bb-exclusive from the list of test options.
* bt-load.c: Remove.
From-SVN: r275521
2019-09-09 Barnaby Wilks <barnaby.wilks@arm.com>
* match.pd: Add flag_unsafe_math_optimizations check
before deciding on the widest type in a binary math operation.
* gcc.dg/fold-binary-math-casts.c: New test.
From-SVN: r275518
2019-09-09 Martin Liska <mliska@suse.cz>
* config/i386/i386.opt: Update comment of removed
options that are preserved only for backward
compatibility.
2019-09-09 Martin Liska <mliska@suse.cz>
* c.opt: Update comment of removed
options that are preserved only for backward
compatibility.
From-SVN: r275517
__to_chars_10_impl is quite fast. According to the IACA the main loop
takes only 6.0 cycles, the whole function with one iteration takes
10.0 cycles. Replacing the __first[pos] and __first[pos - 1] with
__first[0] and __first[1] drops the function time to 7.53 cycles.
2019-09-09 Antony Polukhin <antoshkka@gmail.com>
* include/bits/charconv.h (__detail::__to_chars_10_impl): Replace
final offsets with constants.
From-SVN: r275514
This patch simplifies the constraints on the constructors from arrays by
removing the redundant checks that element_type and value_type are
convertible to element_type. The incorrect uses of __adl_data in those
constructors are removed as well (they should use std::data not
std::ranges::data, and the former doesn't use ADL).
The range/container constructors are now constrained to exclude all
specializations of std::span, not just the current instantiation. The
range constructor now also checks s subset of the contiguous_range
requirements.
All relevant constructor constraints now use the _Require helper in
order to short circuit and avoid unnecessary instantiations after the
first failed constraint.
A new constructor supports initialization from different specializations
of std::span<OtherType, OtherExtent>, as specified in the C++20 draft.
* include/bits/range_access.h (__adl_to_address): Remove.
* include/std/span (__is_base_derived_safe_convertible_v): Replace
with span::__is_compatible.
(__is_std_array_v): Replace with __is_std_array class template and
partial specializations.
(__is_std_array, __is_std_span): New class templates and partial
specializations.
(span::__is_compatible): New alias template for SFINAE constraints.
(span::span(element_type (&)[N])): Remove redundant constraints. Do
not use __adl_data to obtain a pointer.
(span::span(array<value_type, N>&)): Likewise.
(span::span(const array<value_type, N>&)): Likewise.
[_GLIBCXX_P1394] (span::iter_reference_t, span::iterator_t)
(span::iter_value_t, span::derived_from): New alias templates for
SFINAE constraints, until the equivalents are supported in <concepts>
and <iterator>.
[_GLIBCXX_P1394] (span::__is_compatible_iterator): New alias template
for SFINAE constraints.
[_GLIBCXX_P1394] (span::is_compatible_range): New class template for
SFINAE constraints.
[_GLIBCXX_P1394] (span::span(Range&&)): Improve constraints.
[_GLIBCXX_P1394] (span::span(ContiguousIterator, Sentinel)): Likewise.
Use std::to_address instead of __adl_to_address.
[_GLIBCXX_P1394] (span::span(ContiguousIterator, size_type)): Likewise.
[!_GLIBCXX_P1394] (span::__is_compatible_container): New alias
template for SFINAE constraints.
[!_GLIBCXX_P1394] (span::span(Container&))
(span::span(const Container&)): Improve constraints.
[!_GLIBCXX_P1394] (span::span(pointer, size_type))
(span::span(pointer, pointer)): Remove redundant cast of pointer.
(span(const span<OType, OExtent>&)): New constructor.
From-SVN: r275513
PR target/87853
* config/i386/emmintrin.h (_mm_cmpeq_epi8): Use casts to __v16qi
instead of __v16qs.
* gcc.target/i386/pr87853.c: New test.
From-SVN: r275508
PR target/91704
* config/i386/avxintrin.h (__v32qs): New typedef.
* config/i386/avx2intrin.h (_mm256_cmpgt_epi8): Use casts to __v32qs
instead of __v32qi.
* gcc.target/i386/pr91704.c: New test.
From-SVN: r275507
The function integer_range_info makes sure that, if provided, the
initial value fills in the especified range. However, it is necessary
to convert the values to a numerical context before comparing, to make
sure awk is using arithmetical order and not lexicographical order.
gcc/ChangeLog:
* opt-functions.awk (integer_range_info): Make sure values are in
numeric context before operating with them.
From-SVN: r275503
It's tiresome to have to look in insn-emit.c to see where some split
came from, so let's print that info to the dump file as well. But
don't print the full path, just the basename, for greater readability.
* genemit.c (gen_split): Print the filename and line number where the
splitter (or peephole2) was defined, to the dump file.
From-SVN: r275497
PR tree-optimization/91665
* tree-vect-loop.c (vectorizable_reduction): Punt if base has type
incompatible with the type of PHI result.
* gcc.dg/vect/pr91665.c: New test.
From-SVN: r275486
This re-enables -msave-restore for shared libraries, and uses the
t-slibgcc-libgcc file to get the save-restore routines included directly
in shared libraries so that we don't need to indirect through the PLT
to reach them, which doesn't work.
gcc/
* config/riscv/riscv.c (riscv_option_override): Revert 2019-08-30
change.
libgcc/
* config.host (riscv*-*-linux*): Add t-slibgcc-libgcc to tmake_file.
(riscv*-*-freebsd*): Likewise.
From-SVN: r275478
This isn't used since 2012. (It's a remnant of RIOS support).
* config/rs6000/rs6000.c (rs6000_rtx_costs) <case UNSPEC>: Delete.
* config/rs6000/rs6000.md (unspec): Delete UNSPEC_FRSP.
From-SVN: r275476
PR target/91654
* config/i386/x86-tune-costs.h (skylake_cost): Raise the
cost of SSE->integer and integer->SSE moves from 2 to 6.
(core_cost): Ditto.
From-SVN: r275475
2019-09-05 Caroline Tice <cmtice@google.com>
PR testsuite/91670
* g++.dg/ubsan/pr59415.C: Disable LTO, since test uses
-fvtable-verify, and the two options are no longer allowed
together.
From-SVN: r275460
