Commit Graph

166272 Commits

Author SHA1 Message Date
Jonathan Wakely
e334d7a702 Fix location of __cpp_lib_erase_if macro
This macro should only be defined for C++2a, not C++17.

	* include/std/version (__cpp_lib_erase_if): Move to C++20 group.

From-SVN: r267863
2019-01-11 23:40:58 +00:00
Marek Polacek
1439f35553 PR c++/88692, c++/87882 - -Wredundant-move false positive with *this.
* typeck.c (maybe_warn_pessimizing_move): Return if ARG isn't
	ADDR_EXPR.

	* g++.dg/cpp0x/Wredundant-move5.C: New test.
	* g++.dg/cpp0x/Wredundant-move6.C: New test.

From-SVN: r267862
2019-01-11 23:21:40 +00:00
Ian Lance Taylor
378b9abe56 compiler: pad structs ending with zero-sized field
For a struct with zero-sized last field, the address of the
    field falls out of the object boundary, which confuses the
    garbage collector. Pad an extra byte in this case.
    
    Reviewed-on: https://go-review.googlesource.com/c/157557

From-SVN: r267861
2019-01-11 23:16:38 +00:00
Jason Merrill
3ddf08b3b8 PR c++/88312 - pack expansion of decltype.
The standard doesn't really talk about an expression depending on the number
of elements of a pack, but that's definitely an important form of template
argument dependence.

	* pt.c (instantiation_dependent_r): A template non-type parameter
	pack is instantiation-dependent.

From-SVN: r267860
2019-01-11 17:37:01 -05:00
Jason Merrill
f43e0585fa PR c++/88613 - ICE with use of const var in lambda.
The issue here was that we were cp_folding a location wrapper around a
lambda capture proxy before it had been mark_rvalue_used.  I considered
adding mark_rvalue_use calls to build_new_op_1, but it seems appropriate to
have them in cp_fold_maybe_rvalue when we know we're trying to produce an
rvalue.

The change to mark_use is for a related issue: when we change the operand of
the location wrapper from VAR_DECL to INTEGER_CST, we need the TREE_CODE of
the location wrapper to change as well, from VIEW_CONVERT_EXPR to
NON_LVALUE_EXPR.

	* expr.c (mark_use): Fix location wrapper handling.
	* cp-gimplify.c (cp_fold_maybe_rvalue): Call mark_rvalue_use.

From-SVN: r267859
2019-01-11 17:36:20 -05:00
Jakub Jelinek
da972c05f4 re PR middle-end/85956 (ICE in wide_int_to_tree_1, at tree.c:1549)
PR middle-end/85956
	PR lto/88733
	* tree-inline.h (struct copy_body_data): Add adjust_array_error_bounds
	field.
	* tree-inline.c (remap_type_1): Formatting fix.  If TYPE_MAX_VALUE of
	ARRAY_TYPE's TYPE_DOMAIN is newly error_mark_node, replace it with
	a dummy "omp dummy var" variable if id->adjust_array_error_bounds.
	* omp-low.c (new_omp_context): Set cb.adjust_array_error_bounds.
fortran/
	* trans-openmp.c: Include attribs.h.
	(gfc_walk_alloc_comps, gfc_omp_clause_linear_ctor): Handle
	VAR_DECL max bound with "omp dummy var" attribute like NULL or
	error_mark_node - recompute number of elts independently.
testsuite/
	* c-c++-common/gomp/pr85956.c: New test.
	* g++.dg/gomp/pr88733.C: New test.

From-SVN: r267858
2019-01-11 22:03:53 +01:00
Tobias Burnus
b13091dd9d PR C++/88114 Gen destructor of an abstract class
PR C++/8811
        * decl2.c (maybe_emit_vtables): If needed, generate code for
        the destructor of an abstract class.
        (mark_used): Update comment for older function-name change.

        PR C++/88114
        * g++.dg/cpp0x/defaulted61.C: New.
        * g++.dg/cpp0x/defaulted62.C: New.

From-SVN: r267855
2019-01-11 20:40:13 +01:00
Vladimir Makarov
4321da7b93 re PR rtl-optimization/87305 (Segfault in end_hard_regno in setup_live_pseudos_and_spill_after_risky_transforms on aarch64 big-endian)
2019-01-11  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/87305
	* lra-assigns.c
	(setup_live_pseudos_and_spill_after_risky_transforms): Add code
	for little endian pseudos used as paradoxical subreg.

From-SVN: r267854
2019-01-11 19:25:31 +00:00
Jakub Jelinek
e17fa93eca re PR tree-optimization/88693 (Wrong code since r263018)
PR tree-optimization/88693
	* tree-ssa-strlen.c (get_min_string_length): Don't set *full_string_p
	for STRING_CSTs that don't contain any NUL characters in the first
	TREE_STRING_LENGTH bytes.

	* gcc.c-torture/execute/pr88693.c: New test.

From-SVN: r267852
2019-01-11 20:04:32 +01:00
Alan Modra
0f64d96d93 re PR target/88777 (Out-of-range offsets building glibc test-tgmath2.c for hppa-linux-gnu)
PR 88777
	PR 88614
	* genattrtab.c (min_fn): Don't translate values.
	(min_attr_value): Return INT_MAX when the value can't be calculated.
	Return minimum among any values that can be calculated.
	(max_attr_value): Adjust.

From-SVN: r267851
2019-01-11 11:44:00 -07:00
Jakub Jelinek
e173500e53 * Makefile.in (PLUGIN_HEADERS): Add $(INSN_ATTR_H).
From-SVN: r267850
2019-01-11 18:01:25 +01:00
Jakub Jelinek
8aa1550e23 Remove trailing whitespace from latest commit.
From-SVN: r267849
2019-01-11 17:55:13 +01:00
Steve Ellcey
473574ee05 aarch64.c (aarch64_simd_call_p): New function.
2019-01-11  Steve Ellcey  <sellcey@marvell.com>

	* config/aarch64/aarch64.c (aarch64_simd_call_p): New function.
	(aarch64_hard_regno_call_part_clobbered): Add insn argument.
	(aarch64_return_call_with_max_clobbers): New function.
	(TARGET_RETURN_CALL_WITH_MAX_CLOBBERS): New macro.
	* config/avr/avr.c (avr_hard_regno_call_part_clobbered): Add insn
	argument.
	* config/i386/i386.c (ix86_hard_regno_call_part_clobbered): Ditto.
	* config/mips/mips.c (mips_hard_regno_call_part_clobbered): Ditto.
	* config/rs6000/rs6000.c (rs6000_hard_regno_call_part_clobbered): Ditto.
	* config/s390/s390.c (s390_hard_regno_call_part_clobbered): Ditto.
	* cselib.c (cselib_process_insn): Add argument to
	targetm.hard_regno_call_part_clobbered call.
	* ira-conflicts.c (ira_build_conflicts): Ditto.
	* ira-costs.c (ira_tune_allocno_costs): Ditto.
	* lra-constraints.c (inherit_reload_reg): Ditto.
	* lra-int.h (struct lra_reg): Add call_insn field, remove call_p field.
	* lra-lives.c (check_pseudos_live_through_calls): Add call_insn
	argument.  Call targetm.return_call_with_max_clobbers.
	Add argument to targetm.hard_regno_call_part_clobbered call.
	(calls_have_same_clobbers_p): New function.
	(process_bb_lives): Add call_insn and last_call_insn variables.
	Pass call_insn to check_pseudos_live_through_calls.
	Modify if stmt to check targetm.return_call_with_max_clobbers.
	Update setting of flush variable.
	(lra_create_live_ranges_1): Set call_insn to NULL instead of call_p
	to false.
	* lra.c (initialize_lra_reg_info_element): Set call_insn to NULL.
	* regcprop.c (copyprop_hardreg_forward_1): Add argument to
        targetm.hard_regno_call_part_clobbered call.
	* reginfo.c (choose_hard_reg_mode): Ditto.
	* regrename.c (check_new_reg_p): Ditto.
	* reload.c (find_equiv_reg): Ditto.
	* reload1.c (emit_reload_insns): Ditto.
	* sched-deps.c (deps_analyze_insn): Ditto.
	* sel-sched.c (init_regs_for_mode): Ditto.
	(mark_unavailable_hard_regs): Ditto.
	* targhooks.c (default_dwarf_frame_reg_mode): Ditto.
	* target.def (hard_regno_call_part_clobbered): Add insn argument.
	(return_call_with_max_clobbers): New target function.
	* doc/tm.texi: Regenerate.
	* doc/tm.texi.in (TARGET_RETURN_CALL_WITH_MAX_CLOBBERS): New hook.
	* hooks.c (hook_bool_uint_mode_false): Change to
	hook_bool_insn_uint_mode_false.
	* hooks.h (hook_bool_uint_mode_false): Ditto.

From-SVN: r267848
2019-01-11 16:50:17 +00:00
Jakub Jelinek
134a6f7b10 type_traits (__cpp_lib_is_constant_evaluated): Define.
* include/std/type_traits (__cpp_lib_is_constant_evaluated): Define.
	* include/std/version (__cpp_lib_is_constant_evaluated): Define.

From-SVN: r267847
2019-01-11 17:01:23 +01:00
Steve Ellcey
b3650d40fa aarch64.c (aarch64_simd_call_p): New function.
2019-01-11  Steve Ellcey  <sellcey@marvell.com>

	* config/aarch64/aarch64.c (aarch64_simd_call_p): New function.
	(aarch64_remove_extra_call_preserved_regs): New function.
	(TARGET_REMOVE_EXTRA_CALL_PRESERVED_REGS): New macro.
	* doc/tm.texi.in (TARGET_REMOVE_EXTRA_CALL_PRESERVED_REGS): New hook.
	* doc/tm.texi: Regenerate.
	* final.c (get_call_reg_set_usage): Call new hook.
	* target.def (remove_extra_call_preserved_regs): New hook.
	* targhooks.c (default_remove_extra_call_preserved_regs): New function.
	* targhooks.h (default_remove_extra_call_preserved_regs): New function.

From-SVN: r267846
2019-01-11 15:53:02 +00:00
Jonathan Wakely
17a73b3c47 PR libstdc++/88802 define std::hash<nullptr_t> for C++17
PR libstdc++/88802
	* include/bits/functional_hash.h (hash<nullptr_t>): Define
	specialization for C++17 (P0513R0, LWG 2817).
	* testsuite/20_util/hash/nullptr.cc: New test.

From-SVN: r267845
2019-01-11 14:54:49 +00:00
Tamar Christina
d58cb9659f Fix arm testism regression.
gcc/testsuite/ChangeLog:

2019-01-11  Tamar Christina  <tamar.christina@arm.com>

	* gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c: Require neon
	and add options.

From-SVN: r267843
2019-01-11 14:20:58 +00:00
Thomas Schwinge
4102bda64c Better distinguish OpenACC and OpenMP sections in libgomp.texi
2019-01-11  Thomas Schwinge  <thomas@codesourcery.com>
            James Norris  <jnorris@codesourcery.com>

	* libgomp.texi: Better distinguish OpenACC and OpenMP "Runtime
	Library Routines", and "Environment Variables".

Co-Authored-By: James Norris <jnorris@codesourcery.com>

From-SVN: r267841
2019-01-11 13:55:01 +00:00
Martin Liska
5019eef8d6 Add a testcase (PR middle-end/88758).
2019-01-11  Martin Liska  <mliska@suse.cz>

	PR middle-end/88758
	* g++.dg/lto/pr88758_0.C: New test.
	* g++.dg/lto/pr88758_1.C: New test.

From-SVN: r267840
2019-01-11 13:20:01 +00:00
Jakub Jelinek
b55ddd438a re PR bootstrap/88714 (bootstrap comparison failure on armv7l since r265398)
PR bootstrap/88714
	* passes.c (finish_optimization_passes): Call print_combine_total_stats
	inside of pass_combine_1 dump rather than pass_profile_1.

From-SVN: r267839
2019-01-11 13:05:54 +01:00
Tom de Vries
052aaaceed [nvptx] Don't allow vector_length 64 with num_workers 16
When using a compiler build with:
...
+#define PTX_DEFAULT_VECTOR_LENGTH PTX_CTA_SIZE
...

consider a test-case:
...
int
main (void)
{
  #pragma acc parallel vector_length (64)
    #pragma acc loop worker
    for (unsigned int i = 0; i < 32; i++)
      #pragma acc loop vector
      for (unsigned int j = 0; j < 64; j++)
        ;

  return 0;
}
...

If num_workers is 16, either because:
- we add a "num_workers (16)" clause on the parallel directive, or
- we set "GOMP_OPENACC_DIM=:16:", or
- the libgomp plugin chooses 16 num_workers
we run into an illegal instruction at runtime, because a bar.sync instruction
tries to use a barrier 16.  The instruction is illegal, because ptx supports
only 16 barriers per CTA, and the valid range is 0..15.

The problem is that with a warp-multiple vector length, we use a code generation
scheme with a per-worker barrier.  And because barrier zero is reserved for
per-cta barrier, only the remaining 15 barriers can be used as per-worker
barrier, and consequently we can't use num_workers larger than 15.

This problem occurs only for vector_length 64.  For vector_length 32, we use a
different code generation scheme, and for vector_length >= 96, the maximum
num_workers is not big enough not to trigger this problem.

Also, this problem only occurs for num_workers 16.  As explained above,
num_workers 15 is safe to use, and 16 is already the maximum num_workers for
vector_length 64.

This patch fixes the problem in both the compiler (handling "num_workers (16)")
and in the libgomp nvptx plugin (with and without "GOMP_OPENACC_DIM=:16:").

2019-01-11  Tom de Vries  <tdevries@suse.de>

	* config/nvptx/nvptx.c (PTX_CTA_NUM_BARRIERS, PTX_PER_CTA_BARRIER)
	(PTX_NUM_PER_CTA_BARRIER, PTX_FIRST_PER_WORKER_BARRIER)
	(PTX_NUM_PER_WORKER_BARRIERS): Define.
	(nvptx_apply_dim_limits): Prevent vector_length 64 and
	num_workers 16.

	* plugin/plugin-nvptx.c (nvptx_exec): Prevent vector_length 64 and
	num_workers 16.

From-SVN: r267838
2019-01-11 11:46:43 +00:00
Tom de Vries
69b09a587d [nvptx] Move PTX_CTA_SIZE up
Move the defition of PTX_CTA_SIZE up in nvptx.c.

2019-01-11  Tom de Vries  <tdevries@suse.de>

	* config/nvptx/nvptx.c (PTX_CTA_SIZE): Move up.

From-SVN: r267837
2019-01-11 11:46:31 +00:00
Tom de Vries
9390f91687 [libgomp, testsuite, openacc] Remove -foffload=-w in reduction-[1-5].c
Before the commit "[libgomp, testsuite, openacc] Don't use const int for
dimensions", the "const int" construct was used to set launch dimensions in
reductions-[1-5].c.  In the case of -xc -O0, the const int is implemented as a
variable by the C front-end.  Consequently, the nvptx back-end generated
warnings that vector_length was overridden to be hard-coded, rather than left to
be set at runtime.  The test-cases silenced these warnings by switching off all
warnings in the accelerator compiler using "-foffload=-w".

Given that no warnings occur anymore, remove the "-foffload=-w" setting.

2019-01-11  Tom de Vries  <tdevries@suse.de>

	* testsuite/libgomp.oacc-c-c++-common/reduction-1.c: Remove
	-foffload=-w.
	* testsuite/libgomp.oacc-c-c++-common/reduction-2.c: Same.
	* testsuite/libgomp.oacc-c-c++-common/reduction-3.c: Same.
	* testsuite/libgomp.oacc-c-c++-common/reduction-4.c: Same.
	* testsuite/libgomp.oacc-c-c++-common/reduction-5.c: Same.

From-SVN: r267836
2019-01-11 11:46:06 +00:00
Tom de Vries
2c3e7ad20b [nvptx, testsuite, openacc, libgomp] Add insufficient-resources.c
Add a test-case that tests the "insufficient resources" fatal in the nvptx
libgomp plugin.

2019-01-11  Tom de Vries  <tdevries@suse.de>

	* testsuite/libgomp.oacc-c-c++-common/insufficient-resources.c: New
	test.

From-SVN: r267835
2019-01-11 11:45:55 +00:00
Jonathan Wakely
bbed72f559 PR libstdc++/88125 remove duplicate entry in linker script
PR libstdc++/88125
	* config/abi/pre/gnu.ver (GLIBCXX_3.4.6): Remove unused duplicate
	pattern for std::basic_stringbuf::str().

From-SVN: r267834
2019-01-11 11:39:45 +00:00
Jan Beulich
4f85313786 x86-64: {,V}CVT{,U}SI2Sx are ambiguous without suffix
For 64-bit these should not be emitted without suffix in AT&T mode (as
being ambiguous that way); the suffixes are benign for 32-bit. For
consistency also omit the suffix in Intel mode for {,V}CVTSI2SxQ.

The omission has originally (prior to rev 260691) lead to wrong code
being generated for the 64-bit unsigned-to-float/double conversions (as
gas guesses an L suffix instead of the required Q one when the operand
is in memory). In all remaining cases (being changed here) the omission
would "just" lead to warnings with future gas versions.

As a result, arrange to check for the L suffixes in 32-bit test cases.

In order for related test cases to actually test what they're supposed
to test, add (seemingly unrelated) a few empty "asm volatile()".
Presumably there are more where constant propagation voids the intended
effect of the tests, but these are ones helping make sure the assembler
actually still assembles correctly the output after the changes here.

From-SVN: r267833
2019-01-11 11:20:40 +00:00
Jonathan Wakely
8ce7e3f8e9 Fix incorrect linker script patterns
The recent changes to support operator<<(nullptr_t) changed the glob
patterns for existing operator<<(T) overloads, but did so incorrectly so
they still matched the new symbols. That broke Solaris bootstrap. This
patch replaces each of the existing globs by two more precise ones,
which match the old symbols but not the new ones.

	* config/abi/pre/gnu.ver (GLIBCXX_3.4): Correct recent changes to
	basic_ostream::operator<< patterns.

From-SVN: r267832
2019-01-11 10:25:46 +00:00
Jakub Jelinek
6ebf16e63f re PR rtl-optimization/88296 (Infinite loop in lra_split_hard_reg_for)
PR rtl-optimization/88296
	* gcc.target/i386/pr88296.c: New test.

From-SVN: r267831
2019-01-11 11:17:12 +01:00
Paolo Carlini
a8766179a7 decl.c (start_decl): Improve error location.
/cp
2019-01-11  Paolo Carlini  <paolo.carlini@oracle.com>

	* decl.c (start_decl): Improve error location.
	(grokdeclarator): Likewise, improve two locations.

/testsuite
2019-01-11  Paolo Carlini  <paolo.carlini@oracle.com>

	* g++.dg/diagnostic/extern-initialized.C: New.
	* g++.dg/ext/dllimport-initialized.C: Likewise.

From-SVN: r267830
2019-01-11 09:02:43 +00:00
Thomas Koenig
7dc3df082b re PR fortran/59345 (_gfortran_internal_pack on compiler generated temps)
2019-01-11  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/59345
	* trans-array.c (gfc_conv_parameter_array):  Temporary
	arrays generated for expressions do not need to be repacked.

2019-01-11  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/59345
	* gfortran.dg/internal_pack_16.f90: New test.

From-SVN: r267829
2019-01-11 06:32:10 +00:00
GCC Administrator
0604d5672f Daily bump.
From-SVN: r267828
2019-01-11 00:16:19 +00:00
Jakub Jelinek
84df580f07 re PR target/88785 (ICE in as_a, at machmode.h:353)
PR target/88785
	* config/i386/sse.md (float<floatunssuffix>v2div2sf2): Turn into
	define_expand.
	(*float<floatunssuffix>v2div2sf2): New define_insn.
	(float<floatunssuffix>v2div2sf2_mask): Turn into define_expand.
	(*float<floatunssuffix>v2div2sf2_mask): New define_insn.
	(*float<floatunssuffix>v2div2sf2_mask_1): Replace
	subrtxes (const_vector:V2SF [(const_int 0) (const_int 0)]) with
	match_operands with "const0_operand" "C".

	* g++.target/i386/pr88785.C: New test.

From-SVN: r267825
2019-01-11 00:20:19 +01:00
Tamar Christina
280d970b15 gcc/ChangeLog:
2019-01-10  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-builtins.c
	(aarch64_init_builtins): Move aarch64_init_fcmla_laneq_builtins...
	(aarch64_init_simd_builtins): ...Here.

From-SVN: r267824
2019-01-10 22:28:00 +00:00
Vladimir Makarov
7e4d17a846 re PR rtl-optimization/87305 (Segfault in end_hard_regno in setup_live_pseudos_and_spill_after_risky_transforms on aarch64 big-endian)
2019-01-10  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/87305
	* lra-assigns.c
	(setup_live_pseudos_and_spill_after_risky_transforms): Check
	allocation for big endian pseudos used as paradoxical subregs and
	spill them if it is wrong.
	* lra-constraints.c (lra_constraints): Add a comment.

2019-01-10  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/87305
	* gcc.target/aarch64/pr87305.c: New.

From-SVN: r267823
2019-01-10 21:02:50 +00:00
Richard Biener
f25507d041 re PR tree-optimization/88792 (wrong-code in RPO VN since r263875)
2019-01-10  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/88792
	* tree-ssa-pre.c (get_representative_for): Do not return a
	value-number here.

	* gcc.dg/torture/pr88792.c: New testcase.

From-SVN: r267821
2019-01-10 18:58:08 +00:00
Steven G. Kargl
bebf94afe5 re PR fortran/86322 (ICE in reference_record with data statement)
2019-01-10  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/86322
	* decl.c (top_var_list): Set locus of expr.
	(gfc_match_data): Detect pointer on non-rightmost part-refs.

2019-01-10  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/86322
	* gfortran.dg/pr86322_1.f90: New test.
	* gfortran.dg/pr86322_2.f90: Ditto.
	* gfortran.dg/pr86322_3.f90: Ditto.

From-SVN: r267820
2019-01-10 18:45:38 +00:00
Sudakshina Das
8b530f8113 [Committed, AArch64] Disable tests for ilp32.
Currently Return Address Signing is only supported in lp64. Thus the
tests that I added recently (that enables return address signing by the
mbranch-protection=standard option), should also be exempted from testing in
ilp32. This patch adds the needed dg-require-effective-target directive in the
tests.

*** gcc/testsuite/ChangeLog ***

2019-01-10  Sudakshina Das  <sudi.das@arm.com>

	* gcc.target/aarch64/bti-1.c: Exempt for ilp32.
	* gcc.target/aarch64/bti-2.c: Likewise.
	* gcc.target/aarch64/bti-3.c: Likewise.

Committed as obvious.

From-SVN: r267818
2019-01-10 17:29:54 +00:00
Jakub Jelinek
d9e91ebb81 re PR middle-end/84877 (Local stack copy of BLKmode parameter on the stack is not aligned when the requested alignment exceeds MAX_SUPPORTED_STACK_ALIGNMENT)
PR middle-end/84877
	PR bootstrap/88450
	* function.c (assign_stack_local_1): Revert the 2018-11-21 changes.
	(assign_parm_setup_block): Do the argument slot realignment here
	instead.

From-SVN: r267812
2019-01-10 16:44:16 +01:00
Jonathan Wakely
174f1d2642 Fix filesystem::last_write_time failure with 32-bit time_t
* testsuite/27_io/filesystem/operations/last_write_time.cc: Fix
	test failures on targets with 32-bit time_t.

From-SVN: r267811
2019-01-10 15:39:28 +00:00
Jonathan Wakely
45a8d80fec Define __cpp_lib_erase_if feature test macro
The C++2a draft specifies the value 201811L for this, but as an
extension we return the number of elements erased. This is expected to
be standardised, so the macro has the value 201900L until a proper value
is specified in the draft.

	* include/bits/erase_if.h: Define __cpp_lib_erase_if.
	* include/std/deque: Likewise.
	* include/std/forward_list: Likewise.
	* include/std/list: Likewise.
	* include/std/string: Likewise.
	* include/std/vector: Likewise.
	* include/std/version: Likewise.
	* testsuite/21_strings/basic_string/erasure.cc: Test macro.
	* testsuite/23_containers/deque/erasure.cc: Likewise.
	* testsuite/23_containers/forward_list/erasure.cc: Likewise.
	* testsuite/23_containers/list/erasure.cc: Likewise.
	* testsuite/23_containers/map/erasure.cc: Likewise.
	* testsuite/23_containers/set/erasure.cc: Likewise.
	* testsuite/23_containers/unordered_map/erasure.cc: Likewise.
	* testsuite/23_containers/unordered_set/erasure.cc: Likewise.
	* testsuite/23_containers/vector/erasure.cc: Likewise.

From-SVN: r267810
2019-01-10 13:49:31 +00:00
Jonathan Wakely
cbe0bca404 Check AI_NUMERICSERV is defined before using it
The AI_NUMERICSERV constant is missing from old Darwin systems, so only
use it if it's supported.

	* include/experimental/internet [AI_NUMERICSERV]
	(resolver_base::numeric_service): Define conditionally.
	* testsuite/experimental/net/internet/resolver/base.cc: Test it
	conditionally.
	* testsuite/experimental/net/internet/resolver/ops/lookup.cc:
	Likewise.

From-SVN: r267809
2019-01-10 13:21:54 +00:00
Ville Voutilainen
c3799b164f Implement LWG 2221: formatted output operator for nullptr
2019-01-10  Ville Voutilainen  <ville.voutilainen@gmail.com>
	    Jonathan Wakely  <jwakely@redhat.com>

	Implement LWG 2221
	* config/abi/pre/gnu.ver (GLIBCXX_3.4): Tighten patterns.
	(GLIBCXX_3.4.26): Add new exports.
	* include/Makefile.am: Add ostream-inst.cc. Move string-inst.cc to
	correct list of sources.
	* include/Makefile.in: Regenerate.
	* include/std/ostream (operator<<(nullptr_t)): New member function.
	* src/c++17/ostream-inst.cc: New file.
	* testsuite/27_io/basic_ostream/inserters_other/char/lwg2221.cc: New
	test.

Co-Authored-By: Jonathan Wakely <jwakely@redhat.com>

From-SVN: r267808
2019-01-10 13:14:57 +00:00
Nathan Sidwell
e222497dcb Add testcase from PR71959
libgomp/

	PR lto/71959
	* testsuite/libgomp.oacc-c++/pr71959-aux.cc: New.
	* testsuite/libgomp.oacc-c++/pr71959.C: New.

Co-Authored-By: Julian Brown <julian@codesourcery.com>

From-SVN: r267806
2019-01-10 12:32:03 +00:00
Stefan Agner
ae8792cb3b ARM: fix -masm-syntax-unified (PR88648)
This allows to use unified asm syntax when compiling for the
ARM instruction. This matches documentation and seems what the
initial patch was intended doing when the flag got added.

2019-01-10  Stefan Agner  <stefan@agner.ch>

	PR target/88648
	* config/arm/arm.c (arm_option_override_internal): Force
	opts->x_inline_asm_unified to true only if TARGET_THUMB2_P.

	* gcc.target/arm/pr88648-asm-syntax-unified.c: Add test to
	check if -masm-syntax-unified gets applied properly.

From-SVN: r267804
2019-01-10 11:36:42 +00:00
Jonathan Wakely
7c4979b2b2 Include name of test in filesystem-test.XXXXXX filenames
Also fix some tests that were not cleaning up after themselves, as
identified by the change to nonexistent_path.

	* testsuite/util/testsuite_fs.h (nonexistent_path): Include name
	of the source file containing the caller.
	* testsuite/27_io/filesystem/iterators/directory_iterator.cc: Remove
	directories created by test.
	* testsuite/27_io/filesystem/iterators/recursive_directory_iterator.cc:
	Likewise.
	* testsuite/experimental/filesystem/iterators/directory_iterator.cc:
	Likewise.
	* testsuite/experimental/filesystem/iterators/
	recursive_directory_iterator.cc: Likewise.

From-SVN: r267801
2019-01-10 11:12:00 +00:00
Jakub Jelinek
6cdf1946f6 re PR tree-optimization/88775 (Optimize std::string assignment)
PR tree-optimization/88775
	* include/bits/stl_function.h (greater<_Tp*>::operator(),
	less<_Tp*>::operator(), greater_equal<_Tp*>::operator(),
	less_equal<_Tp*>::operator()): Use __builtin_is_constant_evaluated
	instead of __builtin_constant_p if available.  Don't bother with
	the pointer comparison in C++11 and earlier.

From-SVN: r267800
2019-01-10 11:56:56 +01:00
Jakub Jelinek
dbf02a2cd6 re PR c/88568 ('dllimport' no longer implies 'extern' in C)
PR c/88568
	* attribs.c (handle_dll_attribute): Clear TREE_STATIC after setting
	DECL_EXTERNAL.

	* gcc.dg/pr88568.c: New test.

From-SVN: r267799
2019-01-10 11:44:46 +01:00
Eric Botcazou
aa6c5afeb2 Fix formatting
From-SVN: r267797
2019-01-10 07:21:35 +00:00
Tamar Christina
c2b7062d58 arm-builtins.c (enum arm_type_qualifiers): Add qualifier_lane_pair_index.
2019-01-10  Tamar Christina  <tamar.christina@arm.com>

	* config/arm/arm-builtins.c
	(enum arm_type_qualifiers): Add qualifier_lane_pair_index.
	(MAC_LANE_PAIR_QUALIFIERS): New.
	(arm_expand_builtin_args): Use it.
	(arm_expand_builtin_1): Likewise.
	* config/arm/arm-protos.h (neon_vcmla_lane_prepare_operands): New.
	* config/arm/arm.c (neon_vcmla_lane_prepare_operands): New.
	* config/arm/arm-c.c (arm_cpu_builtins): Add __ARM_FEATURE_COMPLEX.
	* config/arm/arm_neon.h:
	(vcadd_rot90_f16): New.
	(vcaddq_rot90_f16): New.
	(vcadd_rot270_f16): New.
	(vcaddq_rot270_f16): New.
	(vcmla_f16): New.
	(vcmlaq_f16): New.
	(vcmla_lane_f16): New.
	(vcmla_laneq_f16): New.
	(vcmlaq_lane_f16): New.
	(vcmlaq_laneq_f16): New.
	(vcmla_rot90_f16): New.
	(vcmlaq_rot90_f16): New.
	(vcmla_rot90_lane_f16): New.
	(vcmla_rot90_laneq_f16): New.
	(vcmlaq_rot90_lane_f16): New.
	(vcmlaq_rot90_laneq_f16): New.
	(vcmla_rot180_f16): New.
	(vcmlaq_rot180_f16): New.
	(vcmla_rot180_lane_f16): New.
	(vcmla_rot180_laneq_f16): New.
	(vcmlaq_rot180_lane_f16): New.
	(vcmlaq_rot180_laneq_f16): New.
	(vcmla_rot270_f16): New.
	(vcmlaq_rot270_f16): New.
	(vcmla_rot270_lane_f16): New.
	(vcmla_rot270_laneq_f16): New.
	(vcmlaq_rot270_lane_f16): New.
	(vcmlaq_rot270_laneq_f16): New.
	(vcadd_rot90_f32): New.
	(vcaddq_rot90_f32): New.
	(vcadd_rot270_f32): New.
	(vcaddq_rot270_f32): New.
	(vcmla_f32): New.
	(vcmlaq_f32): New.
	(vcmla_lane_f32): New.
	(vcmla_laneq_f32): New.
	(vcmlaq_lane_f32): New.
	(vcmlaq_laneq_f32): New.
	(vcmla_rot90_f32): New.
	(vcmlaq_rot90_f32): New.
	(vcmla_rot90_lane_f32): New.
	(vcmla_rot90_laneq_f32): New.
	(vcmlaq_rot90_lane_f32): New.
	(vcmlaq_rot90_laneq_f32): New.
	(vcmla_rot180_f32): New.
	(vcmlaq_rot180_f32): New.
	(vcmla_rot180_lane_f32): New.
	(vcmla_rot180_laneq_f32): New.
	(vcmlaq_rot180_lane_f32): New.
	(vcmlaq_rot180_laneq_f32): New.
	(vcmla_rot270_f32): New.
	(vcmlaq_rot270_f32): New.
	(vcmla_rot270_lane_f32): New.
	(vcmla_rot270_laneq_f32): New.
	(vcmlaq_rot270_lane_f32): New.
	(vcmlaq_rot270_laneq_f32): New.
	* config/arm/arm_neon_builtins.def (vcadd90, vcadd270, vcmla0, vcmla90,
	vcmla180, vcmla270, vcmla_lane0, vcmla_lane90, vcmla_lane180, vcmla_lane270,
	vcmla_laneq0, vcmla_laneq90, vcmla_laneq180, vcmla_laneq270,
	vcmlaq_lane0, vcmlaq_lane90, vcmlaq_lane180, vcmlaq_lane270): New.
	* config/arm/neon.md (neon_vcmla_lane<rot><mode>,
	neon_vcmla_laneq<rot><mode>, neon_vcmlaq_lane<rot><mode>): New.
	* config/arm/arm.c (arm_arch8_3, arm_arch8_4): New.
	* config/arm/arm.h (TARGET_COMPLEX, arm_arch8_3, arm_arch8_4): New.
	(arm_option_reconfigure_globals): Use them.
	* config/arm/iterators.md (VDF, VQ_HSF): New.
	(VCADD, VCMLA): New.
	(VF_constraint, rot, rotsplit1, rotsplit2): Add V4HF and V8HF.
	* config/arm/neon.md (neon_vcadd<rot><mode>, neon_vcmla<rot><mode>): New.
	* config/arm/unspecs.md (UNSPEC_VCADD90, UNSPEC_VCADD270,
	UNSPEC_VCMLA, UNSPEC_VCMLA90, UNSPEC_VCMLA180, UNSPEC_VCMLA270): New.

gcc/testsuite/ChangeLog:

2019-01-10  Tamar Christina  <tamar.christina@arm.com>

	* gcc.target/aarch64/advsimd-intrinsics/vector-complex.c: Add AArch32 regexpr.
	* gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c: Likewise.

From-SVN: r267796
2019-01-10 03:34:06 +00:00
Tamar Christina
9d63f43b2d aarch64-builtins.c (enum aarch64_type_qualifiers): Add qualifier_lane_pair_index.
gcc/ChangeLog:

2019-01-10  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers): Add qualifier_lane_pair_index.
	(emit-rtl.h): Include.
	(TYPES_QUADOP_LANE_PAIR): New.
	(aarch64_simd_expand_args): Use it.
	(aarch64_simd_expand_builtin): Likewise.
	(AARCH64_SIMD_FCMLA_LANEQ_BUILTINS, aarch64_fcmla_laneq_builtin_datum): New.
	(FCMLA_LANEQ_BUILTIN, AARCH64_SIMD_FCMLA_LANEQ_BUILTIN_BASE,
	AARCH64_SIMD_FCMLA_LANEQ_BUILTINS, aarch64_fcmla_lane_builtin_data,
	aarch64_init_fcmla_laneq_builtins, aarch64_expand_fcmla_builtin): New.
	(aarch64_init_builtins): Add aarch64_init_fcmla_laneq_builtins.
	(aarch64_expand_buildin): Add AARCH64_SIMD_BUILTIN_FCMLA_LANEQ0_V2SF,
	AARCH64_SIMD_BUILTIN_FCMLA_LANEQ90_V2SF, AARCH64_SIMD_BUILTIN_FCMLA_LANEQ180_V2SF,
 	AARCH64_SIMD_BUILTIN_FCMLA_LANEQ2700_V2SF, AARCH64_SIMD_BUILTIN_FCMLA_LANEQ0_V4HF,
	AARCH64_SIMD_BUILTIN_FCMLA_LANEQ90_V4HF, AARCH64_SIMD_BUILTIN_FCMLA_LANEQ180_V4HF,
	AARCH64_SIMD_BUILTIN_FCMLA_LANEQ270_V4HF.
	* config/aarch64/iterators.md (FCMLA_maybe_lane): New.
	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add __ARM_FEATURE_COMPLEX.
	* config/aarch64/aarch64-simd-builtins.def (fcadd90, fcadd270, fcmla0, fcmla90,
	fcmla180, fcmla270, fcmla_lane0, fcmla_lane90, fcmla_lane180, fcmla_lane270,
	fcmla_laneq0, fcmla_laneq90, fcmla_laneq180, fcmla_laneq270,
	fcmlaq_lane0, fcmlaq_lane90, fcmlaq_lane180, fcmlaq_lane270): New.
	* config/aarch64/aarch64-simd.md (aarch64_fcmla_lane<rot><mode>,
	aarch64_fcmla_laneq<rot>v4hf, aarch64_fcmlaq_lane<rot><mode>,aarch64_fcadd<rot><mode>,
	aarch64_fcmla<rot><mode>): New.
	* config/aarch64/arm_neon.h:
	(vcadd_rot90_f16): New.
	(vcaddq_rot90_f16): New.
	(vcadd_rot270_f16): New.
	(vcaddq_rot270_f16): New.
	(vcmla_f16): New.
	(vcmlaq_f16): New.
	(vcmla_lane_f16): New.
	(vcmla_laneq_f16): New.
	(vcmlaq_lane_f16): New.
	(vcmlaq_rot90_lane_f16): New.
	(vcmla_rot90_laneq_f16): New.
	(vcmla_rot90_lane_f16): New.
	(vcmlaq_rot90_f16): New.
	(vcmla_rot90_f16): New.
	(vcmlaq_laneq_f16): New.
	(vcmla_rot180_laneq_f16): New.
	(vcmla_rot180_lane_f16): New.
	(vcmlaq_rot180_f16): New.
	(vcmla_rot180_f16): New.
	(vcmlaq_rot90_laneq_f16): New.
	(vcmlaq_rot270_laneq_f16): New.
	(vcmlaq_rot270_lane_f16): New.
	(vcmla_rot270_laneq_f16): New.
	(vcmlaq_rot270_f16): New.
	(vcmla_rot270_f16): New.
	(vcmlaq_rot180_laneq_f16): New.
	(vcmlaq_rot180_lane_f16): New.
	(vcmla_rot270_lane_f16): New.
	(vcadd_rot90_f32): New.
	(vcaddq_rot90_f32): New.
	(vcaddq_rot90_f64): New.
	(vcadd_rot270_f32): New.
	(vcaddq_rot270_f32): New.
	(vcaddq_rot270_f64): New.
	(vcmla_f32): New.
	(vcmlaq_f32): New.
	(vcmlaq_f64): New.
	(vcmla_lane_f32): New.
	(vcmla_laneq_f32): New.
	(vcmlaq_lane_f32): New.
	(vcmlaq_laneq_f32): New.
	(vcmla_rot90_f32): New.
	(vcmlaq_rot90_f32): New.
	(vcmlaq_rot90_f64): New.
	(vcmla_rot90_lane_f32): New.
	(vcmla_rot90_laneq_f32): New.
	(vcmlaq_rot90_lane_f32): New.
	(vcmlaq_rot90_laneq_f32): New.
	(vcmla_rot180_f32): New.
	(vcmlaq_rot180_f32): New.
	(vcmlaq_rot180_f64): New.
	(vcmla_rot180_lane_f32): New.
	(vcmla_rot180_laneq_f32): New.
	(vcmlaq_rot180_lane_f32): New.
	(vcmlaq_rot180_laneq_f32): New.
	(vcmla_rot270_f32): New.
	(vcmlaq_rot270_f32): New.
	(vcmlaq_rot270_f64): New.
	(vcmla_rot270_lane_f32): New.
	(vcmla_rot270_laneq_f32): New.
	(vcmlaq_rot270_lane_f32): New.
	(vcmlaq_rot270_laneq_f32): New.
	* config/aarch64/aarch64.h (TARGET_COMPLEX): New.
	* config/aarch64/iterators.md (UNSPEC_FCADD90, UNSPEC_FCADD270,
	UNSPEC_FCMLA, UNSPEC_FCMLA90, UNSPEC_FCMLA180, UNSPEC_FCMLA270): New.
	(FCADD, FCMLA): New.
	(rot): New.
	* config/arm/types.md (neon_fcadd, neon_fcmla): New.

gcc/testsuite/ChangeLog:

2019-01-10  Tamar Christina  <tamar.christina@arm.com>

	* gcc.target/aarch64/advsimd-intrinsics/vector-complex.c: New test.
	* gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c: New test.

From-SVN: r267795
2019-01-10 03:30:59 +00:00