[gcc]
2016-08-01 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
Add support for vec_extract on vector float, vector int, vector
short, and vector char vector types.
* config/rs6000/rs6000.c (rs6000_expand_vector_extract): Add
vector float, vector int, vector short, and vector char
optimizations on 64-bit ISA 2.07 systems for both constant and
variable element numbers.
(rs6000_split_vec_extract_var): Likewise.
* config/rs6000/vsx.md (vsx_xscvspdp_scalar2): Allow SFmode to be
Altivec registers on ISA 2.07 and above.
(vsx_extract_v4sf): Delete alternative that hard coded element 0,
which never was matched due to the split occuring before register
allocation (and the code would not have worked on little endian
systems if it did match). Allow extracts to go to the Altivec
registers if ISA 2.07 (power8). Change from using "" around the
C++ code to using {}'s.
(vsx_extract_v4sf_<mode>_load): New insn to optimize vector float
vec_extracts when the vector is in memory.
(vsx_extract_v4sf_var): New insn to optimize vector float
vec_extracts when the element number is variable on 64-bit ISA
2.07 systems.
(vsx_extract_<mode>, VSX_EXTRACT_I iterator): Add optimizations
for 64-bit ISA 2.07 as well as ISA 3.0.
(vsx_extract_<mode>_p9, VSX_EXTRACT_I iterator): Likewise.
(vsx_extract_<mode>_p8, VSX_EXTRACT_I iterator): Likewise.
(vsx_extract_<mode>_load, VSX_EXTRACT_I iterator): New insn to
optimize vector int, vector short, and vector char vec_extracts
when the vector is in memory.
(vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): New insn to
optimize vector int, vector short, and vector char vec_extracts
when the element number is variable.
[gcc/testsuite]
2016-08-01 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/vec-extract-5.c: New tests to test
vec_extract for vector float, vector int, vector short, and vector
char.
* gcc.target/powerpc/vec-extract-6.c: Likewise.
* gcc.target/powerpc/vec-extract-7.c: Likewise.
* gcc.target/powerpc/vec-extract-8.c: Likewise.
* gcc.target/powerpc/vec-extract-9.c: Likewise.
From-SVN: r238971
This patch optimizes the prolog and epilog code to reduce the number of
instructions and avoid multiple writes to SP. The key idea is that epilogs
are almost exact reverses of prologs, and thus all the decisions only need
to be taken once. The frame layout is decided in aarch64_layout_frame()
and decisions recorded in the new aarch64_frame fields initial_adjust,
callee_adjust, callee_offset and final_adjust.
A generic frame setup consists of 5 basic steps:
1. sub sp, sp, initial_adjust
2. stp reg1, reg2, [sp, -callee_adjust]! (push if callee_adjust != 0)
3. add fp, sp, callee_offset (if frame_pointer_needed)
4. stp reg3, reg4, [sp, callee_offset + N*16] (store remaining callee-saves)
5. sub sp, sp, final_adjust
The epilog reverses this, and may omit step 3 if alloca wasn't used.
gcc/
* config/aarch64/aarch64.h (aarch64_frame):
Remove padding0 and hardfp_offset. Add locals_offset,
initial_adjust, callee_adjust, callee_offset and final_adjust.
* config/aarch64/aarch64.c (aarch64_layout_frame):
Remove unused padding0 and hardfp_offset initializations.
Choose frame layout and set frame variables accordingly.
Use INVALID_REGNUM instead of FIRST_PSEUDO_REGISTER.
(aarch64_push_regs): Use INVALID_REGNUM, not FIRST_PSEUDO_REGISTER.
(aarch64_pop_regs): Likewise.
(aarch64_expand_prologue): Remove all decision code, just emit
prolog according to frame variables.
(aarch64_expand_epilogue): Remove all decision code, just emit
epilog according to frame variables.
(aarch64_initial_elimination_offset): Use offset to local/arg area.
testsuite/
* gcc.target/aarch64/test_frame_10.c: Fix test to check for a
single stack adjustment, no writeback.
* gcc.target/aarch64/test_frame_12.c: Likewise.
* gcc.target/aarch64/test_frame_13.c: Likewise.
* gcc.target/aarch64/test_frame_15.c: Likewise.
* gcc.target/aarch64/test_frame_6.c: Likewise.
* gcc.target/aarch64/test_frame_7.c: Likewise.
* gcc.target/aarch64/test_frame_8.c: Likewise.
* gcc.target/aarch64/test_frame_16.c: New test.
From-SVN: r238960
* constexpr.c (cxx_eval_pointer_plus_expression): Check constancy
of nelts.
* cp-gimplify.c (cp_fully_fold): Only maybe_constant_value in
C++11 and up.
From-SVN: r238957
TImode register referenced in debug insn can be converted to V1TImode by
scalar to vector optimization. When converting a TImode store to V1TImode,
we need to check all debug insns on its use chain to convert the V1TImode
register to SUBREG TImode if source register is undefined.
gcc/
PR target/72748
* config/i386/i386.c (timode_scalar_chain::convert_insn): Call
fix_debug_reg_uses after changing source register mode to
V1TImode if source register is undefined.
gcc/testsuite/
PR target/72748
* gcc.target/i386/pr72748.c: New test.
From-SVN: r238956
* testsuite/20_util/tuple/cons/66338.cc: Limit test to C++11 and
later.
* testsuite/20_util/tuple/cons/element_accepts_anything_byval.cc:
Likewise.
From-SVN: r238945
* testsuite/27_io/ios_base/types/fmtflags/case_label.cc: Make test
supported for C++11 and later.
* testsuite/27_io/ios_base/types/iostate/case_label.cc: Likewise.
* testsuite/27_io/ios_base/types/openmode/case_label.cc: Likewise.
From-SVN: r238939
* config/aarch64/aarch64.c (aarch64_classify_address): Use DImode when
performing aarch64_offset_7bit_signed_scaled_p check for TImode LDP/STP
addresses.
* gcc.target/aarch64/ldp_stp_unaligned_1.c: New test.
From-SVN: r238938
* testsuite/28_regex/basic_regex/ctors/basic/raw_string.cc: Fix
test to not rely on GNU extension (escaped normal characters in POSIX
BRE). Enable tests for other strings which are now supported.
From-SVN: r238926
* lib/target-supports.exp (check_effective_target_c): Fix indentation.
(check_effective_target_c++): Likewise. Also match for libstdc++.
From-SVN: r238916
2016-07-30 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/41922
* target-memory.c (expr_to_char): Pass in locus and use it in error
messages.
(gfc_merge_initializers): Ditto.
* target-memory.h: Update prototype for gfc_merge_initializers ().
* trans-common.c (get_init_field): Use the correct locus.
2016-07-30 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/41922
* gfortran.dg/equiv_constraint_5.f90: Adjust the error message.
* gfortran.dg/equiv_constraint_7.f90: Ditto.
* gfortran.dg/pr41922.f90: New test.
From-SVN: r238915
