* tree-vect-stmts.c (vectorizable_load): For SLP without
permutation treat the first load of the node as the first
element in its interleaving chain.
* tree-vect-slp.c (vect_get_and_check_slp_defs): Swap the
operands if necessary and possible.
(vect_build_slp_tree): Add new argument. Allow load groups of
any size in basic blocks. Keep all the loads for further
permutation check. Use the new argument to determine if there
is a permutation. Update the recursive calls.
(vect_supported_load_permutation_p): Allow subchains of
interleaving chains in basic block vectorization.
(vect_analyze_slp_instance): Update the call to
vect_build_slp_tree. Check load permutation based on the new
parameter.
(vect_schedule_slp_instance): Don't start from the first element
in interleaving chain unless the loads are permuted.
From-SVN: r180055
/cp
2011-10-15 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/50732
* semantics.c (finish_trait_expr): Do not try to instantiate the
the base type of an __is_base_of trait.
(check_trait_type): Return a tree; use complete_type_or_else.
/testsuite
2011-10-15 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/50732
* g++.dg/ext/is_base_of_incomplete.C: New.
* g++.dg/ext/is_base_of_diagnostic.C: Adjust dg-errors.
* g++.dg/ext/unary_trait_incomplete.C: Likewise.
From-SVN: r180048
* tree-vect-slp.c: Include langhooks.h.
(vect_create_mask_and_perm): Emit VEC_PERM_EXPR, not a builtin.
(vect_transform_slp_perm_load): Use can_vec_perm_expr_p. Simplify
mask creation for VEC_PERM_EXPR.
* tree-vect-stmts.c (perm_mask_for_reverse): Return the mask,
not the builtin.
(reverse_vec_elements): Emit VEC_PERM_EXPR not a builtin.
* Makefile.in (tree-vect-slp.o): Update dependency.
* optabs.c (can_vec_perm_expr_p): Allow NULL as unknown constant.
From-SVN: r180047
PR rtl-optimization/49941
* jump.c (mark_jump_label_1): Set JUMP_LABEL for simple_return jumps.
* rtl.h (set_return_jump_label): Declare.
* function.c (set_return_jump_label): New function, extracted..
(thread_prologue_and_epilogue_insns): ..from here. Use it in
another instance to set return jump_label.
* cfgrtl.c (force_nonfallthru_and_redirect): Use set_return_jump_label.
* reorg.c (find_end_label): Likewise.
From-SVN: r180027
2011-10-15 Nicolas Roche <roche@adacore.com>
* gcc-interface/lang-specs.h: Ensure -mrtp switch is passed when using
either rtp-smp or ravenscar-cert-rtp runtimes.
From-SVN: r180026
2011-10-15 Bob Duff <duff@adacore.com>
* exp_ch6.adb (Add_Unconstrained_Actuals_To_Build_In_Place_Call):
Do not create a pool formal on unless RE_Root_Storage_Pool_Ptr
is available.
(Expand_N_Extended_Return_Statement): Do not create a renaming of the
build-in-place pool parameter unless RE_Root_Storage_Pool_Ptr is
available.
(Make_Build_In_Place_Call_In_Allocator): Add the user-defined
pool only if RE_Root_Storage_Pool_Ptr is available.
(Make_Build_In_Place_Call_In_Object_Declaration): Do not add a
pool actual unless RE_Root_Storage_Pool_Ptr is available.
* sem_ch6.adb (Create_Extra_Formals): Add build-in-place pool
formal only if RE_Root_Storage_Pool_Ptr is available.
2011-10-15 Matthew Heaney <heaney@adacore.com>
* a-cusyqu.ads, a-cbsyqu.ads, a-cuprqu.ads, a-cbprqu.ads (Queue
type): Specify Priority aspect for protected type.
From-SVN: r180025
* config/sparc/sol2.h: Protect -m{cpu,tune}=native handling
with a more complete cpp test.
* config/sparc/linux64.h: Likewise.
* config/sparc/linux.h: Likewise.
* config/sparc/sparc.opt (sparc_debug): New target variable.
(mdebug): New target option.
* config/sparc/sparc.h (MASK_DEBUG_OPTIONS, MASK_DEBUG_ALL,
TARGET_DEBUG_OPTIONS): New defines.
* config/sparc/sparc.c (debug_target_flag_bits,
debug_target_flags): New functions.
(sparc_option_override): Add name strings back to cpu_table[].
Parse -mdebug string. When TARGET_DEBUG_OPTIONS is true, print
out the target flags before and after override processing as well
as the selected cpu. If MASK_V8PLUS, make sure that the selected
cpu is at least v9.
From-SVN: r180021
PR target/49263
* config/sh/sh.h (ZERO_EXTRACT_ANDMASK): New macro.
* config/sh/sh.c (sh_rtx_costs): Add test instruction case.
* config/sh/sh.md (tstsi_t): Name existing insn. Make inner
and instruction commutative.
(tsthi_t, tstqi_t, tstqi_t_zero, tstsi_t_and_not,
tstsi_t_zero_extract_eq, tstsi_t_zero_extract_xor,
tstsi_t_zero_extract_subreg_xor_little,
tstsi_t_zero_extract_subreg_xor_big): New insns.
(*movsicc_t_false, *movsicc_t_true): Replace space with tab in
asm output.
(*andsi_compact): Reorder alternatives so that K08 is considered
first.
* gcc.target/sh/pr49263.c: New.
From-SVN: r180020
PR target/50354
* config/sparc/linux64.h (TARGET_DEFAULT): Only override if the default
processor is at least V9 and TARGET_64BIT_DEFAULT is defined.
From-SVN: r180013
* gimplify.c (gimplify_expr): Take care that for bitwise-binary
transformation the operands have compatible types.
* gfortran.fortran-torture/compile/logical-2.f90: New test.
From-SVN: r180006
* config/i386/sse.md (vec_widen_smult_hi_v8hi,
vec_widen_smult_lo_v8hi, vec_widen_umult_hi_v8hi,
vec_widen_umult_lo_v8hi): Macroize using VI2_AVX2
mode iterator and any_extend code iterator.
(vec_widen_<s>mult_hi_v8si, vec_widen_<s>mult_lo_v8si): New
expanders.
(vec_widen_smult_hi_v4si, vec_widen_smult_lo_v4si): Enable
also for TARGET_SSE4_1 using pmuldq insn.
(sdot_prodv8hi): Macroize using VI2_AVX2 iterator.
(sse2_sse4_1): New code attr.
(udot_prodv4si): Macroize using any_extend code iterator.
(<s>dot_prodv8si): New expander.
* gcc.target/i386/sse2-mul-1.c: New test.
* gcc.target/i386/sse4_1-mul-1.c: New test.
* gcc.target/i386/avx-mul-1.c: New test.
* gcc.target/i386/xop-mul-1.c: New test.
* gcc.target/i386/avx2-mul-1.c: New test.
From-SVN: r180005
PR target/46278
* doc/invoke.texi (AVR Options): Document -mstrict-X.
* config/avr/avr.opt (-mstrict-X): New option.
(avr_strict_X): New variable reflecting -mstrict-X.
* config/avr/avr.c (avr_reg_ok_for_addr_p): Add parameter
outer_code and pass it down to avr_regno_mode_code_ok_for_base_p.
(avr_legitimate_address_p): Pass outer_code to
avr_reg_ok_for_addr_p and use that function in case PLUS.
(avr_mode_code_base_reg_class): Depend on avr_strict_X.
(avr_regno_mode_code_ok_for_base_p): Ditto, and depend on outer_code.
(avr_option_override): Disable -fcaller-saves if -mstrict-X is on.
From-SVN: r179993
2011-10-14 Ed Schonberg <schonberg@adacore.com>
* exp_disp.adb (Check_Premature_Freezing): If an untagged type
is a generic actual, it is a subtype of a type that was frozen
by the instantiation, and even if not marked frozen it does not
affect the construction of the dispatch table.
2011-10-14 Robert Dewar <dewar@adacore.com>
* make.adb, mlib-utl.adb, sem_util.adb, sem_ch4.adb: Minor code
reformatting.
* s-rident.ads: Add missing Compiler_Unit pragma.
From-SVN: r179989
* config/i386/sse.md (mulv2di3): Macroize using VI8_AVX2
iterator.
(ashl<mode>3): Use VI248_AVX2 iterator instead of VI248_128.
Use <sseinsnmode> instead of TI in mode attr.
From-SVN: r179987
2011-10-14 Gary Dismukes <dismukes@adacore.com>
* sem_res.adb: Minor reformatting.
2011-10-14 Hristian Kirtchev <kirtchev@adacore.com>
* exp_ch6.adb (Add_Task_Actuals_To_Build_In_Place_Call):
Code and comment reformatting. Use BIP_Task_Master
when creating a _master.
(BIP_Formal_Suffix): Code reformatting. Correct the case for
BIP_Task_Master.
(Make_Build_In_Place_Call_In_Object_Declaration): Use
BIP_Task_Master when creating a reference to the enclosing
function's _master formal.
(Move_Activation_Chain): Use BIP_Task_Master when creating a reference
to the _master.
* exp_ch6.ads: Change BIP_Master to BIP_Task_Master.
(Needs_BIP_Finalization_Master): Alphabetized.
* sem_ch6.adb (Create_Extra_Formals): Update the usage of
BIP_Task_Master.
2011-10-14 Ed Schonberg <schonberg@adacore.com>
* par-ch6.adb (P_Return_Object_Declaration): In Ada 2012 mode,
reject an aliased keyword on the object declaration of an extended
return statement. In older versions of the language indicate
that this is illegal in the standard.
2011-10-14 Pascal Obry <obry@adacore.com>
* sem_util.adb, sem_ch4.adb: Minor reformatting.
2011-10-14 Ed Schonberg <schonberg@adacore.com>
* sem_ch13.adb: Recognize properly procedure calls that are
transformed into code statements.
2011-10-14 Vincent Celier <celier@adacore.com>
* projects.texi: Minor fix in project example.
From-SVN: r179986
2011-10-14 Ed Schonberg <schonberg@adacore.com>
* sem_util.adb: Return objects are aliased if their type is
immutably limited as per AI05-0053.
2011-10-14 Gary Dismukes <dismukes@adacore.com>
* exp_ch4.adb (Expand_N_Op_And): Remove Short_Circuit_And_Or
expansion code (moved to sem_res) (Expand_N_Op_Or): Remove
Short_Circuit_And_Or expansion code (moved to sem_res).
* sem_res.adb (Resolve_Logical_Op): Add code to rewrite Boolean
"and" and "or" operators as short-circuit "and then" and "or
else", when pragma Short_Circuit_And_Or is active.
From-SVN: r179985
/cp
2011-10-14 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/38174
* call.c (add_builtin_candidate): If two pointers have a composite
pointer type, generate a single candidate with that type.
/testsuite
2011-10-14 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/38174
* g++.dg/overload/operator4.C: New.
From-SVN: r179984
gcc/testsuite/
2011-10-14 David Alan Gilbert <david.gilbert@linaro.org>
* gcc.dg/di-longlong64-sync-1.c: New test.
* gcc.dg/di-sync-multithread.c: New test.
* gcc.target/arm/di-longlong64-sync-withhelpers.c: New test.
* gcc.target/arm/di-longlong64-sync-withldrexd.c: New test.
* lib/target-supports.exp: (arm_arch_*_ok): Series of effective-target
tests for v5, v6, v6k, and v7-a, and add-options helpers.
(check_effective_target_arm_arm_ok): New helper.
(check_effective_target_sync_longlong): New helper.
From-SVN: r179983
gcc/
2011-10-14 David Alan Gilbert <david.gilbert@linaro.org>
* config/arm/linux-atomic-64bit.c: New (based on linux-atomic.c).
* config/arm/linux-atomic.c: Change comment to point to 64bit version.
(SYNC_LOCK_RELEASE): Instantiate 64bit version.
* config/arm/t-linux-eabi: Pull in linux-atomic-64bit.c.
From-SVN: r179982
gcc/
2011-10-14 David Alan Gilbert <david.gilbert@linaro.org>
* config/arm/arm.c (arm_output_ldrex): Support ldrexd.
(arm_output_strex): Support strexd.
(arm_output_it): New helper to output it in Thumb2 mode only.
(arm_output_sync_loop): Support DI mode. Change comment to
not support const_int.
(arm_expand_sync): Support DI mode.
* config/arm/arm.h (TARGET_HAVE_LDREXBHD): Split into LDREXBH
and LDREXD.
* config/arm/iterators.md (NARROW): move from sync.md.
(QHSD): New iterator for all current ARM integer modes.
(SIDI): New iterator for SI and DI modes only.
* config/arm/sync.md (sync_predtab): New mode_attr.
(sync_compare_and_swapsi): Fold into sync_compare_and_swap<mode>.
(sync_lock_test_and_setsi): Fold into sync_lock_test_and_setsi<mode>.
(sync_<sync_optab>si): Fold into sync_<sync_optab><mode>.
(sync_nandsi): Fold into sync_nand<mode>.
(sync_new_<sync_optab>si): Fold into sync_new_<sync_optab><mode>.
(sync_new_nandsi): Fold into sync_new_nand<mode>.
(sync_old_<sync_optab>si): Fold into sync_old_<sync_optab><mode>.
(sync_old_nandsi): Fold into sync_old_nand<mode>.
(sync_compare_and_swap<mode>): Support SI & DI.
(sync_lock_test_and_set<mode>): Likewise.
(sync_<sync_optab><mode>): Likewise.
(sync_nand<mode>): Likewise.
(sync_new_<sync_optab><mode>): Likewise.
(sync_new_nand<mode>): Likewise.
(sync_old_<sync_optab><mode>): Likewise.
(sync_old_nand<mode>): Likewise.
(arm_sync_compare_and_swapsi): Turn into iterator on SI & DI.
(arm_sync_lock_test_and_setsi): Likewise.
(arm_sync_new_<sync_optab>si): Likewise.
(arm_sync_new_nandsi): Likewise.
(arm_sync_old_<sync_optab>si): Likewise.
(arm_sync_old_nandsi): Likewise.
(arm_sync_compare_and_swap<mode> NARROW): use sync_predtab, fix indent.
(arm_sync_lock_test_and_setsi<mode> NARROW): Likewise.
(arm_sync_new_<sync_optab><mode> NARROW): Likewise.
(arm_sync_new_nand<mode> NARROW): Likewise.
(arm_sync_old_<sync_optab><mode> NARROW): Likewise.
(arm_sync_old_nand<mode> NARROW): Likewise.
From-SVN: r179981
* gimple.c (walk_stmt_load_store_addr_ops): Call visit_addr
also on COND_EXPR/VEC_COND_EXPR comparison operands if they are
ADDR_EXPRs.
From-SVN: r179969