Commit Graph

168617 Commits

Author SHA1 Message Date
H.J. Lu 16ed2601ad i386: Emulate MMX pshufb with SSE version
Emulate MMX version of pshufb with SSE version by masking out the bit 3
of the shuffle control byte.  Only SSE register source operand is allowed.

	PR target/89021
	* config/i386/sse.md (ssse3_pshufbv8qi3): Changed to
	define_insn_and_split.  Also allow TARGET_MMX_WITH_SSE.  Add
	SSE emulation.

From-SVN: r271245
2019-05-15 08:26:19 -07:00
H.J. Lu 9c5a353334 i386: Emulate MMX ssse3_pmulhrswv4hi3 with SSE
Emulate MMX ssse3_pmulhrswv4hi3 with SSE.  Only SSE register source
operand is allowed.

	PR target/89021
	* config/i386/sse.md (ssse3_pmulhrswv4hi3): Require TARGET_MMX
	or TARGET_MMX_WITH_SSE.
	(*ssse3_pmulhrswv4hi3): Add SSE emulation.

From-SVN: r271244
2019-05-15 08:24:44 -07:00
H.J. Lu 6cbd0ef53a i386: Emulate MMX ssse3_pmaddubsw with SSE
Emulate MMX ssse3_pmaddubsw with SSE.  Only SSE register source operand
is allowed.

	PR target/89021
	* config/i386/sse.md (ssse3_pmaddubsw): Add SSE emulation.

From-SVN: r271243
2019-05-15 08:23:49 -07:00
H.J. Lu ea25b84870 i386: Emulate MMX ssse3_ph<plusminus_mnemonic>dv2si3 with SSE
Emulate MMX ssse3_ph<plusminus_mnemonic>dv2si3 with SSE by moving bits
64:95 to bits 32:63 in SSE register.  Only SSE register source operand
is allowed.

	PR target/89021
	* config/i386/sse.md (ssse3_ph<plusminus_mnemonic>dv2si3):
	Changed to define_insn_and_split to support SSE emulation.

From-SVN: r271242
2019-05-15 08:23:11 -07:00
H.J. Lu 2da47f31e3 i386: Emulate MMX ssse3_ph<plusminus_mnemonic>wv4hi3 with SSE
Emulate MMX ssse3_ph<plusminus_mnemonic>wv4hi3 with SSE by moving bits
64:95 to bits 32:63 in SSE register.  Only SSE register source operand
is allowed.

	PR target/89021
	* config/i386/sse.md (ssse3_ph<plusminus_mnemonic>wv4hi3):
	Changed to define_insn_and_split to support SSE emulation.

From-SVN: r271241
2019-05-15 08:22:39 -07:00
H.J. Lu 84791fca67 i386: Make _mm_empty () as NOP without MMX
With SSE emulation of MMX intrinsics, we should make _mm_empty () as NOP
without MMX.

	PR target/89021
	* config/i386/mmx.md (mmx_<emms>): Renamed to ...
	(*mmx_<emms>): This.
	(mmx_<emms>): New expander.

From-SVN: r271240
2019-05-15 08:22:08 -07:00
H.J. Lu 6624862302 i386: Emulate MMX umulv1siv1di3 with SSE2
Emulate MMX umulv1siv1di3 with SSE2.  Only SSE register source operand
is allowed.

	PR target/89021
	* config/i386/mmx.md (sse2_umulv1siv1di3): Add SSE emulation
	support.
	(*sse2_umulv1siv1di3): Add SSE2 emulation.

From-SVN: r271239
2019-05-15 08:21:39 -07:00
H.J. Lu 2ed7ae1641 i386: Emulate MMX movntq with SSE2 movntidi
Emulate MMX movntq with SSE2 movntidi.  Only register source operand is
allowed.

	PR target/89021
	* config/i386/mmx.md (sse_movntq): Add SSE2 emulation.

From-SVN: r271238
2019-05-15 08:21:04 -07:00
H.J. Lu 018a45bdf3 i386: Emulate MMX mmx_psadbw with SSE
Emulate MMX mmx_psadbw with SSE.  Only SSE register source operand is
allowed.

	PR target/89021
	* config/i386/mmx.md (mmx_psadbw): Add SSE emulation.

From-SVN: r271237
2019-05-15 08:20:28 -07:00
H.J. Lu d9d6e621ff i386: Emulate MMX mmx_uavgv4hi3 with SSE
Emulate MMX mmx_uavgv4hi3 with SSE.  Only SSE register source operand is
allowed.

	PR target/89021
	* config/i386/mmx.md (mmx_uavgv4hi3): Also check TARGET_MMX and
	TARGET_MMX_WITH_SSE.
	(*mmx_uavgv4hi3): Add SSE emulation.

From-SVN: r271236
2019-05-15 08:19:55 -07:00
H.J. Lu a899fa3501 i386: Emulate MMX mmx_uavgv8qi3 with SSE
Emulate MMX mmx_uavgv8qi3 with SSE.  Only SSE register source operand is
allowed.

	PR target/89021
	* config/i386/mmx.md (mmx_uavgv8qi3): Also check TARGET_MMX
	and TARGET_MMX_WITH_SSE.
	(*mmx_uavgv8qi3): Add SSE emulation.

From-SVN: r271235
2019-05-15 08:19:19 -07:00
H.J. Lu 55cd237908 i386: Emulate MMX maskmovq with SSE2 maskmovdqu
Emulate MMX maskmovq with SSE2 maskmovdqu for TARGET_MMX_WITH_SSE by
zero-extending source and mask operands to 128 bits.  Handle unmapped
bits 64:127 at memory address by adjusting source and mask operands
together with memory address.

	PR target/89021
	* config/i386/xmmintrin.h: Emulate MMX maskmovq with SSE2
	maskmovdqu for __MMX_WITH_SSE__.

From-SVN: r271234
2019-05-15 08:18:41 -07:00
H.J. Lu 9377b54a62 i386: Emulate MMX mmx_umulv4hi3_highpart with SSE
Emulate MMX mmx_umulv4hi3_highpart with SSE.  Only SSE register source
operand is allowed.

	PR target/89021
	* config/i386/mmx.md (mmx_umulv4hi3_highpart): Also check
	TARGET_MMX and TARGET_MMX_WITH_SSE.
	(*mmx_umulv4hi3_highpart): Add SSE emulation.

From-SVN: r271233
2019-05-15 08:17:25 -07:00
H.J. Lu 73371f6a70 i386: Emulate MMX mmx_pmovmskb with SSE
Emulate MMX mmx_pmovmskb with SSE by zero-extending result of SSE pmovmskb
from QImode to SImode.  Only SSE register source operand is allowed.

	PR target/89021
	* config/i386/mmx.md (mmx_pmovmskb): Changed to
	define_insn_and_split to support SSE emulation.

From-SVN: r271232
2019-05-15 08:16:27 -07:00
H.J. Lu 18184fdd76 i386: Emulate MMX V4HI smaxmin/V8QI umaxmin with SSE
Emulate MMX V4HI smaxmin/V8QI umaxmin with SSE.  Only SSE register source
operand is allowed.

	PR target/89021
	* config/i386/mmx.md (mmx_<code>v4hi3): Also check TARGET_MMX
	and TARGET_MMX_WITH_SSE.
	(mmx_<code>v8qi3): Likewise.
	(smaxmin:<code>v4hi3): New.
	(umaxmin:<code>v8qi3): Likewise.
	(smaxmin:*mmx_<code>v4hi3): Add SSE emulation.
	(umaxmin:*mmx_<code>v8qi3): Likewise.

From-SVN: r271231
2019-05-15 08:15:44 -07:00
H.J. Lu 42500d8355 i386: Emulate MMX mmx_pinsrw with SSE
Emulate MMX mmx_pinsrw with SSE.  Only SSE register destination operand
is allowed.

	PR target/89021
	* config/i386/mmx.md (mmx_pinsrw): Also check TARGET_MMX and
	TARGET_MMX_WITH_SSE.
	(*mmx_pinsrw): Add SSE emulation.

From-SVN: r271230
2019-05-15 08:14:03 -07:00
H.J. Lu f2c2a6fb1e i386: Emulate MMX mmx_pextrw with SSE
Emulate MMX mmx_pextrw with SSE.  Only SSE register source operand is
allowed.

	PR target/89021
	* config/i386/mmx.md (mmx_pextrw): Add SSE emulation.

From-SVN: r271229
2019-05-15 08:13:31 -07:00
H.J. Lu b7e97d9a81 i386: Emulate MMX sse_cvtpi2ps with SSE
Emulate MMX sse_cvtpi2ps with SSE2 cvtdq2ps, preserving upper 64 bits of
destination XMM register.  Only SSE register source operand is allowed.

	PR target/89021
	* config/i386/sse.md (sse_cvtpi2ps): Changed to
	define_insn_and_split.  Also allow TARGET_MMX_WITH_SSE.  Add
	SSE emulation.

From-SVN: r271228
2019-05-15 08:12:47 -07:00
H.J. Lu f3d6634ba3 i386: Emulate MMX sse_cvtps2pi/sse_cvttps2pi with SSE
Emulate MMX sse_cvtps2pi/sse_cvttps2pi with SSE.

	PR target/89021
	* config/i386/sse.md (sse_cvtps2pi): Add SSE emulation.
	(sse_cvttps2pi): Likewise.

From-SVN: r271227
2019-05-15 08:12:14 -07:00
H.J. Lu 3d34e8b0ea i386: Emulate MMX pshufw with SSE
Emulate MMX pshufw with SSE.  Only SSE register source operand is allowed.

	PR target/89021
	* config/i386/mmx.md (mmx_pshufw): Also check TARGET_MMX and
	TARGET_MMX_WITH_SSE.
	(mmx_pshufw_1): Add SSE emulation.
	(*vec_dupv4hi): Changed to define_insn_and_split and also allow
	TARGET_MMX_WITH_SSE to support SSE emulation.

From-SVN: r271226
2019-05-15 08:11:41 -07:00
H.J. Lu 74e299b929 i386: Emulate MMX vec_dupv2si with SSE
Emulate MMX vec_dupv2si with SSE.  Add the "Yw" constraint to allow
broadcast from integer register for AVX512BW with TARGET_AVX512VL.
Only SSE register source operand is allowed.

	PR target/89021
	* config/i386/constraints.md (Yw): New constraint.
	* config/i386/mmx.md (*vec_dupv2si): Changed to
	define_insn_and_split and also allow TARGET_MMX_WITH_SSE to
	support SSE emulation.

From-SVN: r271225
2019-05-15 08:11:07 -07:00
H.J. Lu 2629da8350 i386: Emulate MMX mmx_eq/mmx_gt<mode>3 with SSE
Emulate MMX mmx_eq/mmx_gt<mode>3 with SSE.  Only SSE register source
operand is allowed.

	PR target/89021
	* config/i386/mmx.md (mmx_eq<mode>3): Also allow
	TARGET_MMX_WITH_SSE.
	(*mmx_eq<mode>3): Also allow TARGET_MMX_WITH_SSE.  Add SSE
	support.
	(mmx_gt<mode>3): Likewise.

From-SVN: r271224
2019-05-15 08:10:32 -07:00
H.J. Lu df0e1979a8 i386: Emulate MMX mmx_andnot<mode>3 with SSE
Emulate MMX mmx_andnot<mode>3 with SSE.  Only SSE register source operand
is allowed.

	PR target/89021
	* config/i386/mmx.md (mmx_andnot<mode>3): Also allow
	TARGET_MMX_WITH_SSE.  Add SSE support.

From-SVN: r271223
2019-05-15 08:09:50 -07:00
H.J. Lu fff6304f52 i386: Emulate MMX <any_logic><mode>3 with SSE
Emulate MMX <any_logic><mode>3 with SSE.  Only SSE register source
operand is allowed.

	PR target/89021
	* config/i386/mmx.md (any_logic:mmx_<code><mode>3): Also allow
	TARGET_MMX_WITH_SSE.
	(any_logic:<code><mode>3): New.
	(any_logic:*mmx_<code><mode>3): Also allow TARGET_MMX_WITH_SSE.
	Add SSE support.

From-SVN: r271222
2019-05-15 08:09:19 -07:00
H.J. Lu 5d48867be5 i386: Emulate MMX ashr<mode>3/<shift_insn><mode>3 with SSE
Emulate MMX ashr<mode>3/<shift_insn><mode>3 with SSE.  Only SSE register
source operand is allowed.

	PR target/89021
	* config/i386/mmx.md (mmx_ashr<mode>3): Also allow
	TARGET_MMX_WITH_SSE.  Add SSE emulation.
	(mmx_<shift_insn><mode>3): Likewise.
	(ashr<mode>3): New.
	(<shift_insn><mode>3): Likewise.

From-SVN: r271221
2019-05-15 08:08:38 -07:00
H.J. Lu d0e9bf2a6d i386: Emulate MMX mmx_pmaddwd with SSE
Emulate MMX pmaddwd with SSE.  Only SSE register source operand is
allowed.

	PR target/89021
	* config/i386/mmx.md (mmx_pmaddwd): Also allow TARGET_MMX_WITH_SSE.
	(*mmx_pmaddwd): Also allow TARGET_MMX_WITH_SSE.  Add SSE support.

From-SVN: r271220
2019-05-15 08:08:04 -07:00
H.J. Lu 3fdce4b1ef i386: Emulate MMX smulv4hi3_highpart with SSE
Emulate MMX mulv4hi3 with SSE.  Only SSE register source operand is
allowed.

	PR target/89021
	* config/i386/mmx.md (mmx_smulv4hi3_highpart): Also allow
	TARGET_MMX_WITH_SSE.
	(*mmx_smulv4hi3_highpart): Also allow TARGET_MMX_WITH_SSE. Add
	SSE support.

From-SVN: r271219
2019-05-15 08:07:04 -07:00
H.J. Lu 08266db93f i386: Emulate MMX mulv4hi3 with SSE
Emulate MMX mulv4hi3 with SSE.  Only SSE register source operand is
allowed.

	PR target/89021
	* config/i386/mmx.md (mmx_mulv4hi3): Also allow
	TARGET_MMX_WITH_SSE.
	(mulv4hi3): New.
	(*mmx_mulv4hi3): Also allow TARGET_MMX_WITH_SSE.  Add SSE
	support.

From-SVN: r271218
2019-05-15 08:06:28 -07:00
H.J. Lu 1f0dc22ab5 i386: Emulate MMX plusminus/sat_plusminus with SSE
Emulate MMX plusminus/sat_plusminus with SSE.  Only SSE register source
operand is allowed.

	PR target/89021
	* config/i386/mmx.md (MMXMODEI8): Require TARGET_SSE2 for V1DI.
	(plusminus:mmx_<plusminus_insn><mode>3): Check
	TARGET_MMX_WITH_SSE.
	(sat_plusminus:mmx_<plusminus_insn><mode>3): Likewise.
	(<plusminus_insn><mode>3): New.
	(*mmx_<plusminus_insn><mode>3): Add SSE emulation.
	(*mmx_<plusminus_insn><mode>3): Likewise.

From-SVN: r271217
2019-05-15 08:05:48 -07:00
H.J. Lu 6e9fffcf83 i386: Emulate MMX punpcklXX/punpckhXX with SSE punpcklXX
Emulate MMX punpcklXX/punpckhXX with SSE punpcklXX.  For MMX punpckhXX,
move bits 64:127 to bits 0:63 in SSE register.  Only SSE register source
operand is allowed.

	PR target/89021
	* config/i386/i386-expand.c (ix86_split_mmx_punpck): New function.
	* config/i386/i386-protos.h (ix86_split_mmx_punpck): New
	prototype.
	* config/i386/mmx.m (mmx_punpckhbw): Changed to
	define_insn_and_split to support SSE emulation.
	(mmx_punpcklbw): Likewise.
	(mmx_punpckhwd): Likewise.
	(mmx_punpcklwd): Likewise.
	(mmx_punpckhdq): Likewise.
	(mmx_punpckldq): Likewise.

From-SVN: r271216
2019-05-15 08:05:07 -07:00
H.J. Lu b74ebb2a36 i386: Emulate MMX packsswb/packssdw/packuswb with SSE2
Emulate MMX packsswb/packssdw/packuswb with SSE packsswb/packssdw/packuswb
plus moving bits 64:95 to bits 32:63 in SSE register.  Only SSE register
source operand is allowed.

	PR target/89021
	* config/i386/i386-expand.c (ix86_move_vector_high_sse_to_mmx):
	New function.
	(ix86_split_mmx_pack): Likewise.
	* config/i386/i386-protos.h (ix86_move_vector_high_sse_to_mmx):
	New prototype.
	(ix86_split_mmx_pack): Likewise.
	* config/i386/i386.md (mmx_isa): New.
	(enabled): Also check mmx_isa.
	* config/i386/mmx.md (any_s_truncate): New code iterator.
	(s_trunsuffix): New code attr.
	(mmx_packsswb): Removed.
	(mmx_packssdw): Likewise.
	(mmx_packuswb): Likewise.
	(mmx_pack<s_trunsuffix>swb): New define_insn_and_split to emulate
	MMX packsswb/packuswb with SSE2.
	(mmx_packssdw): Likewise.
	* config/i386/predicates.md (register_mmxmem_operand): New.

Co-Authored-By: Uros Bizjak <ubizjak@gmail.com>

From-SVN: r271215
2019-05-15 08:04:08 -07:00
H.J. Lu dfa61b9ed0 i386: Allow MMX register modes in SSE registers
In 64-bit mode, SSE2 can be used to emulate MMX instructions without
3DNOW.  We can use SSE2 to support MMX register modes.

	PR target/89021
	* config/i386/i386-c.c (ix86_target_macros_internal): Define
	__MMX_WITH_SSE__ for TARGET_MMX_WITH_SSE.
	* config/i386/i386.c (ix86_set_reg_reg_cost): Add support for
	TARGET_MMX_WITH_SSE with VALID_MMX_REG_MODE.
	(ix86_vector_mode_supported_p): Likewise.
	* config/i386/i386.h (TARGET_MMX_WITH_SSE): New.

From-SVN: r271213
2019-05-15 08:02:54 -07:00
Iain Sandoe 2e97dfdd54 lto-plugin, removed unused variable
2019-05-15  Iain Sandoe  <iain@sandoe.co.uk>

	* lto-plugin.c (cleanup_handler): Remove unused var.

From-SVN: r271212
2019-05-15 14:10:27 +00:00
Paolo Carlini d509bb8cbe call.c (perform_overload_resolution, [...]): Use OVL_P; remove redundant TEMPLATE_DECL checks.
2019-05-15  Paolo Carlini  <paolo.carlini@oracle.com>

	* call.c (perform_overload_resolution, build_new_method_call_1):
	Use OVL_P; remove redundant TEMPLATE_DECL checks.
	* decl.c (grokfndecl): Likewise.
	* mangle.c (write_expression): Likewise.
	* parser.c (cp_parser_template_id): Likewise.
	* pt.c (resolve_overloaded_unification, type_dependent_expression_p):
	Likewise.
	* search.c (build_baselink): Likewise.
	* tree.c (is_overloaded_fn, dependent_name, maybe_get_fns): Likewise.

From-SVN: r271211
2019-05-15 13:46:29 +00:00
Martin Liska 86e3947eea Check for overflow in tree-switch-conversion (PR middle-end/90478).
2019-05-15  Martin Liska  <mliska@suse.cz>

	PR middle-end/90478
	* tree-switch-conversion.c (jump_table_cluster::can_be_handled):
	Check for overflow.
2019-05-15  Martin Liska  <mliska@suse.cz>

	PR middle-end/90478
	* gcc.dg/tree-ssa/pr90478-2.c: New test.
	* gcc.dg/tree-ssa/pr90478.c: New test.

From-SVN: r271210
2019-05-15 12:58:53 +00:00
Richard Biener 2092f134b7 tree-into-ssa.c (pass_build_ssa::execute): Run update_address_taken before going into SSA.
2019-05-15  Richard Biener  <rguenther@suse.de>

	* tree-into-ssa.c (pass_build_ssa::execute): Run
	update_address_taken before going into SSA.

From-SVN: r271209
2019-05-15 12:57:32 +00:00
Richard Biener 186dabf292 gimple-parser.c (c_parser_gimple_postfix_expression): Handle __BIT_FIELD_REF.
2019-05-15  Richard Biener  <rguenther@suse.de>

	c/
	* gimple-parser.c (c_parser_gimple_postfix_expression): Handle
	__BIT_FIELD_REF.

	* tree-pretty-print.c (dump_generic_node): Dump BIT_FIELD_REF
	as __BIT_FIELD_REF with type with -gimple.

	* gcc.dg/gimplefe-40.c: Amend.

From-SVN: r271208
2019-05-15 12:51:58 +00:00
Vladislav Ivanishin fb4b60c68e tree-ssa-uninit: clean up is_value_included_in
2019-05-15  Vladislav Ivanishin  <vlad@ispras.ru>

	* tree-ssa-uninit.c (is_value_included_in): Remove is_unsigned and merge
	semantically equivalent branches (left over after prior refactorings).

From-SVN: r271207
2019-05-15 15:40:04 +03:00
Richard Biener 6b94351209 re PR tree-optimization/90474 (ICE: verify_gimple failed (error: DECL_GIMPLE_REG_P set on a variable with address taken; error: invalid address operand in MEM_REF))
2019-05-15  Richard Biener  <rguenther@suse.de>

	PR c/90474
	* c-common.c (c_common_mark_addressable_vec): Also mark
	a COMPOUND_LITERAL_EXPR_DECL addressable similar to
	c_mark_addressable.

From-SVN: r271206
2019-05-15 12:14:01 +00:00
Iain Sandoe c221c627cb darwin, testsuite, powerpc - handle tests for new processors.
If we build Darwin with a modern assembler, then it might well
recognise insns that cannot be used on current Darwin systems.

The patch augments the tests for feature support for VSX,
power8 and power9 to exclude Darwin even if the assembler can
handle the instructions.

2019-05-15  Iain Sandoe  <iain@sandoe.co.uk>

	* lib/target-supports.exp 
	(check_effective_target_powerpc_p8vector_ok): No support for Darwin.
	(check_effective_target_powerpc_p9vector_ok): Likewise.
	(check_effective_target_powerpc_float128_sw_ok): Likewise.
	(check_effective_target_powerpc_float128_hw_ok): Likewise.
	(check_effective_target_powerpc_vsx_ok): Likewise.
	* gcc.target/powerpc/bfp/bfp.exp: Don't try to run this for Darwin.
	* gcc.target/powerpc/dfp/dfp.exp: Likewise.

From-SVN: r271205
2019-05-15 11:47:04 +00:00
Richard Biener 595ffc073b re PR tree-optimization/88828 (Inefficient update of the first element of vector registers)
2019-05-15  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/88828
	* tree-ssa-forwprop.c (simplify_vector_constructor): Fix
	bogus check.

From-SVN: r271204
2019-05-15 09:59:37 +00:00
Richard Biener 905549856d gimple-parser.c (c_parser_gimple_statement): Remove questionable auto-promotion to VIEW_CONVERT_EXPR.
2019-05-14  Richard Biener  <rguenther@suse.de>

	* gimple-parser.c (c_parser_gimple_statement): Remove
	questionable auto-promotion to VIEW_CONVERT_EXPR.
	(c_parser_gimple_typespec): Split out from __MEM parsing.
	(c_parser_gimple_postfix_expression): Handle __VIEW_CONVERT.
	* tree-pretty-print.c (dump_generic_node): Dump VIEW_CONVERT_EXPR
	as __VIEW_CONVERT with -gimple.

	* gcc.dg/gimplefe-40.c: New testcase.

From-SVN: r271203
2019-05-15 09:18:15 +00:00
Iain Sandoe c101cff86e lto-plugin - support -save-temps, -v, --version.
This patch makes the lto-plugin follow the same approach
to save-temps as collect2. 

-save-temps causes the temp file to be named meaningfully,
and for the relevant input files to be saved in CWD.

-v, —version causes the save actions to be output to stderr.

one can get this to happen by just putting -save-temps, -v on
the regular link line or (for compatibility with the way the
 -debug flag works) by appending -plugin-opt=-save-temps, etc.

lto-plugin/

2019-05-15  Iain Sandoe  <iain@sandoe.co.uk>

	* lto-plugin.c (exec_lto_wrapper): Make the wrapper
	arguments filename more user-friendly.
	(file_exists, maybe_unlink): New.
	(cleanup_handler): Use maybe unlink to handle the
	case when temps should be saved.
	(process_option): Look for -v, —-version, -save-temps.
	(onload): Record the linker output file name.
	Check for -v, —-version, -save-temps in the GCC collect
	options environment.

From-SVN: r271202
2019-05-15 09:12:21 +00:00
Iain Sandoe debe1ba019 add missing Changelog for last commit.
From-SVN: r271201
2019-05-15 07:16:02 +00:00
Iain Sandoe 49ba885c75 darwin, testsuite, ppc FIX PR87600
The test fails on PPC Darwin because we emit 
__POWERPC__ instead of __powerpc__ fixed by allowing
for both.

2019-05-15  Iain Sandoe  <iain@sandoe.co.uk>

	* gcc.dg/pr87600.h: Add __POWERPC__ as an alternate test
	for PowerPC platforms.

From-SVN: r271200
2019-05-15 07:15:22 +00:00
Iain Sandoe 92bde79946 darwin, testsuite, laste piece to fix PR82920
These ae test adjustments to the scan assembler strings
mostly just to catch missing __USER_LABEL_PREFIX__s  on
symbols.

2019-05-15  Iain Sandoe  <iain@sandoe.co.uk>

	PR target/82920
	* g++.dg/cet-notrack-1.C: Adjust scan assembler for Darwin.
	* gcc.target/i386/cet-notrack-5a.c: Likewise.
	* gcc.target/i386/cet-notrack-5b.c: Likewise.
	* gcc.target/i386/cet-notrack-6b.c: Likewise.
	* gcc.target/i386/cet-notrack-icf-1.c: Likewise.
	* gcc.target/i386/cet-notrack-icf-2.c: Likewise.
	* gcc.target/i386/cet-notrack-icf-3.c: Likewise.
	* gcc.target/i386/cet-notrack-icf-4.c: Likewise.
	* gcc.target/i386/cet-sjlj-3.c: Likewise.
	* gcc.target/i386/cet-sjlj-5.c: Likewise.

From-SVN: r271199
2019-05-15 07:10:04 +00:00
GCC Administrator c838e45558 Daily bump.
From-SVN: r271197
2019-05-15 00:16:16 +00:00
Marek Polacek 9177a01650 re PR c++/68918 (spurious "invalid use of incomplete type" in trailing return type)
PR c++/68918
	* g++.dg/cpp0x/decltype71.C: New test.

From-SVN: r271193
2019-05-14 21:19:01 +00:00
Marek Polacek 1d7dcb0ed2 re PR c++/70156 (incorrect "incomplete type" error initializing a static const data member)
PR c++/70156
	* g++.dg/init/static5.C: New test.

From-SVN: r271192
2019-05-14 21:10:58 +00:00
Iain Sandoe c76ea1b8bf darwin, testsuite, fix more PR 82920
Darwin doesn't support mx32, and some tests were
failing because it was trying to do them.  When we
disable this it turns out that quite a few tests
requiring mx32 support were not guarded.

gcc/

2019-05-14  Iain Sandoe  <iain@sandoe.co.uk>

	PR target/82920
	* config/i386/darwin.h (CC1_SPEC): Report -mx32 as an error for
	Darwin.

gcc/testsuite/

2019-05-14  Iain Sandoe  <iain@sandoe.co.uk>

	PR target/82920
	* gcc.target/i386/cet-sjlj-6b.c: Require effective target x32.
	* gcc.target/i386/pr52146.c: Likewise.
	* gcc.target/i386/pr52698.c: Likewise.
	* gcc.target/i386/pr52857-1.c: Likewise.
	* gcc.target/i386/pr52857-2.c: Likewise.
	* gcc.target/i386/pr52876.c: Likewise.
	* gcc.target/i386/pr53698.c: Likewise.
	* gcc.target/i386/pr54157.c: Likewise.
	* gcc.target/i386/pr55049-1.c: Likewise.
	* gcc.target/i386/pr55093.c: Likewise.
	* gcc.target/i386/pr55116-1.c: Likewise.
	* gcc.target/i386/pr55116-2.c: Likewise.
	* gcc.target/i386/pr55597.c: Likewise.
	* gcc.target/i386/pr59929.c: Likewise.
	* gcc.target/i386/pr66470.c: Likewise.

From-SVN: r271190
2019-05-14 20:36:18 +00:00