This patch contains the GCN port of libgcc.
2019-01-17 Andrew Stubbs <ams@codesourcery.com>
Kwok Cheung Yeung <kcy@codesourcery.com>
Julian Brown <julian@codesourcery.com>
Tom de Vries <tom@codesourcery.com>
libgcc/
* config.host: Recognize amdgcn*-*-amdhsa.
* config/gcn/crt0.c: New file.
* config/gcn/lib2-divmod-hi.c: New file.
* config/gcn/lib2-divmod.c: New file.
* config/gcn/lib2-gcn.h: New file.
* config/gcn/sfp-machine.h: New file.
* config/gcn/t-amdgcn: New file.
Co-Authored-By: Julian Brown <julian@codesourcery.com>
Co-Authored-By: Kwok Cheung Yeung <kcy@codesourcery.com>
Co-Authored-By: Tom de Vries <tom@codesourcery.com>
From-SVN: r268021
In order to allow ZCX on VxWorks, we need the frame_dummy function to do
the register_frame_info(). So make sure crtbegin.o and crtend.o are
available for use with a custom spec file.
From-SVN: r263690
This patch is in use by Cygwin for years, upstream to GCC.
* gcc/config/i386/mingw.opt (fset-stack-executable): Removed.
* gcc/config/i386/cygming.opt (fset-stack-executable): Moved
from mingw.opt.
* gcc/config/i386/cygwin.h: Define CHECK_EXECUTE_STACK_ENABLED.
* ligcc/config.host (*-cygwin): Include file from mingw
config/i386/enable-execute-stack-mingw32.c
From-SVN: r250914
2017-08-01 Jerome Lambourg <lambourg@adacore.com>
Doug Rupp <rupp@adacore.com>
Olivier Hainque <hainque@adacore.com>
gcc/
* config.gcc (arm-wrs-vxworks*): Rework to handle arm-wrs-vxworks7 as
well as arm-wrs-vxworks. Update target_cpu_name from arm6 (arch v3) to
arm8 (arch v4).
* config/arm/vxworks.h (MAYBE_TARGET_BPABI_CPP_BUILTINS): New, helper
for TARGET_OS_CPP_BUILTIN.
(TARGET_OS_CPP_BUILTIN): Invoke MAYBE_TARGET_BPABI_CPP_BUILTINS(),
refine CPU definitions for arm_arch5 and add those for arm_arch6 and
arm_arch7.
(MAYBE_ASM_ABI_SPEC): New, helper for SUBTARGET_EXTRA_ASM_SPEC,
passing required abi options to the assembler for EABI configurations.
(EXTRA_CC1_SPEC): New macro, to help prevent the implicit production
of .text.hot and .text.unlikely sections for kernel modules when
using ARM style exceptions.
(CC1_SPEC): Remove obsolete attempt at mimicking Diab toolchain
options. Add EXTRA_CC1_SPEC.
(VXWORKS_ENDIAN_SPEC): Adjust comment and remove handling of Diab
toolchain options.
(DWARF2_UNWIND_INFO): Redefine to handle the pre/post VxWorks 7
transition.
(ARM_TARGET2_DWARF_FORMAT): Define.
* config/arm/t-vxworks: Adjust multilib control to removal of the
Diab command line options.
libgcc/
* config.host (arm-wrs-vxworks*): Rework to handle arm-wrs-vxworks7
as well as arm-wrs-vxworks.
* config/arm/t-vxworks7: New file. Add unwind-arm-vxworks.c to
LIB2ADDEH.
* config/arm/unwind-arm-vxworks.c: New file. Provide dummy
__exidx_start and __exidx_end for downloadable modules.
Co-Authored-By: Doug Rupp <rupp@adacore.com>
Co-Authored-By: Olivier Hainque <hainque@adacore.com>
From-SVN: r250781
2017-07-24 Daniel Santos <daniel.santos@pobox.com>
PR testsuite/80759
* config.host: include i386/t-msabi for darwin and solaris.
* config/i386/i386-asm.h
(ELFFN): Rename to FN_TYPE.
(FN_SIZE): New macro.
(FN_HIDDEN): Likewise.
(ASMNAME): Likewise.
(FUNC_START): Rename to FUNC_BEGIN, use ASMNAME, replace .global with
.globl.
(HIDDEN_FUNC): Use ASMNAME and .globl instead of .global.
(SSE_SAVE): Convert to cpp macro, hard-code offset (always 0x60).
* config/i386/resms64.S: Use SSE_SAVE as cpp macro instead of gas
.macro.
* config/i386/resms64f.S: Likewise.
* config/i386/resms64fx.S: Likewise.
* config/i386/resms64x.S: Likewise.
* config/i386/savms64.S: Likewise.
* config/i386/savms64f.S: Likewise.
From-SVN: r250488
gcc/ChangeLog:
* config/i386/i386.opt: Add option -mcall-ms2sysv-xlogues.
* config/i386/i386.h
(x86_64_ms_sysv_extra_clobbered_registers): Change type to unsigned.
(NUM_X86_64_MS_CLOBBERED_REGS): New macro.
(struct machine_function): Add new members call_ms2sysv,
call_ms2sysv_pad_in, call_ms2sysv_pad_out and call_ms2sysv_extra_regs.
(struct machine_frame_state): New fields sp_realigned and
sp_realigned_offset.
* config/i386/i386.c
(enum xlogue_stub): New enum.
(enum xlogue_stub_sets): New enum.
(class xlogue_layout): New class.
(struct ix86_frame): New fields stack_realign_allocate_offset,
stack_realign_offset and outlined_save_offset. Modify comments to
detail stack layout when using out-of-line stubs.
(ix86_target_string): Add -mcall-ms2sysv-xlogues option.
(ix86_option_override_internal): Add sorry() for TARGET_SEH and
-mcall-ms2sysv-xlogues.
(stub_managed_regs): New static variable.
(ix86_save_reg): Add new parameter ignore_outlined to optionally omit
registers managed by out-of-line stub.
(disable_call_ms2sysv_xlogues): New function.
(ix86_compute_frame_layout): Modify re-alignment calculations, disable
m->call_ms2sysv when appropriate and compute frame layout for
out-of-line stubs.
(sp_valid_at, fp_valid_at): New inline functions.
(choose_basereg): New function.
(choose_baseaddr): Add align parameter, use choose_basereg and modify
all callers.
(ix86_emit_save_reg_using_mov, ix86_emit_restore_sse_regs_using_mov):
Use align parameter of choose_baseaddr to generated aligned SSE movs
when possible.
(pro_epilogue_adjust_stack): Modify to track
machine_frame_state::sp_realigned.
(ix86_nsaved_regs): Modify to accommodate changes to ix86_save_reg.
(ix86_nsaved_sseregs): Likewise.
(ix86_emit_save_regs): Likewise.
(ix86_emit_save_regs_using_mov): Likewise.
(ix86_emit_save_sse_regs_using_mov): Likewise.
(get_scratch_register_on_entry): Likewise.
(gen_frame_set): New function.
(gen_frame_load): Likewise.
(gen_frame_store): Likewise.
(emit_outlined_ms2sysv_save): Likewise.
(emit_outlined_ms2sysv_restore): Likewise.
(ix86_expand_prologue): Modify stack re-alignment code and call
emit_outlined_ms2sysv_save when appropriate.
(ix86_emit_leave): Clear machine_frame_state::sp_realigned. Add
parameter rtx_insn *insn, which allows the function to be used to only
generate the notes.
(ix86_expand_epilogue): Modify validity checks of frame and stack
pointers, and call emit_outlined_ms2sysv_restore when appropriate.
(ix86_expand_call): Modify to enable m->call_ms2sysv when appropriate.
* config/i386/predicates.md
(save_multiple): New predicate.
(restore_multiple): Likewise.
* config/i386/sse.md
(save_multiple<mode>): New pattern.
(save_multiple_realign<mode>): Likewise.
(restore_multiple<mode>): Likewise.
(restore_multiple_and_return<mode>): Likewise.
(restore_multiple_leave_return<mode>): Likewise.
* Makefile.in: Export HOSTCXX and HOSTCXXFLAGS to site.exp
gcc/testsuite/ChangeLog:
* gcc.target/x86_64/abi/ms-sysv/do-test.S: New file.
* gcc.target/x86_64/abi/ms-sysv/gen.cc: Likewise.
* gcc.target/x86_64/abi/ms-sysv/ms-sysv.c: Likewise.
* gcc.target/x86_64/abi/ms-sysv/ms-sysv.exp: Likewise.
libgcc/ChangeLog:
* config.host: Add i386/t-msabi to i386/t-linux file list.
* config/i386/i386-asm.h: New file.
* config/i386/resms64.S: New file.
* config/i386/resms64f.S: New file.
* config/i386/resms64fx.S: New file.
* config/i386/resms64x.S: New file.
* config/i386/savms64.S: New file.
* config/i386/savms64f.S: New file.
* config/i386/t-msabi: New file.
From-SVN: r248029
2017-05-09 Andreas Tobler <andreast@gcc.gnu.org>
* config.host: Use the generic FreeBSD t-slibgcc-elf-ver for
arm*-*-freebsd* instead of the t-slibgcc-libgcc.
From-SVN: r247812
libgcc/
* config/aarch64/aarch64-unwind.h: New file.
(DWARF_REGNUM_AARCH64_RA_STATE): Define.
(MD_POST_EXTRACT_ROOT_ADDR): New target marcro and define it on AArch64.
(MD_POST_EXTRACT_FRAME_ADDR): Likewise.
(MD_POST_FROB_EH_HANDLER_ADDR): Likewise.
(MD_FROB_UPDATE_CONTEXT): Define it on AArch64.
(aarch64_post_extract_frame_addr): New function.
(aarch64_post_frob_eh_handler_addr): New function.
(aarch64_frob_update_context): New function.
* config/aarch64/linux-unwind.h: Include aarch64-unwind.h
* config.host (aarch64*-*-elf, aarch64*-*-rtems*,
aarch64*-*-freebsd*):
Initialize md_unwind_header to include aarch64-unwind.h.
* unwind-dw2.c (struct _Unwind_Context): Define "RA_A_SIGNED_BIT".
(execute_cfa_program): Multiplex DW_CFA_GNU_window_save for
__aarch64__.
(uw_update_context): Honor MD_POST_EXTRACT_FRAME_ADDR.
(uw_init_context_1): Honor MD_POST_EXTRACT_ROOT_ADDR.
(uw_frob_return_addr): New function.
(uw_install_context): Use uw_frob_return_addr.
From-SVN: r244673
gcc/
2016-12-05 Cupertino Miranda <cmiranda@synopsys.com>
* config/arc/arc.h (STARTFILE_SPEC): Use default linux specs.
(ENDFILE_SPEC): Likewise.
libgcc/
2016-12-05 Cupertino Miranda <cmiranda@synopsys.com>
* config.host (arc*-*-linux-uclibc*): Use default extra
objects. Include linux-android header.
* config/arc/crti.S (_init): Declare symbol as function.
(_fini): Likewise.
From-SVN: r243245
The __cpu_indicator_init and __cpu_model symbols are not safe to use
from shared libgcc_s.so from ifunc resolvers, so since gcc-6, only
the definitions from static libgcc.a are used, however the symbols
are kept in libgcc_s as well for backward compatibility (with
appropriate symbol version). On targets without such backward
compatibility concern add cpuinfo to the static library only (this
avoids running the ctor, reduces libgcc_s size and elf abi concerns
about the versioned symbols).
libgcc/
2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
* config.host (i[3456]86-*-musl*, x86_64-*-musl*): Use
i386/t-cpuinfo-static instead of i386/t-cpuinfo.
* config/i386/t-cpuinfo-static: New.
From-SVN: r242268
Bug 77586, and previously
<https://gcc.gnu.org/ml/gcc-bugs/2016-08/msg03233.html>, reports
ia64-elf failing to build because of float128_type_node being NULL,
but being used by the back end for __float128.
The global float128_type_node is only available conditionally, if
target hooks indicate TFmode is not only available as a scalar mode
and of the right format, but also supported in libgcc. The back-end
support, however, expects the type always to be available for
__float128 even if the libgcc support is missing.
Although a target-specific node could be restored in the case where
libgcc support is missing, it seems better to address the missing
libgcc support. Thus, this patch enables TFmode soft-fp in libgcc
globally for all ia64 targets. Support for XFmode in libgcc (that is,
for libgcc2.c XFmode functions, not soft-fp) is also enabled for all
ia64 targets so that ia64 no longer needs to define the
TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P hook.
I've confirmed that ia64-elf builds cc1 with this patch and it passes
-fself-test. I have not otherwise tested the patch. It's plausible
that ia64-elf and ia64-freebsd might work as-is, but ia64-vms probably
needs further changes, by someone familiar with VMS shared libraries,
to implement an equivalent of ia64/t-softfp-compat in that case
(avoiding conflicts between __divtf3 from soft-fp and the old alias
for __divxf3).
PR target/77586
gcc:
* config/ia64/ia64.c (ia64_libgcc_floating_mode_supported_p)
(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): Remove.
* config/ia64/elf.h (IA64_NO_LIBGCC_TFMODE): Likewise.
* config/ia64/freebsd.h (IA64_NO_LIBGCC_TFMODE): Likewise.
* config/ia64/vms.h (IA64_NO_LIBGCC_XFMODE)
(IA64_NO_LIBGCC_TFMODE): Likewise.
libgcc:
* config.host (ia64*-*-elf*, ia64*-*-freebsd*, ia64-hp-*vms*): Use
soft-fp.
From-SVN: r240955
In <https://gcc.gnu.org/ml/gcc-bugs/2016-08/msg03233.html>, Nick
reported i386-elf and ia64-elf failing to build because of
float128_type_node being NULL, but being used by the back end for
__float128.
The global float128_type_node is only available conditionally, if
target hooks indicate TFmode is not only available as a scalar mode
and of the right format, but also supported in libgcc. The back-end
support, however, expects the type always to be available for
__float128 even if the libgcc support is missing.
Although a target-specific node could be restored in the case where
libgcc support is missing, it seems better to address the missing
libgcc support. Thus, this patch enables TFmode soft-fp in libgcc
globally for all x86 targets - the only special cases needed being for
targets that use soft-fp for SFmode and DFmode, one of which already
had the support for TFmode as well (so I based the i[34567]86-*-rtems*
configuration on that present for i[34567]86-*-elfiamcu). The i386
implementation of TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P is then
removed as no longer needed.
I can provide such a patch for ia64 if useful, but am not in a
position to test it (and while I'm reasonably confident that enabling
this support would be right for ia64-elf and ia64-freebsd, I've no
real idea if enabling libgcc support for TFmode, with or without also
enabling it for XFmode, would be safe for ia64-vms).
Bootstrapped with no regressions on x86_64-pc-linux-gnu.
gcc:
* config/i386/i386.c (ix86_libgcc_floating_mode_supported_p)
(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): Remove.
* config/i386/i386elf.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/lynx.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/netbsd-elf.h (IX86_MAYBE_NO_LIBGCC_TFMODE):
Likewise.
* config/i386/netbsd64.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/nto.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/openbsd.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
* config/i386/rtemself.h (IX86_NO_LIBGCC_TFMODE): Likewise.
* config/i386/vxworks.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Likewise.
libgcc:
* config.host (i[34567]86-*-* | x86_64-*-*): Enable TFmode soft-fp
where not already enabled.
From-SVN: r239775
