Commit Graph

160590 Commits

Author SHA1 Message Date
Jason Merrill
f5f035a336 PR c++/84978, ICE with NRVO.
* cvt.c (cp_get_fndecl_from_callee): Add fold parameter.
	(cp_get_callee_fndecl_nofold): New.
	* cp-gimplify.c (cp_genericize_r): Use it instead.
	* call.c (check_self_delegation): Likewise.

From-SVN: r258689
2018-03-20 14:05:59 -04:00
Peter Bergner
91d014fffa re PR target/83789 (__builtin_altivec_lvx fails for powerpc for altivec-4.c)
PR target/83789
	* config/rs6000/altivec.md (altivec_lvx_<mode>_2op): Delete define_insn.
	(altivec_lvx_<mode>_1op): Likewise.
	(altivec_stvx_<mode>_2op): Likewise.
	(altivec_stvx_<mode>_1op): Likewise.
	(altivec_lvx_<VM2:mode>): New define_expand.
	(altivec_stvx_<VM2:mode>): Likewise.
	(altivec_lvx_<VM2:mode>_2op_<P:mptrsize>): New define_insn.
	(altivec_lvx_<VM2:mode>_1op_<P:mptrsize>): Likewise.
	(altivec_stvx_<VM2:mode>_2op_<P:mptrsize>): Likewise.
	(altivec_stvx_<VM2:mode>_1op_<P:mptrsize>): Likewise.
	* config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Use new expanders.
	(rs6000_gen_lvx): Likewise.
	* config/rs6000/rs6000.c (altivec_expand_lv_builtin): Likewise.
	(altivec_expand_stv_builtin): Likewise.
	(altivec_expand_builtin): Likewise.
	* config/rs6000/vector.md: Likewise.

From-SVN: r258688
2018-03-20 12:25:09 -05:00
Kyrylo Tkachov
770ebe99fe This PR shows that we get the load/store_lanes logic wrong for arm big-endian.
It is tricky to get right. Aarch64 does it by adding the appropriate lane-swapping
operations during expansion.

I'd like to do the same on arm eventually, but we'd need to port and validate the VTBL-generating
code and add it to all the right places and I'm not comfortable enough doing it for GCC 8, but I am keen
in getting the wrong-code fixed.
As I say in the PR, vectorisation on armeb is already severely restricted (we disable many patterns on BYTES_BIG_ENDIAN)
and the load/store_lanes patterns really were not working properly at all, so disabling them is not
a radical approach.

The way to do that is to return false in ARRAY_MODE_SUPPORTED_P for BYTES_BIG_ENDIAN.

Bootstrapped and tested on arm-none-linux-gnueabihf.
Also tested on armeb-none-eabi.


     PR target/82518
     * config/arm/arm.c (arm_array_mode_supported_p): Return false for
     BYTES_BIG_ENDIAN.

     * lib/target-supports.exp (check_effective_target_vect_load_lanes):
     Disable for armeb targets.
     * gcc.target/arm/pr82518.c: New test.

From-SVN: r258687
2018-03-20 17:13:16 +00:00
Nathan Sidwell
6f87580f7d [PR c++/84962] ICE with anon-struct member
https://gcc.gnu.org/ml/gcc-patches/2018-03/msg00961.html
	PR c++/84962
	* name-lookup.c (pushdecl_class_level): Push anon-struct's
	member_vec, if there is one.

	PR c++/84962
	* g++.dg/lookup/pr84962.C: New.

From-SVN: r258686
2018-03-20 16:01:08 +00:00
Nathan Sidwell
5770bbac66 [PR c++/84970] lookup marking
https://gcc.gnu.org/ml/gcc-patches/2018-03/msg00973.html
	PR c++/84970
	* cp-tree.h (lookup_list_keep): Declare.
	* tree.c (lookup_list_keep): New, broken out of ...
	(build_min): ... here.  Call it.
	* decl.c (cp_finish_decl): Call lookup_list_keep.

	PR c++/84970
	* g++.dg/lookup/pr84970.C: New.

From-SVN: r258685
2018-03-20 15:57:30 +00:00
Richard Biener
b6c1e0329b re PR target/84986 (Performance regression: loop no longer vectorized (x86-64))
2018-03-20  Richard Biener  <rguenther@suse.de>

	PR target/84986
	* config/i386/i386.c (ix86_add_stmt_cost): Only cost
	sign-conversions as zero, fall back to standard scalar_stmt
	cost for the rest.

	* gcc.dg/vect/costmodel/x86_64/costmodel-pr84986.c: New testcase.

From-SVN: r258684
2018-03-20 14:35:46 +00:00
Martin Liska
14b05bee0c Handle -fno-guess-branch-probability properly in predict.c (PR ipa/84825).
2018-03-20  Martin Liska  <mliska@suse.cz>

	PR ipa/84825
	* predict.c (rebuild_frequencies): Handle case when we have
	PROFILE_ABSENT, but flag_guess_branch_prob is false.
2018-03-20  Martin Liska  <mliska@suse.cz>

	PR ipa/84825
	* g++.dg/ipa/pr84825.C: New test.

From-SVN: r258683
2018-03-20 14:14:17 +00:00
Martin Liska
7e86e0a3a1 Remove ICEing test-case.
2018-03-20  Martin Liska  <mliska@suse.cz>

	* gcc.dg/lto/chkp-ctor-merge_0.c: Remove.

From-SVN: r258682
2018-03-20 14:13:17 +00:00
Jakub Jelinek
d64257a4ed re PR target/84990 (Boostrap broken with --enable-checking=release and Ada)
PR target/84990
	* dwarf2asm.c (dw2_output_indirect_constant_1): Temporarily turn off
	flag_section_anchors.
	* varasm.c (use_blocks_for_decl_p): Remove hack for
	dw2_force_const_mem.

From-SVN: r258681
2018-03-20 14:00:48 +01:00
Jason Merrill
d9bf40a181 PR c++/84937 - ICE with class deduction and auto.
* pt.c (rewrite_template_parm): Fix auto handling.

From-SVN: r258680
2018-03-20 08:44:49 -04:00
Richard Biener
79cf14ae15 force-parallel-4.c: XFAIL one parallelizable loop.
2018-03-20  Richard Biener  <rguenther@suse.de>

	* testsuite/libgomp.graphite/force-parallel-4.c: XFAIL one
	parallelizable loop.

From-SVN: r258679
2018-03-20 12:42:59 +00:00
Jakub Jelinek
cdeba3e07a re PR target/84845 (ICE: in extract_insn, at recog.c:2304: unrecognizable insn at -O2 and above at aarch64)
PR target/84845
	* config/aarch64/aarch64.md (*aarch64_reg_<mode>3_neg_mask2): Rename
	to ...
	(*aarch64_<optab>_reg_<mode>3_neg_mask2): ... this.  If pseudos can't
	be created, use lowpart_subreg of operands[0] rather than operands[0]
	itself.
	(*aarch64_reg_<mode>3_minus_mask): Rename to ...
	(*aarch64_ashl_reg_<mode>3_minus_mask): ... this.
	(*aarch64_<optab>_reg_di3_mask2): Use const_int_operand predicate
	and n constraint instead of aarch64_shift_imm_di and Usd.
	(*aarch64_reg_<optab>_minus<mode>3): Rename to ...
	(*aarch64_<optab>_reg_minus<mode>3): ... this.

	* gcc.c-torture/compile/pr84845.c: New test.

From-SVN: r258678
2018-03-20 11:59:26 +01:00
Sudakshina Das
094daefb7b [ARM][PR82989] Fix unexpected use of NEON instructions for shifts
This patch fixes PR82989 so that we avoid NEON instructions when
-mneon-for-64bits is not enabled. This is more of a short term fix
for the real deeper problem of making an early decision of choosing
or rejecting NEON instructions. There is now a new ticket PR84467 to
deal with the longer term solution.
(Please refer to the discussion in the bug report for more details).

Sudi

*** gcc/ChangeLog ***

2018-03-20  Sudakshina Das  <sudi.das@arm.com>

	PR target/82989
	* config/arm/neon.md (ashldi3_neon): Update ?s for constraints
	to favor GPR over NEON registers.
	(<shift>di3_neon): Likewise.

*** gcc/testsuite/ChangeLog ***

2018-03-20  Sudakshina Das  <sudi.das@arm.com>

	PR target/82989
	* gcc.target/arm/pr82989.c: New test.

From-SVN: r258677
2018-03-20 10:54:42 +00:00
Tom de Vries
038012e2d9 [nvptx] Fix bar.sync position
2018-03-20  Tom de Vries  <tom@codesourcery.com>

	PR target/84952
	* config/nvptx/nvptx.c (nvptx_single): Don't neuter bar.sync.
	(nvptx_process_pars): Emit bar.sync asap and alap.

From-SVN: r258676
2018-03-20 10:31:23 +00:00
Eric Botcazou
452154b9e6 * c-ada-spec.c (pp_ada_tree_identifier): Deal specifically with _Bool.
From-SVN: r258675
2018-03-20 09:44:21 +00:00
Tom de Vries
b0b592fc7b [nvptx] Fix prevent_branch_around_nothing
2018-03-20  Tom de Vries  <tom@codesourcery.com>

	PR target/84954
	* config/nvptx/nvptx.c (prevent_branch_around_nothing): Also update
	seen_label if seen_label is already set.

From-SVN: r258674
2018-03-20 09:14:07 +00:00
Jakub Jelinek
ae6dca8c65 re PR target/84945 (UBSAN: gcc/config/i386/i386.c:33312:22: runtime error: shift exponent 32 is too large for 32-bit type 'int')
PR target/84945
	* config/i386/i386.c (fold_builtin_cpu): For features above 31
	use __cpu_features2 variable instead of __cpu_model.__cpu_features[0].
	Use 1U instead of 1.  Formatting fixes.

	* gcc.target/i386/pr84945.c: New test.

	* config/i386/cpuinfo.h (__cpu_features2): Declare.
	* config/i386/cpuinfo.c (__cpu_features2): New variable for
	ifndef SHARED only.
	(set_feature): Define.
	(get_available_features): Use set_feature macro.  Set __cpu_features2
	to the second word of features ifndef SHARED.

From-SVN: r258673
2018-03-20 09:14:42 +01:00
Christophe Lyon
18c5bc3f90 PR target/81647: Fix testcase.
2018-03-20  Christophe Lyon  <christophe.lyon@linaro.org>

	PR target/81647
	* gcc.target/aarch64/pr81647.c: Require fenv_exceptions.

From-SVN: r258672
2018-03-20 09:11:35 +01:00
Jakub Jelinek
a8ed1cbd67 re PR c/84953 (misleading warning from strpbrk(x,""))
PR c/84953
	* builtins.c (fold_builtin_strpbrk): For strpbrk(x, "") use type
	instead of TREE_TYPE (s1) for the return value.

	* gcc.dg/pr84953.c: New test.

From-SVN: r258671
2018-03-20 08:55:41 +01:00
GCC Administrator
d2a1b11e65 Daily bump.
From-SVN: r258670
2018-03-20 00:16:14 +00:00
Jakub Jelinek
f87b4b2fbf re PR tree-optimization/84946 (UBSAN: in mem_valid_for_store_merging ../../gcc/gimple-ssa-store-merging.c:3951)
PR tree-optimization/84946
	* gimple-ssa-store-merging.c (mem_valid_for_store_merging): Compute
	bitsize + bitsize in poly_uint64 rather than poly_int64.

From-SVN: r258665
2018-03-19 21:49:57 +01:00
Jakub Jelinek
90841d4302 re PR sanitizer/78651 (Incorrect exception handling when catch clause uses local class and PIC and sanitizer are active)
PR sanitizer/78651
	* dwarf2asm.c: Include fold-const.c.
	(dw2_output_indirect_constant_1): Set DECL_INITIAL (decl) to ADDR_EXPR
	of decl rather than decl itself.

From-SVN: r258664
2018-03-19 21:48:39 +01:00
Jakub Jelinek
359ea407e9 re PR sanitizer/84761 (AddressSanitizer is not compatible with glibc 2.27 on x86)
PR sanitizer/84761
	* sanitizer_common/sanitizer_linux_libcdep.cc (__GLIBC_PREREQ):
	Define if not defined.
	(DL_INTERNAL_FUNCTION): Don't define.
	(InitTlsSize): For __i386__ if not compiled against glibc 2.27+
	determine at runtime whether to use regparm(3), stdcall calling
	convention for older glibcs or normal calling convention for
	newer glibcs for call to _dl_get_tls_static_info.

From-SVN: r258663
2018-03-19 21:47:29 +01:00
Jakub Jelinek
42f8338d59 re PR rtl-optimization/84643 (gcc/optabs.c:6549:26: runtime error: load of value 131075, which is not a valid value for type 'memmodel')
PR rtl-optimization/84643
	* memmodel.h (enum memmodel): Add MEMMODEL_MAX enumerator.

From-SVN: r258662
2018-03-19 21:46:23 +01:00
Marek Polacek
ac9ec1988a re PR c++/84927 (ICE with NSDMI and reference)
PR c++/84927
	* constexpr.c (cxx_eval_bare_aggregate): Update constructor's flags
	as we evaluate the elements.
	(cxx_eval_constant_expression): Verify constructor's flags
	unconditionally.

	* g++.dg/cpp1y/nsdmi-aggr9.C: New test.

From-SVN: r258661
2018-03-19 20:46:16 +00:00
Marek Polacek
e5cc0d5453 re PR c++/84925 (ICE with segfault in __PRETTY_FUNCTION__)
PR c++/84925
	* pt.c (enclosing_instantiation_of): Check if fn is null.

	* g++.dg/cpp1z/lambda-__func__.C: New test.

From-SVN: r258660
2018-03-19 20:34:45 +00:00
Jason Merrill
809c28c8dd PR c++/71834 - template-id with too few arguments.
* pt.c (coerce_template_parms): Check fixed_parameter_pack_p.

From-SVN: r258659
2018-03-19 16:32:57 -04:00
Maxim Ostapenko
058494f991 re PR sanitizer/78651 (Incorrect exception handling when catch clause uses local class and PIC and sanitizer are active)
2018-03-19  Maxim Ostapenko  <m.ostapenko@samsung.com>

gcc/

	PR sanitizer/78651
	* dwarf2asm.c (dw2_output_indirect_constant_1): Disable ASan before
	calling assemble_variable.

gcc/testsuite/

	PR sanitizer/78651
	* g++.dg/asan/pr78651.C: New test.

From-SVN: r258658
2018-03-19 21:59:56 +02:00
Tom de Vries
df1f46241d [testsuite] Add nvptx xfail to pr84512.c
2018-03-19  Tom de Vries  <tom@codesourcery.com>

	* gcc.dg/tree-ssa/pr84512.c: Don't require effective target
	vect_int_mult.  Add nvptx xfail for PR84958.

From-SVN: r258656
2018-03-19 19:12:53 +00:00
Nathan Sidwell
143f00e112 [PR c++/84835] ICE with generic lambda in extern "C"
https://gcc.gnu.org/ml/gcc-patches/2018-03/msg00890.html
	PR c++/84835
	* lambda.c (maybe_add_lambda_conv_op): Force C++ linkage.
	* pt.c (build_template_decl): Propagate language linkage.

	PR c++/84835
	* g++.dg/cpp1y/pr84835.C: New.

From-SVN: r258655
2018-03-19 18:56:22 +00:00
Sudakshina Das
f7d884d45b [PR81647][AARCH64] Fix handling of Unordered Comparisons in aarch64-simd.md
This patch fixes the inconsistent behavior observed at -O3 for the unordered
comparisons. According to the online docs (https://gcc.gnu.org/onlinedocs
/gcc-7.2.0/gccint/Unary-and-Binary-Expressions.html), all of the following
should not raise an FP exception:
- UNGE_EXPR
- UNGT_EXPR
- UNLE_EXPR
- UNLT_EXPR
- UNEQ_EXPR
Also ORDERED_EXPR and UNORDERED_EXPR should only return zero or one.

The aarch64-simd.md handling of these were generating exception raising
instructions such as fcmgt. This patch changes the instructions that are
emitted in order to not give out the exceptions. We first check each
operand for NaNs and force any elements containing NaN to zero before using
them in the compare.

Example: UN<cc> (a, b) -> UNORDERED (a, b)
			  | (cm<cc> (isnan (a) ? 0.0 : a, isnan (b) ? 0.0 : b))


The ORDERED_EXPR is now handled as (cmeq (a, a) & cmeq (b, b)) and
UNORDERED_EXPR as ~ORDERED_EXPR and UNEQ as (~ORDERED_EXPR | cmeq (a,b)).

ChangeLog Entries:

*** gcc/ChangeLog ***

2018-03-19  Sudakshina Das  <sudi.das@arm.com>

	PR target/81647
	* config/aarch64/aarch64-simd.md (vec_cmp<mode><v_int_equiv>): Modify
	instructions for UNLT, UNLE, UNGT, UNGE, UNEQ, UNORDERED and ORDERED.

*** gcc/testsuite/ChangeLog ***

2018-03-19  Sudakshina Das  <sudi.das@arm.com>

	PR target/81647
	* gcc.target/aarch64/pr81647.c: New.

From-SVN: r258653
2018-03-19 18:50:32 +00:00
Joseph Myers
a84677b84d * es.po, sv.po: Update.
From-SVN: r258651
2018-03-19 18:29:34 +00:00
Jim Wilson
c0d3d1b681 RISC-V: Fix bootstrap failure.
gcc/
	PR bootstrap/84856
	* config/riscv/riscv.c (riscv_function_arg_boundary): Use
	PREFERRED_STACK_BOUNDARY instead of STACK_BOUNDARY.
	(riscv_first_stack_step): Likewise.
	(riscv_option_override): Use STACK_BOUNDARY instead of
	MIN_STACK_BOUNDARY.
	* config/riscv/riscv.h (STACK_BOUNDARY): Renamed from
	MIN_STACK_BOUNDARY.
	(BIGGEST_ALIGNMENT): Set to 128.
	(PREFERRED_STACK_BOUNDARY): Renamed from STACK_BOUNDARY.
	(RISCV_STACK_ALIGN): Use PREFERRED_STACK_BOUNDARY instead of
	STACK_BOUNDARY.

From-SVN: r258650
2018-03-19 11:08:24 -07:00
Richard Biener
be742eb4d4 re PR tree-optimization/84933 (ICE in set_value_range, at tree-vrp.c:288 since r257852)
2018-03-19  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/84933
	* tree-vrp.c (set_and_canonicalize_value_range): Treat out-of-bound
	values as -INF/INF when canonicalizing an ANTI_RANGE to a RANGE.

	* g++.dg/pr84933.C: New testcase.

From-SVN: r258646
2018-03-19 14:11:05 +00:00
Richard Biener
68d93a19c4 re PR tree-optimization/84859 (bogus -Warray-bounds on a memcpy in a loop)
2018-03-19  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/84859
	* tree-ssa-phiopt.c (single_trailing_store_in_bb): New function.
	(cond_if_else_store_replacement): Perform sinking operation on
	single-store BBs regardless of MAX_STORES_TO_SINK setting.
	Generalize what a BB with a single eligible store is.

	* gcc.dg/tree-ssa/pr84859.c: New testcase.
	* gcc.dg/tree-ssa/pr35286.c: Disable cselim.
	* gcc.dg/tree-ssa/split-path-6.c: Likewise.
	* gcc.dg/tree-ssa/split-path-7.c: Likewise.

From-SVN: r258645
2018-03-19 14:08:58 +00:00
Nathan Sidwell
8f3284a486 [C++/84812] ICE with local fn decl
https://gcc.gnu.org/ml/gcc-patches/2018-03/msg00872.html
	PR c++/84812
	* name-lookup.c (set_local_extern_decl_linkage): Defend against
	ambiguous lookups.

	PR c++/84812
	* g++.dg/lookup/pr84812.C: New.

From-SVN: r258644
2018-03-19 14:07:07 +00:00
Richard Biener
25f91fda52 re PR tree-optimization/84929 (ICE at -O3 on valid code on x86_64-linux-gnu: tree check: expected polynomial_chrec, have nop_expr in analyze_siv_subscript_cst_affine, at tree-data-ref.c:3018)
2018-03-19  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/84929
	* tree-data-ref.c (analyze_siv_subscript_cst_affine): Guard
	chrec_is_positive against non-chrec arg.

	* gcc.dg/torture/pr84929.c: New testcase.

From-SVN: r258643
2018-03-19 12:49:30 +00:00
Tamar Christina
8455b50ecc re PR target/84711 (AArch32 big-endian fails when taking subreg of a vector mode to a scalar mode.)
gcc/
2018-03-19  Tamar Christina  <tamar.christina@arm.com>

	PR target/84711
	* config/arm/arm.c (arm_can_change_mode_class): revert r258554.
       
gcc/testsuite/
2018-03-19  Tamar Christina  <tamar.christina@arm.com>

	PR target/84711
	* gcc.target/arm/big-endian-subreg.c: Delete.

From-SVN: r258642
2018-03-19 09:14:25 +00:00
Thomas Koenig
949d0060b4 re PR fortran/84931 (Expansion of array constructor with constant implied-do-object goes sideways)
2018-03-19  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/84931
	* simplify.c (gfc_convert_constant): Correctly handle iterators
	for type conversion.

2018-03-19  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/84931
	* gfortran.dg/array_constructor_52.f90: New test.

From-SVN: r258641
2018-03-19 07:04:35 +00:00
GCC Administrator
43bb589d9b Daily bump.
From-SVN: r258640
2018-03-19 00:16:19 +00:00
Gerald Pfeifer
8c00b6a4e8 api.xml: www.fsf.org has moved to https.
* doc/xml/api.xml: www.fsf.org has moved to https. Also omit
	trailing slash for domain level link.
	* doc/xml/faq.xml: Ditto.
	* doc/xml/manual/appendix_free.xml (software): Ditto.
	* doc/xml/manual/intro.xml: Ditto.
	* doc/xml/manual/spine.xml: Ditto.
	* doc/xml/spine.xml: Ditto.

From-SVN: r258637
2018-03-18 23:52:00 +00:00
Gerald Pfeifer
1de51fbc6f documentation_hacking.xml: Adjust link to docbook.org.
* doc/xml/manual/documentation_hacking.xml: Adjust link to
	docbook.org.

From-SVN: r258636
2018-03-18 23:38:23 +00:00
Martin Liska
f7dbf8e564 Fix UBSAN in regrename.c (PR rtl-optimization/84635).
2018-03-18  Martin Liska  <mliska@suse.cz>

	PR rtl-optimization/84635
	* regrename.c (build_def_use): Use matches_mode only when
	matches >= 0.

From-SVN: r258634
2018-03-18 20:17:10 +00:00
Steven G. Kargl
96c8b2534d re PR fortran/77414 (ICE in create_function_arglist, at fortran/trans-decl.c:2410)
2018-03-18  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/77414
	* decl.c (get_proc_name):  Check for a subroutine re-defined in
	the contain portion of a subroutine.  Change language of existing
	error message to better describe the issue. While here fix whitespace
	issues.

2018-03-18  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/77414
	* gfortran.dg/pr77414.f90: New test.
	* gfortran.dg/internal_references_1.f90: Adjust error message.

From-SVN: r258633
2018-03-18 17:51:57 +00:00
Steven G. Kargl
81ea7c11e1 re PR fortran/65453 (ICE in build_function_decl, at fortran/trans-decl.c:2001)
2018-03-18  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/65453
	* decl.c (get_proc_name): Catch clash between a procedure statement
	and a contained subprogram

2018-03-18  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/65453
	* gfortran.dg/pr65453.f90: New test.

From-SVN: r258632
2018-03-18 16:33:55 +00:00
Richard Sandiford
928b965f29 Don't try to vectorise COND_EXPR reduction chains (PR 84913)
The testcase ICEd for both SVE and AVX512 because we were trying
to vectorise a chain of COND_EXPRs as a reduction and getting
confused by reduc_index == -1.

2018-03-18  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	PR tree-optimization/84913
	* tree-vect-loop.c (vectorizable_reduction): Don't try to
	vectorize chains of COND_EXPRs.

gcc/testsuite/
	PR tree-optimization/84913
	* gfortran.dg/vect/pr84913.f90: New test.

From-SVN: r258631
2018-03-18 10:25:29 +00:00
Thomas Koenig
4a8298b46d re PR fortran/79929 (Bogus Warning: '__builtin_memset': specified size 4294967291 exceeds maximum object size 2147483647)
2018-03-18  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/79929
	* gfortran.dg/warn_concat.f90: New test.

From-SVN: r258630
2018-03-18 09:20:37 +00:00
Chung-Ju Wu
566f31a42e [NDS32] Fix wrong MAX_REGS_PER_ADDRESS value.
gcc/
	* config/nds32/nds32.h (MAX_REGS_PER_ADDRESS): Fix the value.

From-SVN: r258629
2018-03-18 06:44:31 +00:00
Chung-Ju Wu
08ed6d2955 [NDS32] Define LOGICAL_OP_NON_SHORT_CIRCUIT.
gcc/
	* config/nds32/nds32.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Define.

From-SVN: r258628
2018-03-18 06:18:18 +00:00
Chung-Ju Wu
24a711668b [NDS32] Define CLZ_DEFINED_VALUE_AT_ZERO.
gcc/
	* config/nds32/nds32.h (CLZ_DEFINED_VALUE_AT_ZERO): Define.

From-SVN: r258627
2018-03-18 04:47:10 +00:00