vec_insert accepts 3 arguments, arg0 is input vector, arg1 is the value
to be insert, arg2 is the place to insert arg1 to arg0. Current expander
generates stxv+stwx+lxv if arg2 is variable instead of constant, which
causes serious store hit load performance issue on Power. This patch tries
1) Build VIEW_CONVERT_EXPR for vec_insert (i, v, n) like v[n&3] = i to
unify the gimple code, then expander could use vec_set_optab to expand.
2) Expand the IFN VEC_SET to fast instructions: lvsr+insert+lvsl.
In this way, "vec_insert (i, v, n)" and "v[n&3] = i" won't be expanded too
early in gimple stage if arg2 is variable, avoid generating store hit load
instructions.
For Power9 V4SI:
addi 9,1,-16
rldic 6,6,2,60
stxv 34,-16(1)
stwx 5,9,6
lxv 34,-16(1)
=>
rlwinm 6,6,2,28,29
mtvsrwz 0,5
lvsr 1,0,6
lvsl 0,0,6
xxperm 34,34,33
xxinsertw 34,0,12
xxperm 34,34,32
Though instructions increase from 5 to 7, the performance is improved
60% in typical cases.
Tested with V2DI, V2DF V4SI, V4SF, V8HI, V16QI on Power9-LE.
2021-01-22 Xionghu Luo <luoxhu@linux.ibm.com>
gcc/ChangeLog:
PR target/79251
PR target/98065
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
Ajdust variable index vec_insert from address dereference to
ARRAY_REF(VIEW_CONVERT_EXPR) tree expression.
* config/rs6000/rs6000-protos.h (rs6000_expand_vector_set_var):
New declaration.
* config/rs6000/rs6000.c (rs6000_expand_vector_set_var): New function.
2021-01-22 Xionghu Luo <luoxhu@linux.ibm.com>
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/pr79251.p9.c: New test.
* gcc.target/powerpc/pr79251-run.c: New test.
* gcc.target/powerpc/pr79251.h: New header.
The driver checks whether OPT_SPECIAL_input_file options are readable.
There's no need, the compiler proper will do that anyway.
gcc/
* gcc.c (process_command): Don't check OPT_SPECIAL_input_file
existence here.
The previous change exposed a miscompile when trying to interpret
CHREC_RIGHT correctly which in fact it already was to the extent
it is used. The following reverts this part of the change, only
retaining the singling out of HOST_WIDE_INT_MIN.
2021-01-22 Richard Biener <rguenther@suse.de>
PR middle-end/98773
* tree-data-ref.c (initalize_matrix_A): Revert previous
change, retaining failing on HOST_WIDE_INT_MIN CHREC_RIGHT.
* gcc.dg/torture/pr98773.c: New testcase.
In the PR Andrew said he has implemented a simplification that has been
added to LLVM, but that actually is not true, what is in there are
X * (X cmp 0.0 ? +-1.0 : -+1.0) simplifications into +-abs(X)
but what has been added into GCC are (X cmp 0.0 ? +-1.0 : -+1.0)
simplifications into copysign(1, +-X) and then
X * copysign (1, +-X) into +-abs (X).
The problem is with the (X cmp 0.0 ? +-1.0 : -+1.0) simplifications,
they don't work correctly when X is zero.
E.g.
(X > 0.0 ? 1.0 : -1.0)
is -1.0 when X is either -0.0 or 0.0, but copysign will make it return
1.0 for 0.0 and -1.0 only for -0.0.
(X >= 0.0 ? 1.0 : -1.0)
is 1.0 when X is either -0.0 or 0.0, but copysign will make it return
still 1.0 for 0.0 and -1.0 for -0.0.
The simplifications were guarded on !HONOR_SIGNED_ZEROS, but as discussed in
the PR, that option doesn't mean that -0.0 will not ever appear as operand
of some operation, it is hard to guarantee that without compiler adding
canonicalizations of -0.0 to 0.0 after most of the operations and thus
making it very slow, but that the user asserts that he doesn't care if the result
of operations will be 0.0 or -0.0. Not to mention that some of the
transformations are incorrect even for positive 0.0.
So, instead of those simplifications this patch recognizes patterns where
those ?: expressions are multiplied by X, directly into +-abs.
That works fine even for 0.0 and -0.0 (as long as we don't care about
whether the result is exactly 0.0 or -0.0 in those cases), because
whether the result of copysign is -1.0 or 1.0 doesn't matter when it is
multiplied by 0.0 or -0.0.
As a follow-up, maybe we should add the simplification mentioned in the PR,
in particular doing copysign by hand through
VIEW_CONVERT_EXPR <int, float_X> < 0 ? -float_constant : float_constant
into copysign (float_constant, float_X). But I think that would need to be
done in phiopt.
2021-01-22 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/90248
* match.pd (X cmp 0.0 ? 1.0 : -1.0 -> copysign(1, +-X),
X cmp 0.0 ? -1.0 : +1.0 -> copysign(1, -+X)): Remove
simplifications.
(X * (X cmp 0.0 ? 1.0 : -1.0) -> +-abs(X),
X * (X cmp 0.0 ? -1.0 : 1.0) -> +-abs(X)): New simplifications.
* gcc.dg/tree-ssa/copy-sign-1.c: Don't expect any copysign
builtins.
* gcc.dg/pr90248.c: New test.
As discussed in the PR, the problem here is that the routines changed in
this patch sign extend the difference of index and low_bound from the
precision of the index, so e.g. when index is unsigned int and contains
value -2U, we treat it as index -2 rather than 0x00000000fffffffeU on 64-bit
arches.
On the other hand, get_inner_reference which is used during expansion, does:
if (! integer_zerop (low_bound))
index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
index, low_bound);
offset = size_binop (PLUS_EXPR, offset,
size_binop (MULT_EXPR,
fold_convert (sizetype, index),
unit_size));
which effectively requires that either low_bound is constant 0 and then
index in ARRAY_REFs can be arbitrary type which is then sign or zero
extended to sizetype, or low_bound is something else and then index and
low_bound must have compatible types and it is still converted afterwards to
sizetype and from there then a few lines later:
expr.c- if (poly_int_tree_p (offset))
expr.c- {
expr.c: poly_offset_int tem = wi::sext (wi::to_poly_offset (offset),
expr.c- TYPE_PRECISION (sizetype));
The following patch makes those routines match what get_inner_reference is
doing.
2021-01-22 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/98255
* tree-dfa.c (get_ref_base_and_extent): For ARRAY_REFs, sign
extend index - low_bound from sizetype's precision rather than index
precision.
(get_addr_base_and_unit_offset_1): Likewise.
* tree-ssa-sccvn.c (ao_ref_init_from_vn_reference): Likewise.
* gimple-fold.c (fold_const_aggregate_ref_1): Likewise.
* gcc.dg/pr98255.c: New test.
This fixes factor_out_conditional_conversion to avoid creating overlapping
lifetimes for abnormals. It also makes sure we do deal with a conditional
conversion (at least for one PHI arg def) - for the testcase that wasn't the case.
2021-01-22 Richard Biener <rguenther@suse.de>
PR tree-optimization/98786
* tree-ssa-phiopt.c (factor_out_conditional_conversion): Avoid
adding new uses of abnormals. Verify we deal with a conditional
conversion.
* gcc.dg/torture/pr98786.c: New testcase.
gcc/ChangeLog:
PR target/96891
PR target/98348
* config/i386/sse.md (VI_128_256): New mode iterator.
(*avx_cmp<mode>3_1, *avx_cmp<mode>3_2, *avx_cmp<mode>3_3,
*avx_cmp<mode>3_4, *avx2_eq<mode>3, *avx2_pcmp<mode>3_1,
*avx2_pcmp<mode>3_2, *avx2_gt<mode>3): New
define_insn_and_split to lower avx512 vector comparison to avx
version when dest is vector.
(*<avx512>_cmp<mode>3,*<avx512>_cmp<mode>3,*<avx512>_ucmp<mode>3):
define_insn_and_split for negating the comparison result.
* config/i386/predicates.md (float_vector_all_ones_operand):
New predicate.
* config/i386/i386-expand.c (ix86_expand_sse_movcc): Use
general NOT operator without UNSPEC_MASKOP.
gcc/testsuite/ChangeLog:
PR target/96891
PR target/98348
* gcc.target/i386/avx512bw-pr96891-1.c: New test.
* gcc.target/i386/avx512f-pr96891-1.c: New test.
* gcc.target/i386/avx512f-pr96891-2.c: New test.
* gcc.target/i386/avx512f-pr96891-3.c: New test.
* g++.target/i386/avx512f-pr96891-1.C: New test.
* gcc.target/i386/bitwise_mask_op-3.c: Adjust testcase.
Another ICE with delayed noexcept parsing, but a bit gnarlier.
A function definition marked with __attribute__((used)) ought to be
emitted even when it is not referenced in the TU. For a member function
template marked with __attribute__((used)) this means that it will
be instantiated: in instantiate_class_template_1 we have
11971 /* Instantiate members marked with attribute used. */
11972 if (r != error_mark_node && DECL_PRESERVE_P (r))
11973 mark_used (r);
It is not so surprising that this doesn't work well with delayed
noexcept parsing: when we're processing the function template we delay
the parsing, so the member "foo" is found, but then when we're
instantiating it, "foo" hasn't yet been seen, which creates a
discrepancy and a crash ensues. "foo" hasn't yet been seen because
instantiate_class_template_1 just loops over the class members and
instantiates right away.
To make it work, this patch uses a vector to keep track of members
marked with attribute used and uses it to instantiate such members
only after we're done with the class; in particular, after we have
called finish_member_declaration for each member. And we ought to
be verifying that we did emit such members, so I've added a bunch
of dg-finals.
gcc/cp/ChangeLog:
PR c++/97966
* pt.c (instantiate_class_template_1): Instantiate members
marked with attribute used only after we're done instantiating
the class.
gcc/testsuite/ChangeLog:
PR c++/97966
* g++.dg/cpp0x/noexcept63.C: New test.
Both lambda-uneval1.C and lambda-uneval5.C test that a symbol is not
declared global by looking for "globl" assembler directive. The testcases
generate the "lglobl" directive in AIX XCOFF, which is a false positive.
This patch restricts the regex to ignore a prepended "l". The patch
also tightens the regex to specifically look for space, tab or period
between the "globl" and the symbol.
Tested on powerpc-ibm-aix7.2.3.0 and powerpc64le-linux-gnu.
* g++.dg/cpp2a/lambda-uneval1.C: Ignore preceding "l" and
intervening period.
* g++.dg/cpp2a/lambda-uneval5.C: Ignore preceding "l" and
explicitly check for intervening space, tab or period.
LRA did not extend ira_reg_equiv after generation of a pseudo in
eliminate_regs_in_insn which might results in LRA crash. It is better not
to extend ira_reg_equiv but to use preliminary generated pseudo. The
patch implements it.
gcc/ChangeLog:
PR rtl-optimization/98777
* lra-int.h (lra_pmode_pseudo): New extern.
* lra.c (lra_pmode_pseudo): New global.
(lra): Set it up.
* lra-eliminations.c (eliminate_regs_in_insn): Use it.
gcc/testsuite/ChangeLog:
PR rtl-optimization/98777
* gcc.target/riscv/pr98777.c: New.
Suppose we have:
(set (reg/v:TF 63) (mem/c:TF (reg/v:DI 62)))
(set (reg:FPRX2 66) (subreg:FPRX2 (reg/v:TF 63) 0))
It is clearly profitable to propagate the first insn into the second
one and get:
(set (reg:FPRX2 66) (mem/c:FPRX2 (reg/v:DI 62)))
fwprop actually manages to perform this, but doesn't think the result is
worth it, which results in unnecessary store/load sequences on s390.
Improve the situation by classifying SUBREG -> MEM changes as
profitable.
gcc/ChangeLog:
2021-01-15 Ilya Leoshkevich <iii@linux.ibm.com>
* fwprop.c (fwprop_propagation::classify_result): Allow
(subreg (mem)) simplifications.
Here after resolving the address of a template-id inside decltype, we
end up instantiating the chosen specialization (from the call to
mark_used in resolve_nondeduced_context), even though only its type is
needed.
This patch sets cp_unevaluated_operand throughout finish_decltype_type,
so that in particular it's set during the call to
resolve_nondeduced_context within.
gcc/cp/ChangeLog:
PR c++/71879
* semantics.c (finish_decltype_type): Set up a cp_unevaluated
sentinel at the start of the function. Remove a now-redundant
manual adjustment of cp_unevaluated_operand.
gcc/testsuite/ChangeLog:
PR c++/71879
* g++.dg/cpp0x/decltype-71879.C: New test.
One may not use a null this pointer to invoke a static member
function. This fixes the remaining ubsan errors found with an
ubsan bootstrap.
PR c++/98624
gcc/cp/
* module.cc (depset:#️⃣:find_dependencies): Add
module arg.
(trees_out::core_vals): Check state before calling
write_location.
(sort_cluster, module_state::write): Adjust
find_dependencies call.
The following testcase is rejected even when it is valid.
The problem is that potential_constant_expression_1 doesn't have the
accurate *jump_target tracking cxx_eval_* has, and when the loop has
a condition that isn't guaranteed to be always true, the body isn't walked
at all. That is mostly a correct conservative behavior, except that it
doesn't detect if there are any return statements in the body, which means
the loop might return instead of falling through to the next statement.
We already have code for return stmt discovery in code snippets we don't
try to evaluate for switches, so this patch reuses that for FOR_STMT
and WHILE_STMT bodies.
Note, I haven't touched FOR_EXPR, with statement expressions it could
have return stmts in it too, or it could have break or continue statements
that wouldn't bind to the current loop but to something outer. That
case is clearly mishandled by potential_constant_expression_1 even
when the condition is missing or is always true, and it wouldn't surprise me
if cxx_eval_* didn't handle it right either, so I'm deferring that to
separate PR for later. We'd need proper test coverage for all of that.
> Hmm, IF_STMT probably also needs to check the else clause, if the condition
> isn't a known constant.
You're right, I thought it was ok because it recurses with tf_none, but
if the then branch is potentially constant and only else returns, continues
or breaks, then as the enhanced testcase shows we were mishandling it too.
2021-01-21 Jakub Jelinek <jakub@redhat.com>
PR c++/98672
* constexpr.c (check_for_return_continue_data): Add break_stmt member.
(check_for_return_continue): Also look for BREAK_STMT. Handle
SWITCH_STMT by ignoring break_stmt from its body.
(potential_constant_expression_1) <case FOR_STMT>,
<case WHILE_STMT>: If the condition isn't constant true, check if
the loop body can contain a return stmt.
<case SWITCH_STMT>: Adjust check_for_return_continue_data initializer.
<case IF_STMT>: If recursion with tf_none is successful,
merge *jump_target from the branches - returns with highest priority,
breaks or continues lower. If then branch is potentially constant and
doesn't return, check the else branch if it could return, break or
continue.
* g++.dg/cpp1y/constexpr-98672.C: New test.
The aarch64_sqdml<SBINQOPS:as>l patterns are of the form:
[(set (match_operand:<VWIDE> 0 "register_operand" "=w")
(SBINQOPS:<VWIDE>
(match_operand:<VWIDE> 1 "register_operand" "0")
(ss_ashift:<VWIDE>
(mult:<VWIDE>
(sign_extend:<VWIDE>
(match_operand:VSD_HSI 2 "register_operand" "w"))
(sign_extend:<VWIDE>
(match_operand:VSD_HSI 3 "register_operand" "w")))
(const_int 1))))]
where SBINQOPS is ss_plus and ss_minus. The problem is that for the
ss_plus case the RTL
is not canonical: the (match_oprand 1) should be the second arm of the
PLUS.
I've seen this manifest in combine missing some legitimate
simplifications because it generates
the canonical ss_plus form and fails to match the pattern.
This patch splits the patterns into the ss_plus and ss_minus forms with
the canonical form for each.
I've seen this improve my testcase (which I can't include as it's too
large and not easy to test reliably).
gcc/ChangeLog:
* config/aarch64/aarch64-simd.md (aarch64_sqdml<SBINQOPS:as>l<mode>):
Split into...
(aarch64_sqdmlal<mode>): ... This...
(aarch64_sqdmlsl<mode>): ... And this.
(aarch64_sqdml<SBINQOPS:as>l_lane<mode>): Split into...
(aarch64_sqdmlal_lane<mode>): ... This...
(aarch64_sqdmlsl_lane<mode>): ... And this.
(aarch64_sqdml<SBINQOPS:as>l_laneq<mode>): Split into...
(aarch64_sqdmlsl_laneq<mode>): ... This...
(aarch64_sqdmlal_laneq<mode>): ... And this.
(aarch64_sqdml<SBINQOPS:as>l_n<mode>): Split into...
(aarch64_sqdmlsl_n<mode>): ... This...
(aarch64_sqdmlal_n<mode>): ... And this.
(aarch64_sqdml<SBINQOPS:as>l2<mode>_internal): Split into...
(aarch64_sqdmlal2<mode>_internal): ... This...
(aarch64_sqdmlsl2<mode>_internal): ... And this.
The following traits can now access non-public members:
- hasMember
- getMember
- getOverloads
- getVirtualMethods
- getVirtualFuntions
This fixes a long-standing issue in D where the allMembers trait would
correctly return non-public members but those non-public members would
be inaccessible to other traits.
Reviewed-on: https://github.com/dlang/dmd/pull/12135
gcc/d/ChangeLog:
* dmd/MERGE: Merge upstream dmd 3a7ebef73.
Like all vcmp intrinsics, __arm_vcmpneq_s8 should return a mve_pred16_t.
2021-01-21 Christophe Lyon <christophe.lyon@linaro.org>
gcc/
* config/arm/arm_mve.h (__arm_vcmpneq_s8): Fix return type.
This was a header file that deployed the stat-hack inside a class
(both a member-class and a [non-static data] member had the same
name). Due to the way that's represented in name lookup we missed the
class. Sadly just changing the representation globally has
detrimental effects elsewhere, and this is a rare case, so just
creating a new overload on the fly shouldn't be a problem.
PR c++/98530
gcc/cp/
* name-lookup.c (lookup_class_binding): Rearrange a stat-hack.
gcc/testsuite/
* g++.dg/modules/stat-mem-1.h: New.
* g++.dg/modules/stat-mem-1_a.H: New.
* g++.dg/modules/stat-mem-1_b.C: New.
This removes a trivial whitespace difference between the currently
committed file and the one regenerated by autotools.
libstdc++-v3/ChangeLog:
* src/c++17/Makefile.in: Regenerate.
2021-01-21 Paul Thomas <pault@gcc.gnu.org>
gcc/fortran
PR fortran/96320
* decl.c (gfc_match_modproc): It is not an error to find a
module procedure declaration within a contains block.
* expr.c (gfc_check_vardef_context): Pure procedure result is
assignable. Change 'own_scope' accordingly.
* resolve.c (resolve_typebound_procedure): A procedure that
has the module procedure attribute is almost certainly a
module procedure, whatever its interface.
gcc/testsuite/
PR fortran/96320
* gfortran.dg/module_procedure_5.f90 : New test.
* gfortran.dg/module_procedure_6.f90 : New test.
This adds more guards to the VEC_PERM_EXPR scan, namely that
we also could end up with load-lanes and of course no vectorization
at all. Need dependent scans (scan-if-scan-X PASSed ...).
2021-01-21 Richard Biener <rguenther@suse.de>
PR testsuite/97299
* gcc.dg/vect/slp-reduc-3.c: Amend target selectors.
If SRC had been assigned a mode narrower than the copy, we can't
always link DEST into the chain even they have same
hard_regno_nregs(i.e. HImode/SImode in i386 backend).
i.e
kmovw %k0, %edi
vmovd %edi, %xmm2
vpshuflw $0, %xmm2, %xmm0
kmovw %k0, %r8d
kmovd %k0, %r9d
...
- movl %r9d, %r11d
+ vmovd %xmm2, %r11d
gcc/ChangeLog:
PR rtl-optimization/98694
* regcprop.c (copy_value): If SRC had been assigned a mode
narrower than the copy, we can't link DEST into the chain even
they have same hard_regno_nregs(i.e. HImode/SImode in i386
backend).
gcc/testsuite/ChangeLog:
PR rtl-optimization/98694
* gcc.target/i386/pr98694.c: New test.
g++.dg/warn/Wstringop-overflow-6.C tests for a bogus overflow warning in
system headers. This testcase was generating a -Wchar-subscript warning
on AIX because ctype_inline.h was subscripting AIX _OBJ_DATA using a char.
The _M_table case cast the subscript to unsigned char, but the _OBJ_DATA
case did not.
The investigation also exposed that AIX has added a thread-safe variant
of access to __lc_type that had not been applied to the libstdc++
implementation.
This patch casts the subscript to unsigned char and adds the THREAD_SAFE
variant. libstdc++ always is compiled with pthreads, but it is good
to make the situation explicit and to document the appropriate usage.
Bootstrapped on powerpc-ibm-aix7.2.3.0.
libstdc++-v3/ChangeLog:
* config/os/aix/ctype_inline.h (bool ctype<char>:: is): Cast
_OBJ_DATA subscript to unsigned char. Add _THREAD_SAFE access to
__lc_type.
(const char* ctype<char>:: is): Same.
Adjust testcase to so the ADD that is expected to overflow cannot
be optimized.
gcc/testsuite
* gcc.dg/torture/ftrapv-2.c: Make overflow instruction unremovable.
On Wed, Jan 20, 2021 at 05:04:39PM +0100, Florian Weimer wrote:
> Sorry, this appears to cause OpenMP task state corruption in RPM. We
> have only seen this on s390x.
Haven't actually verified it, but my suspection is that this is a caller
stack corruption.
We play with fire with the GOMP_task API/ABI extensions, the GOMP_task
function used to be:
void
GOMP_task (void (*fn) (void *), void *data, void (*cpyfn) (void *, void *),
long arg_size, long arg_align, bool if_clause, unsigned flags);
and later:
void
GOMP_task (void (*fn) (void *), void *data, void (*cpyfn) (void *, void *),
long arg_size, long arg_align, bool if_clause, unsigned flags,
void **depend);
and later:
void
GOMP_task (void (*fn) (void *), void *data, void (*cpyfn) (void *, void *),
long arg_size, long arg_align, bool if_clause, unsigned flags,
void **depend, int priority);
and now:
void
GOMP_task (void (*fn) (void *), void *data, void (*cpyfn) (void *, void *),
long arg_size, long arg_align, bool if_clause, unsigned flags,
void **depend, int priority, void *detach)
and which of those depend, priority and detach argument is present depends
on the bits in flags.
I'm afraid the compiler just decided to spill the detach = NULL store in
if ((flags & GOMP_TASK_FLAG_DETACH) == 0)
detach = NULL;
on s390x into the argument stack slot. Not a problem if the caller passes
all those 10 arguments, but if not, can clobber random stack location.
This hack should fix it up. Priority doesn't need changing, but I've
changed it anyway just to be safe. With the patch none of the 3 arguments
are ever modified, so I'd hope gcc doesn't decide to spill something
unrelated there.
2021-01-20 Jakub Jelinek <jakub@redhat.com>
* task.c (GOMP_task): Rename priority argument to priority_arg,
add priority automatic variable and modify that variable. Instead of
clearing detach argument when GOMP_TASK_FLAG_DETACH bit is not set,
check flags for that bit.
I'd forgotten that left shifting a negative value is UB until C++20.
Insert some casts to do unsigned shifts.
PT c++/98625
gcc/cp/
* module.cc (bytes_in::i, bytes_in::wi): Avoid left shift of
signed type.
In certain intrinsics use cases GCC leaves SETs of a bottom-element vec
select lying around:
(vec_select:DI (reg:V2DI 34 v2 [orig:128 __o ] [128])
(parallel [
(const_int 0 [0])
])))
This can be treated as a simple move in aarch64 when done between SIMD
registers for all normal widths.
These go through the aarch64_get_lane pattern.
This patch adds a splitter there to simplify these extracts to a move
that can, perhaps, be optimised a way.
Another benefit is if the destination is memory we can use a simpler STR
instruction rather than ST1-lane.
gcc/
* config/aarch64/aarch64-simd.md (aarch64_get_lane<mode>):
Convert to define_insn_and_split. Split into simple move when moving
bottom element.
gcc/testsuite/
* gcc.target/aarch64/vdup_lane_2.c: Scan for fmov rather than
dup.
One of the advantages of LRA is that you can create new pseudos from it
just fine. The code in rs6000_emit_le_vsx_store was not aware of this.
This patch changes that, in the process fixing PR98549 (where it is
shown that we do call rs6000_emit_le_vsx_store during LRA, which we
used to assert can not happen).
2021-01-20 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/rs6000.c (rs6000_emit_le_vsx_store): Change assert.
Adjust comment. Simplify code.
As mentioned in the PR, with -gdwarf-5 (or -g now) -flto -ffat-lto-objects,
users can't strip the LTO sections with
strip -p -R .gnu.lto_* -R .gnu.debuglto_* -N __gnu_lto_v1
anymore when GCC is configured against recent binutils.
The problem is that in that case .gnu.debuglto_.debug_line_str section is
then used, which is fine for references to strings in .gnu.debuglto_.*
sections, but not when those references are in .debug_info section too;
those should really reference separate strings in .debug_line_str section.
For .gnu.debuglto_.debug_str vs. .debug_str we handle it right, we
reset_indirect_string the strings and thus force creation of new labels for
the second time.
But for DW_FORM_line_strp as the patch shows, there were multiple problems.
First one was that reset_indirect_string, even when called through traverse
on debug_line_str_hash, didn't do anything at all (fixed by first hunk).
The second bug was that the DW_FORM_line_strp strings, which were supposed
to be only visible through debug_line_str_hash, leaked into debug_str_hash
(second hunk).
And the third thing is that when we reset debug_line_str_hash, we should
still make those strings DW_FORM_line_strp if they are accessed.
One could do it by reinstantiating DW_FORM_line_strp right away in
reset_indirect_string and not clear debug_line_str_hash, but that has the
disadvantage that we then force emitting .debug_line_str strings that aren't
really needed - we need those from the CU DIEs' DW_AT_name and
DW_AT_comp_dir attributes, but when emitting .debug_line section through
assembler, we don't need to emit the strings we only needed for
.gnu.debuglto_.debug_line which is always emitted by the compiler.
2021-01-20 Jakub Jelinek <jakub@redhat.com>
PR debug/98765
* dwarf2out.c (reset_indirect_string): Also reset indirect strings
with DW_FORM_line_strp form.
(prune_unused_types_update_strings): Don't add into debug_str_hash
indirect strings with DW_FORM_line_strp form.
(adjust_name_comp_dir): New function.
(dwarf2out_finish): Call it on CU DIEs after resetting
debug_line_str_hash.
Patch cf2ac1c30a for solving PR97969 was
assumed for targets with absent 3-op add insn. But the original patch did
not check this. This patch adds the check.
gcc/ChangeLog:
PR rtl-optimization/98722
* lra-eliminations.c (eliminate_regs_in_insn): Check that target
has no 3-op add insn to transform insns containing two pluses.
gcc/testsuite/ChangeLog:
PR rtl-optimization/98722
* g++.target/s390/pr98722.C: New.
The following tries to handle overflow in the integer computations
done by lambda ops of dependence analysis by failing instead of
silently continuing with overflowed values.
It also avoids treating large unsigned CHREC_RIGHT as negative
unless the chrec is of pointer type and avoids the most negative
integer value to avoid excessive overflow checking (with this
the fix for PR98758 can be partly simplified as seen).
I've added add_hwi and mul_hwi functions computing HOST_WIDE_INT
signed sum and product with indicating overflow, they hopefully
get matched to the appropriate internal functions.
I don't have any testcases triggering overflow in any of the
guarded computations.
2021-01-20 Richard Biener <rguenther@suse.de>
* hwint.h (add_hwi): New function.
(mul_hwi): Likewise.
* tree-data-ref.c (initialize_matrix_A): Properly translate
tree constants and avoid HOST_WIDE_INT_MIN.
(lambda_matrix_row_add): Avoid undefined integer overflow
and return true on such overflow.
(lambda_matrix_right_hermite): Handle overflow from
lambda_matrix_row_add gracefully. Simplify previous fix.
(analyze_subscript_affine_affine): Likewise.
This patch adds patterns for optimizing
x < y || y == XXX_MIN to x <= y-1
x >= y && y != XXX_MIN to x > y-1
if y is an integer with TYPE_OVERFLOW_WRAPS.
This fixes pr96674.
Tested on x86_64-pc-linux-gnu.
For this function
bool f(unsigned a, unsigned b)
{
return (b == 0) | (a < b);
}
the code without the patch is
test esi,esi
sete al
cmp esi,edi
seta dl
or eax,edx
ret
the code with the patch is
sub esi,0x1
cmp esi,edi
setae al
ret
PR tree-optimization/96674
gcc/
* match.pd: New patterns: x < y || y == XXX_MIN --> x <= y - 1
x >= y && y != XXX_MIN --> x > y - 1
gcc/testsuite
* gcc.dg/pr96674.c: New tests.
Here, during partial instantiation of the generic lambda, we do
tsubst_copy on the CLASS_PLACEHOLDER_TEMPLATE for U{0} which yields a
(level-lowered) TEMPLATE_TEMPLATE_PARM rather than the corresponding
TEMPLATE_DECL. This later confuses do_class_deduction which expects
that a CLASS_PLACEHOLDER_TEMPLATE is always a TEMPLATE_DECL.
gcc/cp/ChangeLog:
PR c++/95434
* pt.c (tsubst) <case TEMPLATE_TYPE_PARM>: If tsubsting
CLASS_PLACEHOLDER_TEMPLATE yields a TEMPLATE_TEMPLATE_PARM,
adjust to its TEMPLATE_TEMPLATE_PARM_TEMPLATE_DECL.
gcc/testsuite/ChangeLog:
PR c++/95434
* g++.dg/cpp2a/lambda-generic9.C: New test.
When parsing the base-clause of a class declaration, we need to defer
access checking until the entire base-clause has been seen, so that
access can be properly checked relative to the scope of the class with
all its bases attached. This allows us to accept the declaration of
struct D from Example 2 of [class.access.general] (access12.C below).
Similarly when substituting into the base-clause of a class template,
which is the subject of PR82613.
gcc/cp/ChangeLog:
PR c++/82613
* parser.c (cp_parser_class_head): Defer access checking when
parsing the base-clause until all bases are seen and attached
to the class type.
* pt.c (instantiate_class_template): Likewise when substituting
into dependent bases.
gcc/testsuite/ChangeLog:
PR c++/82613
* g++.dg/parse/access12.C: New test.
* g++.dg/template/access35.C: New test.
duplicate_and_interleave is the main fallback way of loading
a repeating sequence of elements into variable-length vectors.
The code handles cases in which the number of elements in the
sequence is potentially several times greater than the number
of elements in a vector.
Let:
- NE be the (compile-time) number of elements in the sequence
- NR be the (compile-time) number of vector results and
- VE be the (run-time) number of elements in each vector
The basic approach is to duplicate each element into a
separate vector, giving NE vectors in total, then use
log2(NE) rows of NE permutes to generate NE results.
In the worst case — when VE has no known compile-time factor
and NR >= NE — all of these permutes are necessary. However,
if VE is known to be a multiple of 2**F, then each of the
first F permute rows produces duplicate results; specifically,
the high permute for a given pair is the same as the low permute.
The code dealt with this by reusing the low result for the
high result. This part was OK.
However, having duplicate results from one row meant that the
next row did duplicate work. The redundancies would be optimised
away by later passes, but the code tried to avoid generating them
in the first place. This is the part that went wrong.
Specifically, NR is typically less than NE when some permutes are
redundant, so the code tried to use NR to reduce the amount of work
performed. The problem was that, although it correctly calculated
a conservative bound on how many results were needed in each row,
it chose the wrong results for anything other than the final row.
This doesn't usually matter for fully-packed SVE vectors. We first
try to coalesce smaller elements into larger ones, so normally
VE ends up being 2**VQ (where VQ is the number of 128-bit blocks
in an SVE vector). In that situation we'd only apply the faulty
optimisation to the final row, i.e. the case it handled correctly.
E.g. for things like:
void
f (long *x)
{
for (int i = 0; i < 100; i += 8)
{
x[i] += 1;
x[i + 1] += 2;
x[i + 2] += 3;
x[i + 3] += 4;
x[i + 4] += 5;
x[i + 5] += 6;
x[i + 6] += 7;
x[i + 7] += 8;
}
}
(already tested by the testsuite), we'd have 3 rows of permutes
producing 4 vector results. The schemne produced:
1st row: 8 results from 4 permutes, highs duplicates of lows
2nd row: 8 results from 8 permutes (half of which are actually redundant)
3rd row: 4 results from 4 permutes
However, coalescing elements is trickier for unpacked vectors,
and at the moment we don't try to do it (see the GET_MODE_SIZE
check in can_duplicate_and_interleave_p). Unpacked vectors
therefore stress the code in ways that packed vectors didn't.
The patch fixes this by removing the redundancies from each row,
rather than trying to work around them later. This also removes
the redundant work in the second row of the example above.
gcc/
PR tree-optimization/98535
* tree-vect-slp.c (duplicate_and_interleave): Use quick_grow_cleared.
If the high and low permutes are the same, remove the high permutes
from the working set and only continue with the low ones.
The following patch fixes two bugs in the access_ref::inform_access function
(plus some formatting nits).
The first problem is that ref can be various things, e.g. *_DECL, or
SSA_NAME, or IDENTIFIER_NODE. And allocfn is non-NULL only if ref is
(at least originally) an SSA_NAME initialized to the result of some
allocator function (but not e.g. __builtin_alloca_with_align which is
handled differently).
A few lines above the last hunk of this patch in builtins.c, the code uses
if (mode == access_read_write || mode == access_write_only)
{
if (allocfn == NULL_TREE)
{
if (*offstr)
inform (loc, "at offset %s into destination object %qE of size %s",
offstr, ref, sizestr);
else
inform (loc, "destination object %qE of size %s", ref, sizestr);
return;
}
if (*offstr)
inform (loc,
"at offset %s into destination object of size %s "
"allocated by %qE", offstr, sizestr, allocfn);
else
inform (loc, "destination object of size %s allocated by %qE",
sizestr, allocfn);
return;
}
so if allocfn is NULL, it prints whatever ref is, if it is non-NULL,
it prints instead the allocation function. But strangely the hunk
a few lines below wasn't consistent with that and instead printed the
first form only if DECL_P (ref) and would ICE if ref wasn't a decl but
still allocfn was NULL. Fixed by making it consistent what the code does
earlier.
Another bug is that the code earlier contains an ugly hack for VLAs and was
assuming that SSA_NAME_IDENTIFIER must be non-NULL on the lhs of
__builtin_alloca_with_align. While that is likely true for the cases where
the compiler emits this builtin for VLAs (and it will also be true that
the name of the VLA in that case can be taken from that identifier up to the
first .), the builtin is user accessible as the testcase shows, so one can
have any other SSA_NAME in there. I think it would be better to add some
more reliable way how to identify VLA names corresponding to
__builtin_alloca_with_align allocations, perhaps internal fn or whatever,
but that is beyond the scope of this patch.
2021-01-20 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/98721
* builtins.c (access_ref::inform_access): Don't assume
SSA_NAME_IDENTIFIER must be non-NULL. Print messages about
object whenever allocfn is NULL, rather than only when DECL_P
is true. Use %qE instead of %qD for that. Formatting fixes.
* gcc.dg/pr98721-1.c: New test.
* gcc.dg/pr98721-2.c: New test.
This fixes some int arithmetic issues and a bogus truncation.
2021-01-20 Richard Biener <rguenther@suse.de>
PR tree-optimization/98758
* tree-data-ref.c (int_divides_p): Use lambda_int arguments.
(lambda_matrix_right_hermite): Avoid undefinedness with
signed integer abs and multiplication.
(analyze_subscript_affine_affine): Use lambda_int.
* gcc.dg/torture/pr98758.c: New testcase.
Similarly to how we handle erroneous operands to e.g. allocate clause,
this change just removes those clauses instead of accessing TYPE_MAIN_VARIANT
of its type, which doesn't work on error_mark_node. Also, just for good
measure, bails out if TYPE_NAME is NULL.
2021-01-20 Jakub Jelinek <jakub@redhat.com>
PR c++/98742
* semantics.c (finish_omp_clauses) <case OMP_CLAUSE_DETACH>: If
error_operand_p, remove clause without further checking. Check
for non-NULL TYPE_NAME.
* c-c++-common/gomp/task-detach-2.c: New test.
PR debug/98751 reports an issue in which most of libgccjit's tests
fails in DWARF 5 handling with
`.Ldebug_loc2' is already defined"
asm errors.
The bogus label is being emitted at the 3rd in-process iteration, at:
31673 ASM_OUTPUT_LABEL (asm_out_file, loc_section_label);
which on the initial iteration emits:
145 │ .Ldebug_loc0:
on the 2nd iteration:
145 │ .Ldebug_loc1:
and on the 3rd iteration:
145 │ .Ldebug_loc2:
which is a duplicate of a label emitted earlier:
138 │ .section .debug_loclists,"",@progbits
139 │ .long .Ldebug_loc3-.Ldebug_loc2
140 │ .Ldebug_loc2:
141 │ .value 0x5
142 │ .byte 0x8
143 │ .byte 0
144 │ .long 0
145 │ .Ldebug_loc2:
The issue seems to be that init_sections_and_labels creates the label
ASM_GENERATE_INTERNAL_LABEL (loc_section_label, DEBUG_LOC_SECTION_LABEL,
generation);
where "generation" is a static local to init_sections_and_labels that
increments, and thus eventually hits the duplicate value.
It appears that this value is intended to be either 0 or 1, but in
the libgccjit case the compilation code can be invoked an arbitrary
number of times in-process, and hence can eventually lead to a
label name collision.
This patch adds code to dwarf2out_c_finalize (called by
toplev::finalize in libgccjit) to reset the generation counts,
fixing the issue.
gcc/ChangeLog:
PR debug/98751
* dwarf2out.c (output_line_info): Rename static variable
"generation", moving it out of the function to...
(output_line_info_generation): New.
(init_sections_and_labels): Likewise, renaming the variable to...
(init_sections_and_labels_generation): New.
(dwarf2out_c_finalize): Reset the new variables.
