gcc/ChangeLog:
2018-02-16 Carl Love <cel@us.ibm.com>
* config/rs6000/altivec.h: Remove vec_vextract4b and vec_vinsert4b.
* config/rs6000/rs6000-builtin.def: Remove macro expansion for
VEXTRACT4B, VINSERT4B, VINSERT4B_DI and VEXTRACT4B.
* config/rs6000/rs6000.c: Remove case statements for
P9V_BUILTIN_VEXTRACT4B, P9V_BUILTIN_VEC_VEXTRACT4B,
P9V_BUILTIN_VINSERT4B, P9V_BUILTIN_VINSERT4B_DI,
and P9V_BUILTIN_VEC_VINSERT4B.
* config/rs6000/rs6000-c.c (altivec_expand_builtin): Remove entries for
P9V_BUILTIN_VEC_VEXTRACT4B and P9V_BUILTIN_VEC_VINSERT4B.
* config/rs6000/vsx.md:
* doc/extend.texi: Remove vec_vextract4b, non ABI definitions for
vec_insert4b.
gcc/testsuite/ChangeLog:
2018-02-16 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/p9-vinsert4b-1.c: Remove test file for non-ABI
tests.
* gcc.target/powerpc/p9-vinsert4b-2.c: Remove test file for non-ABI
tests.
From-SVN: r257748
gcc/ChangeLog:
2018-02-16 Carl Love <cel@us.ibm.com>
* config/rs6000/altivec.h: Add builtin names vec_extract4b
vec_insert4b.
* config/rs6000/rs6000-builtin.def: Add INSERT4B and EXTRACT4B
definitions.
* config/rs6000/rs6000-c.c: Add the definitions for
P9V_BUILTIN_VEC_EXTRACT4B and P9V_BUILTIN_VEC_INSERT4B.
* config/rs6000/rs6000.c (altivec_expand_builtin): Add
P9V_BUILTIN_EXTRACT4B and P9V_BUILTIN_INSERT4B case statements.
* config/rs6000/vsx.md: Add define_insn extract4b. Add define_expand
definition for insert4b and define insn *insert3b_internal.
* doc/extend.texi: Add documentation for vec_extract4b.
gcc/testsuite/ChangeLog:
2018-02-16 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/builtins-7-p9-runnable.c: New runnable test file
for the ABI definitions for vec_extract4b and vec_insert4b.
From-SVN: r257747
As Jakub found, after my recent combine patch at least on x86 problems
show up with RTL checking enabled. This is because the I2 generated
by a successful instruction combination can write not only a register
but it can also write a paradoxical subreg of one.
This fixes it.
* combine.c (try_combine): When adjusting LOG_LINKS for the destination
that moved to I2, also allow destinations that are a paradoxical
subreg (instead of a normal reg).
From-SVN: r257736
2018-02-16 Richard Biener <rguenther@suse.de>
PR tree-optimization/84037
PR tree-optimization/84016
PR target/82862
* config/i386/i386.c (ix86_builtin_vectorization_cost):
Adjust vec_construct for the fact we need additional higher latency
128bit inserts for AVX256 and AVX512 vector builds.
(ix86_add_stmt_cost): Scale vector construction cost for
elementwise loads.
From-SVN: r257734
2018-02-16 Richard Biener <rguenther@suse.de>
PR tree-optimization/84417
* tree-ssa.c (non_rewritable_mem_ref_base): Properly constrain
the MEM_REF offset when conversion to BIT_FIELD_REF is desired.
(non_rewritable_lvalue_p): Likewise, use poly-ints.
* gcc.dg/torture/pr84417.c: New testcase.
From-SVN: r257731
PR target/84272
* config/aarch64/cortex-a57-fma-steering.c (fma_forest::merge_forest):
Use ++iter rather than iter++ for std::list iterators.
(func_fma_steering::dfs): Likewise. Don't delete nodes right away,
defer deleting them until all nodes in the forest are processed. Do
free even leaf nodes. Change to_process into auto_vec.
* g++.dg/opt/pr84272.C: New test.
From-SVN: r257727
PR bootstrap/84405
* system.h (BROKEN_VALUE_INITIALIZATION): Define for GCC < 4.3.
* vec.h (vec_default_construct): Use memset instead of placement new
if BROKEN_VALUE_INITIALIZATION is defined.
* hash-table.h (hash_table<Descriptor, Allocator>::empty_slow): Use
memset instead of value initialization if BROKEN_VALUE_INITIALIZATION
is defined.
From-SVN: r257726
PR rtl-optimization/81443
* rtlanal.c (num_sign_bit_copies1) <SUBREG>: Do not propagate results
from inner REGs to paradoxical SUBREGs.
From-SVN: r257724
2018-02-16 Richard Biener <rguenther@suse.de>
PR tree-optimization/84399
* graphite-scop-detection.c (scop_detection::stmt_simple_for_scop_p):
For operands we can analyze at their definition make sure we can
analyze them at each use as well.
* gcc.dg/graphite/pr84399.c: New testcase.
From-SVN: r257723
2018-02-16 Richard Biener <rguenther@suse.de>
PR tree-optimization/84190
* tree-ssa.c (non_rewritable_mem_ref_base): Do not touch
volatile accesses if the decl isn't volatile.
* g++.dg/torture/pr84190.C: New testcase.
From-SVN: r257721
2018-02-15 Janus Weil <janus@gcc.gnu.org>
PR fortran/84409
* interface.c (check_dtio_arg_TKR_intent): Add a check for character
length.
2018-02-15 Janus Weil <janus@gcc.gnu.org>
PR fortran/84409
* gfortran.dg/dtio_21.f03: Add an error message.
* gfortran.dg/dtio_22.f90: Fix invalid test case.
From-SVN: r257711
PR preprocessor/83708
* macro.c (vaopt_state): Reorder m_last_was_paste before m_state.
(vaopt_state::vaopt_state): Adjust.
(vaopt_state::update_flags): Add BEGIN and END.
(vaopt_state::update): Return them.
(copy_paste_flag): Factor out of replace_args.
(last_token_is): New.
(replace_args): Handle BEGIN and END. Avoid padding there.
(tokens_buff_last_token_ptr): Return NULL if no tokens.
Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
From-SVN: r257696
PR tree-optimization/84383
* tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Don't look at
dstoff nor call operand_equal_p if dstbase is NULL.
* gcc.c-torture/compile/pr84383.c: New test.
From-SVN: r257684
PR tree-optimization/84334
* match.pd ((A +- CST1) +- CST2 -> A + CST3): If A is
also a CONSTANT_CLASS_P, punt.
* gcc.dg/pr84334.c: New test.
From-SVN: r257683
gcc/
* config/riscv/riscv.c (riscv_first_stack_step): Move locals after
first SMALL_OPERAND check. New local min_second_step. Move assert
to where locals are set. Add TARGET_RVC support.
* config/riscv/riscv.h (C_SxSP_BITS, SWSP_REACH, SDSP_REACH): New.
From-SVN: r257681
gcc/ChangeLog:
PR tree-optimization/83698
* gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For
arrays constrain the offset range to their bounds.
(builtin_access::strcat_overlap): Adjust the bounds of overlap offset.
(builtin_access::overlap): Avoid setting the size of overlap if it's
already been set.
(maybe_diag_overlap): Also consider arrays when deciding what values
of offsets to include in diagnostics.
gcc/testsuite/ChangeLog:
PR tree-optimization/83698
* gcc.dg/Wrestrict-7.c: New test.
* c-c++-common/Wrestrict.c: Adjust expected values for strcat.
* gcc.target/i386/chkp-stropt-17.c: Same.
From-SVN: r257676
2018-02-14 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/builtins-4-int128-runnable.c
(dg-require-effective-target): Change vsx_hw to p8vector_hw.
(dg-options): Change -maltivec -mvsx to -mpower8-vector.
From-SVN: r257675
gcc/ChangeLog:
PR c/84108
* attribs.c (diag_attr_exclusions): Consider the exclusion(s)
that correspond to the kind of a declaration.
gcc/testsuite/ChangeLog:
PR c/84108
* gcc.dg/Wattributes-8.c: New test.
From-SVN: r257674
