When creating type descriptor variables, the compiler (specifically
Type::make_type_descriptor_var) invokes the immutable_struct() and
immutable_struct_set_init() back end methods, so as to insure that
these items go into the ".rodata" section of the generate object file.
The expression initializers for these variables can contain nested
subexpressions, however, and these subexpressions were not always
being placed into .rodata. This patch changes the backend-gen code for
slice initializers to emit implicit variables into .rodata if those
initializers are part of a type descriptor init.
Reviewed-on: https://go-review.googlesource.com/132596
From-SVN: r264181
* call.c (struct conversion): Update commentary.
(standard_conversion): Set rvaluedness_matches_p if LOOKUP_PREFER_RVALUE
for ck_base.
* g++.dg/cpp0x/move-return2.C: New test.
From-SVN: r264172
In this testcase, the call to f() can never be a constant
expression, but that's not a problem because it isn't always
reached by calls to g. We were wrongly rejecting this because
potential_constant_expression_1 lacked the jump tracking that
cxx_eval_constant_expression has. So this patch adds a simpler
version of that tracking.
* constexpr.c (potential_constant_expression_1): Add jump_target.
(breaks): Check for BREAK_STMT.
(continues): Check for CONTINUE_STMT.
From-SVN: r264171
As pointed out by Bernhard Reutner-Fischer, this function is unused
since the fix for PR 53796 in November 2017.
2018-09-07 Janne Blomqvist <jb@gcc.gnu.org>
* runtime/environ.c (init_unsigned_integer): Remove.
From-SVN: r264163
DImode for x87 on 32bit targets. Conditionally disable x87 modes
with X87_ENABLE_FLOAT. Remove preparation code.
(*float<SWI48:mode><MODEF:mode>2): Rename from
*float<SWI48:mode><MODEF:mode>2_mixed. Handle x87, SSE and mixed
math using "enabled" attribute.
(*floatdi<MODEF:mode>2_i387): Rename from
*float<SWI48x:mode><MODEF:mode>2_i387. Handle only DImode and
enable for 32bit targets only.
(floatdi<X87MODEF:mode>2_i387_with_xmm pre-reload splitter): New
splitter.
(floatdi<X87MODEF:mode>2_i387_with_xmm): Use register_operand
as operand 1 predicate. Rewrite as define_insn_and_split.
(floatdi<X87MODEF:mode>2_i387_with_xmm memory input splitter): Remove.
From-SVN: r264160
* constexpr.c (potential_constant_expression_1) <case RANGE_FOR_STMT>:
Recur into RANGE_FOR_INIT_STMT.
* cp-tree.def: Add RANGE_FOR_INIT_STMT to RANGE_FOR_STMT.
* cp-tree.h (RANGE_FOR_INIT_STMT): Define.
* dump.c (cp_dump_tree) <case RANGE_FOR_STMT>: Also dump
RANGE_FOR_INIT_STMT.
* pt.c (tsubst_expr) <case RANGE_FOR_STMT>: Recur into
RANGE_FOR_INIT_STMT.
* semantics.c (begin_range_for_stmt): Adjust call to build_stmt.
Do put the init statement in RANGE_FOR_INIT_STMT.
(finish_range_for_decl): Pop it for templates.
* g++.dg/cpp2a/range-for11.C: New test.
* g++.dg/cpp2a/range-for12.C: New test.
* g++.dg/cpp2a/range-for13.C: New test.
* g++.dg/cpp2a/range-for14.C: New test.
* g++.dg/cpp2a/range-for15.C: New test.
* g++.dg/cpp2a/range-for16.C: New test.
* g++.dg/cpp2a/range-for17.C: New test.
* g++.dg/cpp2a/range-for18.C: New test.
* g++.dg/parse/error61.C (foo): Adjust dg-error.
From-SVN: r264158
[gcc]
2018-09-06 Will Schmidt <will_schmidt@vnet.ibm.com>
PR target/86731
* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Update logic
around folding of vec_sl to handle out of range shift values.
[testsuite]
2018-08-15 Will Schmidt <will_schmidt@vnet.ibm.com>
PR target/86731
* gcc.target/powerpc/pr86731.c: New test.
* gcc.target/powerpc/pr86731-longlong.c: New test.
* gcc.target/powerpc/pr86731-fwrapv.c: New test.
* gcc.target/powerpc/pr86731-fwrapv-longlong.c: New test.
* gcc.target/powerpc/pr86731-nogimplefold.c: New test.
* gcc.target/powerpc/pr86731-nogimplefold-longlong.c: New test.
From-SVN: r264150
[gcc]
2018-09-06 Will Schmidt <will_schmidt@vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add support for
early gimple folding of vec_splat().
* tree-vect-generic.c: Remove static from tree_vec_extract() definition.
* gimple-fold.h: Add an extern define for tree_vec_extract().
From-SVN: r264146
Inhibit constant propagation inlining SYMBOL_REF loads into
UNSPECV_CAS. Even though reload can later undo it, the resulting
code will be less efficient.
gcc/ChangeLog:
2018-09-06 Ilya Leoshkevich <iii@linux.ibm.com>
PR target/80080
* config/s390/predicates.md: Add nonsym_memory_operand.
* config/s390/s390.c (s390_legitimize_cs_operand): If operand
contains a SYMBOL_REF, load it into an intermediate pseudo.
(s390_emit_compare_and_swap): Legitimize operand.
* config/s390/s390.md: Use the new nonsym_memory_operand
with UNSPECV_CAS patterns.
gcc/testsuite/ChangeLog:
2018-09-06 Ilya Leoshkevich <iii@linux.ibm.com>
PR target/80080
* gcc.target/s390/pr80080-3.c: New test.
* gcc.target/s390/s390.exp: Make sure the new test passes
on all optimization levels.
From-SVN: r264143
The dump file used to come at the end of the sorted dump file list,
because the pass was registered dynamically. This did not reflect the
order in which passes are executed. Static registration fixes this:
* foo4.c.277r.split2
* foo4.c.281r.early_mach
* foo4.c.282r.pro_and_epilogue
gcc/ChangeLog:
2018-09-06 Ilya Leoshkevich <iii@linux.ibm.com>
PR target/80080
* config/s390/s390-passes.def: New file.
* config/s390/s390-protos.h (class rtl_opt_pass): Add forward
declaration.
(make_pass_s390_early_mach): Add declaration.
* config/s390/s390.c (make_pass_s390_early_mach):
(s390_option_override): Remove dynamic registration.
* config/s390/t-s390: Add s390-passes.def.
From-SVN: r264142
* typeck.c (maybe_warn_about_returning_address_of_local): Handle calls
to std::move or std::forward.
(is_std_forward_p): New function.
* g++.dg/warn/Wreturn-local-addr-5.C: New test.
From-SVN: r264139
* call.c (build_user_type_conversion_1): Use NULL instead of 0. Bail
out if performing the maybe-rvalue overload resolution and a conversion
function is getting called.
* g++.dg/cpp0x/ref-qual19.C: New test.
From-SVN: r264132
A branch with a name matching scan-assembler pattern triggers
inappropriate FAIL.
E.g. branch fixups-testsuite and
- gcc.target/i386/pr65871-?.c (scan-assembler-not "test")
- gcc.target/i386/pr41442.c (scan-assembler-times "test|cmp" 2)
etc.
This is a recurring problem as can be seen by some -fno-ident additions
by commits from e.g. Michael Meissner over the years: builtins-58.c,
powerpc/pr46728-?.c
The patch below adds -fno-ident if a testcase contains one of
scan-assembler, scan-assembler-not or scan-assembler-times.
Regression tested on x86_64-unknown-linux on a fixups-testsuite branch
where it fixes several false FAILs without regressions.
gcc/testsuite/ChangeLog
2016-06-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
PR testsuite/52665
* lib/gcc-dg.exp (gcc-dg-test-1): Iterate over _required_options.
* lib/target-supports.exp (scan-assembler_required_options,
scan-assembler-not_required_options,
scan-assembler-times_required_options): Add -fno-ident.
* lib/scanasm.exp (scan-assembler-times): Fix error message.
* c-c++-common/ident-0a.c: New test.
* c-c++-common/ident-0b.c: New test.
* c-c++-common/ident-1a.c: New test.
* c-c++-common/ident-1b.c: New test.
* c-c++-common/ident-2a.c: New test.
* c-c++-common/ident-2b.c: New test.
From-SVN: r264128
This patch aims to optimise sequences involving uses of 1.0 / sqrt (a) under -freciprocal-math and -funsafe-math-optimizations.
In particular consider:
x = 1.0 / sqrt (a);
r1 = x * x; // same as 1.0 / a
r2 = a * x; // same as sqrt (a)
If x, r1 and r2 are all used further on in the code, this can be transformed into:
tmp1 = 1.0 / a
tmp2 = sqrt (a)
tmp3 = tmp1 * tmp2
x = tmp3
r1 = tmp1
r2 = tmp2
A bit convoluted, but this saves us one multiplication and, more importantly, the sqrt and division are now independent.
This also allows optimisation of a subset of these expressions.
For example:
x = 1.0 / sqrt (a)
r1 = x * x
can be transformed to r1 = 1.0 / a, eliminating the sqrt if x is not used anywhere else.
And similarly:
x = 1.0 / sqrt (a)
r1 = a * x
can be transformed to sqrt (a) eliminating the division.
For the testcase:
double res, res2, tmp;
void
foo (double a, double b)
{
tmp = 1.0 / __builtin_sqrt (a);
res = tmp * tmp;
res2 = a * tmp;
}
We now generate for aarch64 with -Ofast:
foo:
fmov d2, 1.0e+0
adrp x2, res2
fsqrt d1, d0
adrp x1, res
fdiv d0, d2, d0
adrp x0, tmp
str d1, [x2, #:lo12:res2]
fmul d1, d1, d0
str d0, [x1, #:lo12:res]
str d1, [x0, #:lo12:tmp]
ret
where before it generated:
foo:
fsqrt d2, d0
fmov d1, 1.0e+0
adrp x1, res2
adrp x2, tmp
adrp x0, res
fdiv d1, d1, d2
fmul d0, d1, d0
fmul d2, d1, d1
str d1, [x2, #:lo12:tmp]
str d0, [x1, #:lo12:res2]
str d2, [x0, #:lo12:res]
ret
As you can see, the new sequence has one fewer multiply and the fsqrt and fdiv are independent.
* tree-ssa-math-opts.c (is_mult_by): New function.
(is_square_of): Use the above.
(optimize_recip_sqrt): New function.
(pass_cse_reciprocals::execute): Use the above.
* gcc.dg/recip_sqrt_mult_1.c: New test.
* gcc.dg/recip_sqrt_mult_2.c: Likewise.
* gcc.dg/recip_sqrt_mult_3.c: Likewise.
* gcc.dg/recip_sqrt_mult_4.c: Likewise.
* gcc.dg/recip_sqrt_mult_5.c: Likewise.
* g++.dg/recip_sqrt_mult_1.C: Likewise.
* g++.dg/recip_sqrt_mult_2.C: Likewise.
From-SVN: r264126
2018-09-05 Richard Biener <rguenther@suse.de>
PR bootstrap/87134
* tree-ssa-sccvn.c (rpo_elim::eliminate_push_avail): Make sure
to zero-init the emplaced vec.
From-SVN: r264125
2018-09-05 Martin Liska <mliska@suse.cz>
PR tree-optimization/87205
* tree-switch-conversion.c (pass_lower_switch::execute):
Group cases for switch statements.
2018-09-05 Martin Liska <mliska@suse.cz>
PR tree-optimization/87205
* gcc.dg/tree-ssa/pr87205-2.c: New test.
* gcc.dg/tree-ssa/pr87205.c: New test.
From-SVN: r264124
https://gcc.gnu.org/ml/gcc-patches/2018-08/msg01966.html
PR c++/87137
* stor-layout.c (place_field): Scan forwards to check last
bitfield when ms_bitfield_placement is in effect.
gcc/testsuite/
* g++.dg/abi/pr87137.C: New.
From-SVN: r264119
This is a rewrite of the tag collision avoidance patch that Kugan had
written as a machine reorg pass back in February.
The falkor hardware prefetching system uses a combination of the
source, destination and offset to decide which prefetcher unit to
train with the load. This is great when loads in a loop are
sequential but sub-optimal if there are unrelated loads in a loop that
tag to the same prefetcher unit.
This pass attempts to rename the desination register of such colliding
loads using routines available in regrename.c so that their tags do
not collide. This shows some performance gains with mcf and xalancbmk
(~5% each) and will be tweaked further. The pass is placed near the
fag end of the pass list so that subsequent passes don't inadvertantly
end up undoing the renames.
2018-07-02 Siddhesh Poyarekar <siddhesh@sourceware.org>
Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
* config/aarch64/falkor-tag-collision-avoidance.c: New file.
* config.gcc (extra_objs): Build it.
* config/aarch64/t-aarch64 (falkor-tag-collision-avoidance.o):
Likewise.
* config/aarch64/aarch64-passes.def
(pass_tag_collision_avoidance): New pass.
* config/aarch64/aarch64.c (qdf24xx_tunings): Add
AARCH64_EXTRA_TUNE_RENAME_LOAD_REGS to tuning_flags.
(aarch64_classify_address): Remove static qualifier.
(aarch64_address_info, aarch64_address_type): Move to...
* config/aarch64/aarch64-protos.h: ... here.
(make_pass_tag_collision_avoidance): New function.
* config/aarch64/aarch64-tuning-flags.def (rename_load_regs):
New tuning flag.
Co-Authored-By: Kugan Vivekanandarajah <kuganv@linaro.org>
From-SVN: r264115
2018-09-05 Martin Liska <mliska@suse.cz>
* doc/gcov.texi: Update documentation of humar
readable mode.
* gcov.c (format_count): Print one decimal place, it provides
more fine number of situations like '1G' vs. '1.4G'.
2018-09-05 Martin Liska <mliska@suse.cz>
* g++.dg/gcov/loop.C: Update test to support new format.
From-SVN: r264112
