110 lines
3.1 KiB
ArmAsm
110 lines
3.1 KiB
ArmAsm
# _lshrsi3.S for Lattice Mico32
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# Contributed by Jon Beniston <jon@beniston.com> and Richard Henderson.
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#
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# Copyright (C) 2009-2019 Free Software Foundation, Inc.
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#
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# This file is free software; you can redistribute it and/or modify it
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# under the terms of the GNU General Public License as published by the
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# Free Software Foundation; either version 3, or (at your option) any
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# later version.
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#
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# This file is distributed in the hope that it will be useful, but
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# WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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# General Public License for more details.
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#
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# Under Section 7 of GPL version 3, you are granted additional
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# permissions described in the GCC Runtime Library Exception, version
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# 3.1, as published by the Free Software Foundation.
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#
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# You should have received a copy of the GNU General Public License and
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# a copy of the GCC Runtime Library Exception along with this program;
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# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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# <http://www.gnu.org/licenses/>.
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#
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/* Logical right shift. */
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.global __lshrsi3
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.type __lshrsi3,@function
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__lshrsi3:
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/* Only use 5 LSBs, as that's all the h/w shifter uses. */
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andi r2, r2, 0x1f
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/* Get address of offset into unrolled shift loop to jump to. */
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#ifdef __PIC__
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lw r3, (gp+got(__lshrsi3_0))
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#else
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mvhi r3, hi(__lshrsi3_0)
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ori r3, r3, lo(__lshrsi3_0)
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#endif
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add r2, r2, r2
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add r2, r2, r2
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sub r3, r3, r2
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b r3
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__lshrsi3_31:
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srui r1, r1, 1
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__lshrsi3_30:
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srui r1, r1, 1
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__lshrsi3_29:
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srui r1, r1, 1
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__lshrsi3_28:
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srui r1, r1, 1
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__lshrsi3_27:
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srui r1, r1, 1
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__lshrsi3_26:
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srui r1, r1, 1
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__lshrsi3_25:
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srui r1, r1, 1
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__lshrsi3_24:
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srui r1, r1, 1
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__lshrsi3_23:
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srui r1, r1, 1
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__lshrsi3_22:
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srui r1, r1, 1
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__lshrsi3_21:
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srui r1, r1, 1
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__lshrsi3_20:
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srui r1, r1, 1
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__lshrsi3_19:
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srui r1, r1, 1
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__lshrsi3_18:
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srui r1, r1, 1
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__lshrsi3_17:
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srui r1, r1, 1
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__lshrsi3_16:
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srui r1, r1, 1
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__lshrsi3_15:
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srui r1, r1, 1
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__lshrsi3_14:
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srui r1, r1, 1
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__lshrsi3_13:
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srui r1, r1, 1
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__lshrsi3_12:
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srui r1, r1, 1
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__lshrsi3_11:
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srui r1, r1, 1
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__lshrsi3_10:
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srui r1, r1, 1
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__lshrsi3_9:
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srui r1, r1, 1
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__lshrsi3_8:
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srui r1, r1, 1
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__lshrsi3_7:
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srui r1, r1, 1
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__lshrsi3_6:
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srui r1, r1, 1
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__lshrsi3_5:
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srui r1, r1, 1
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__lshrsi3_4:
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srui r1, r1, 1
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__lshrsi3_3:
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srui r1, r1, 1
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__lshrsi3_2:
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srui r1, r1, 1
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__lshrsi3_1:
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srui r1, r1, 1
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__lshrsi3_0:
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ret
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