6f49395177
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/elf.h: Use __ARM_ARCH_ISA_THUMB and __ARM_ARCH_ISA_ARM to
decide whether to prevent some libgcc routines being included for some
multilibs rather than __ARM_ARCH_6M__ and add comment to indicate the
link between this condition and the one in
libgcc/config/arm/lib1func.S.
gcc/testsuite/
* lib/target-supports.exp (check_effective_target_arm_cortex_m): Use
__ARM_ARCH_ISA_ARM to test for Cortex-M devices.
libgcc/
* config/arm/bpabi-v6m.S: Clarify what architectures is the
implementation suitable for.
* config/arm/lib1funcs.S (__prefer_thumb__): Define among other cases
for all Thumb-1 only targets.
(NOT_ISA_TARGET_32BIT): Define for Thumb-1 only targets.
(THUMB_LDIV0): Test for NOT_ISA_TARGET_32BIT rather than
__ARM_ARCH_6M__.
(EQUIV): Likewise.
(ARM_FUNC_ALIAS): Likewise.
(umodsi3): Add check to __ARM_ARCH_ISA_THUMB != 1 to guard the idiv
version.
(modsi3): Likewise.
(clzsi2): Test for NOT_ISA_TARGET_32BIT rather than __ARM_ARCH_6M__.
(clzdi2): Likewise.
(ctzsi2): Likewise.
(L_interwork_call_via_rX): Test for __ARM_ARCH_ISA_ARM rather than
__ARM_ARCH_6M__ in guard for checking whether it is defined.
(final includes): Test for NOT_ISA_TARGET_32BIT rather than
__ARM_ARCH_6M__ and add comment to indicate the connection between
this condition and the one in gcc/config/arm/elf.h.
* config/arm/libunwind.S: Test for __ARM_ARCH_ISA_THUMB and
__ARM_ARCH_ISA_ARM rather than __ARM_ARCH_6M__.
* config/arm/t-softfp: Likewise.
From-SVN: r238079
322 lines
5.7 KiB
ArmAsm
322 lines
5.7 KiB
ArmAsm
/* Miscellaneous BPABI functions. Thumb-1 implementation, suitable for ARMv4T,
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ARMv6-M and ARMv8-M Baseline like ISA variants.
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Copyright (C) 2006-2016 Free Software Foundation, Inc.
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Contributed by CodeSourcery.
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This file is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the
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Free Software Foundation; either version 3, or (at your option) any
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later version.
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This file is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#ifdef __ARM_EABI__
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/* Some attributes that are common to all routines in this file. */
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/* Tag_ABI_align_needed: This code does not require 8-byte
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alignment from the caller. */
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/* .eabi_attribute 24, 0 -- default setting. */
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/* Tag_ABI_align_preserved: This code preserves 8-byte
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alignment in any callee. */
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.eabi_attribute 25, 1
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#endif /* __ARM_EABI__ */
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#ifdef L_aeabi_lcmp
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FUNC_START aeabi_lcmp
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cmp xxh, yyh
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beq 1f
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bgt 2f
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mov r0, #1
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neg r0, r0
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RET
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2:
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mov r0, #1
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RET
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1:
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sub r0, xxl, yyl
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beq 1f
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bhi 2f
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mov r0, #1
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neg r0, r0
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RET
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2:
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mov r0, #1
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1:
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RET
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FUNC_END aeabi_lcmp
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#endif /* L_aeabi_lcmp */
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#ifdef L_aeabi_ulcmp
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FUNC_START aeabi_ulcmp
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cmp xxh, yyh
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bne 1f
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sub r0, xxl, yyl
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beq 2f
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1:
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bcs 1f
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mov r0, #1
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neg r0, r0
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RET
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1:
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mov r0, #1
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2:
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RET
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FUNC_END aeabi_ulcmp
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#endif /* L_aeabi_ulcmp */
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.macro test_div_by_zero signed
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cmp yyh, #0
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bne 7f
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cmp yyl, #0
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bne 7f
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cmp xxh, #0
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.ifc \signed, unsigned
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bne 2f
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cmp xxl, #0
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2:
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beq 3f
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mov xxh, #0
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mvn xxh, xxh @ 0xffffffff
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mov xxl, xxh
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3:
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.else
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blt 6f
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bgt 4f
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cmp xxl, #0
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beq 5f
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4: mov xxl, #0
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mvn xxl, xxl @ 0xffffffff
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lsr xxh, xxl, #1 @ 0x7fffffff
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b 5f
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6: mov xxh, #0x80
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lsl xxh, xxh, #24 @ 0x80000000
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mov xxl, #0
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5:
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.endif
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@ tailcalls are tricky on v6-m.
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push {r0, r1, r2}
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ldr r0, 1f
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adr r1, 1f
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add r0, r1
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str r0, [sp, #8]
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@ We know we are not on armv4t, so pop pc is safe.
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pop {r0, r1, pc}
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.align 2
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1:
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.word __aeabi_ldiv0 - 1b
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7:
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.endm
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#ifdef L_aeabi_ldivmod
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FUNC_START aeabi_ldivmod
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test_div_by_zero signed
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push {r0, r1}
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mov r0, sp
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push {r0, lr}
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ldr r0, [sp, #8]
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bl SYM(__gnu_ldivmod_helper)
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ldr r3, [sp, #4]
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mov lr, r3
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add sp, sp, #8
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pop {r2, r3}
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RET
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FUNC_END aeabi_ldivmod
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#endif /* L_aeabi_ldivmod */
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#ifdef L_aeabi_uldivmod
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FUNC_START aeabi_uldivmod
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test_div_by_zero unsigned
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push {r0, r1}
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mov r0, sp
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push {r0, lr}
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ldr r0, [sp, #8]
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bl SYM(__udivmoddi4)
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ldr r3, [sp, #4]
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mov lr, r3
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add sp, sp, #8
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pop {r2, r3}
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RET
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FUNC_END aeabi_uldivmod
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#endif /* L_aeabi_uldivmod */
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#ifdef L_arm_addsubsf3
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FUNC_START aeabi_frsub
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push {r4, lr}
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mov r4, #1
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lsl r4, #31
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eor r0, r0, r4
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bl __aeabi_fadd
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pop {r4, pc}
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FUNC_END aeabi_frsub
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#endif /* L_arm_addsubsf3 */
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#ifdef L_arm_cmpsf2
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FUNC_START aeabi_cfrcmple
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mov ip, r0
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mov r0, r1
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mov r1, ip
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b 6f
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FUNC_START aeabi_cfcmpeq
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FUNC_ALIAS aeabi_cfcmple aeabi_cfcmpeq
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@ The status-returning routines are required to preserve all
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@ registers except ip, lr, and cpsr.
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6: push {r0, r1, r2, r3, r4, lr}
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bl __lesf2
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@ Set the Z flag correctly, and the C flag unconditionally.
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cmp r0, #0
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@ Clear the C flag if the return value was -1, indicating
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@ that the first operand was smaller than the second.
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bmi 1f
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mov r1, #0
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cmn r0, r1
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1:
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pop {r0, r1, r2, r3, r4, pc}
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FUNC_END aeabi_cfcmple
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FUNC_END aeabi_cfcmpeq
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FUNC_END aeabi_cfrcmple
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FUNC_START aeabi_fcmpeq
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push {r4, lr}
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bl __eqsf2
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neg r0, r0
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add r0, r0, #1
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pop {r4, pc}
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FUNC_END aeabi_fcmpeq
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.macro COMPARISON cond, helper, mode=sf2
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FUNC_START aeabi_fcmp\cond
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push {r4, lr}
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bl __\helper\mode
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cmp r0, #0
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b\cond 1f
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mov r0, #0
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pop {r4, pc}
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1:
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mov r0, #1
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pop {r4, pc}
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FUNC_END aeabi_fcmp\cond
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.endm
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COMPARISON lt, le
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COMPARISON le, le
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COMPARISON gt, ge
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COMPARISON ge, ge
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#endif /* L_arm_cmpsf2 */
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#ifdef L_arm_addsubdf3
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FUNC_START aeabi_drsub
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push {r4, lr}
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mov r4, #1
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lsl r4, #31
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eor xxh, xxh, r4
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bl __aeabi_dadd
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pop {r4, pc}
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FUNC_END aeabi_drsub
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#endif /* L_arm_addsubdf3 */
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#ifdef L_arm_cmpdf2
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FUNC_START aeabi_cdrcmple
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mov ip, r0
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mov r0, r2
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mov r2, ip
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mov ip, r1
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mov r1, r3
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mov r3, ip
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b 6f
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FUNC_START aeabi_cdcmpeq
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FUNC_ALIAS aeabi_cdcmple aeabi_cdcmpeq
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@ The status-returning routines are required to preserve all
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@ registers except ip, lr, and cpsr.
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6: push {r0, r1, r2, r3, r4, lr}
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bl __ledf2
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@ Set the Z flag correctly, and the C flag unconditionally.
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cmp r0, #0
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@ Clear the C flag if the return value was -1, indicating
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@ that the first operand was smaller than the second.
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bmi 1f
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mov r1, #0
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cmn r0, r1
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1:
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pop {r0, r1, r2, r3, r4, pc}
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FUNC_END aeabi_cdcmple
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FUNC_END aeabi_cdcmpeq
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FUNC_END aeabi_cdrcmple
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FUNC_START aeabi_dcmpeq
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push {r4, lr}
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bl __eqdf2
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neg r0, r0
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add r0, r0, #1
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pop {r4, pc}
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FUNC_END aeabi_dcmpeq
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.macro COMPARISON cond, helper, mode=df2
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FUNC_START aeabi_dcmp\cond
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push {r4, lr}
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bl __\helper\mode
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cmp r0, #0
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b\cond 1f
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mov r0, #0
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pop {r4, pc}
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1:
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mov r0, #1
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pop {r4, pc}
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FUNC_END aeabi_dcmp\cond
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.endm
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COMPARISON lt, le
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COMPARISON le, le
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COMPARISON gt, ge
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COMPARISON ge, ge
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#endif /* L_arm_cmpdf2 */
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