9d9c740d1e
* hw-doloop.c: New file. * hw-doloop.h: New file. * Makefile.in (OBJS): Add hw-doloop.o. (hw-doloop.o): New rule. ($(obj_out_file)): Add hw-doloop.h dependency. * config/bfin/bfin.c: Include "hw-doloop.h". (loop_info, DEF_VEC_P for loop_info, loop_info_d): Remove. (bfin_dump_loops, bfin_bb_in_loop, bfin_scan_loop): Remove. (hwloop_optimize): Renamed from bfin_optimize_loop. Argument type changed to hwloop_info. Return bool, true if the loop was successfully optimized. Remove code that was moved to hw-doloop.c, and adjust other parts. (hwloop_fail): New static function, containing parts that used to be in bfin_optimize_loop. (bfin_discover_loop, bfin_discover_loops, free_loops, bfin_reorder_loops): Remove. (hwloop_pattern_reg): New static function. (bfin_doloop_hooks): New variable. (bfin_reorg_loops): Remove most code, call reorg_loops. * config/bfin/bfin.md (doloop_end splitter): Also enable if loop counter is a memory_operand. From-SVN: r175985
673 lines
18 KiB
C
673 lines
18 KiB
C
/* Code to analyze doloop loops in order for targets to perform late
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optimizations converting doloops to other forms of hardware loops.
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Copyright (C) 2011 Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3, or (at your option) any later
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version.
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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#include "config.h"
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#include "system.h"
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#include "coretypes.h"
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#include "tm.h"
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#include "rtl.h"
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#include "flags.h"
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#include "expr.h"
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#include "hard-reg-set.h"
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#include "regs.h"
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#include "basic-block.h"
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#include "tm_p.h"
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#include "df.h"
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#include "cfglayout.h"
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#include "cfgloop.h"
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#include "output.h"
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#include "recog.h"
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#include "target.h"
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#include "hw-doloop.h"
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#ifdef HAVE_doloop_end
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/* Dump information collected in LOOPS. */
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static void
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dump_hwloops (hwloop_info loops)
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{
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hwloop_info loop;
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for (loop = loops; loop; loop = loop->next)
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{
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hwloop_info i;
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basic_block b;
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unsigned ix;
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fprintf (dump_file, ";; loop %d: ", loop->loop_no);
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if (loop->bad)
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fprintf (dump_file, "(bad) ");
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fprintf (dump_file, "{head:%d, depth:%d, reg:%u}",
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loop->head == NULL ? -1 : loop->head->index,
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loop->depth, REGNO (loop->iter_reg));
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fprintf (dump_file, " blocks: [ ");
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for (ix = 0; VEC_iterate (basic_block, loop->blocks, ix, b); ix++)
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fprintf (dump_file, "%d ", b->index);
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fprintf (dump_file, "] ");
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fprintf (dump_file, " inner loops: [ ");
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for (ix = 0; VEC_iterate (hwloop_info, loop->loops, ix, i); ix++)
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fprintf (dump_file, "%d ", i->loop_no);
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fprintf (dump_file, "]\n");
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}
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fprintf (dump_file, "\n");
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}
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/* Return true if BB is part of LOOP. */
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static bool
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bb_in_loop_p (hwloop_info loop, basic_block bb)
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{
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return bitmap_bit_p (loop->block_bitmap, bb->index);
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}
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/* Scan the blocks of LOOP (and its inferiors), and record things such as
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hard registers set, jumps out of and within the loop. */
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static void
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scan_loop (hwloop_info loop)
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{
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unsigned ix;
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basic_block bb;
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if (loop->bad)
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return;
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if (REGNO_REG_SET_P (df_get_live_in (loop->successor),
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REGNO (loop->iter_reg)))
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loop->iter_reg_used_outside = true;
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for (ix = 0; VEC_iterate (basic_block, loop->blocks, ix, bb); ix++)
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{
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rtx insn;
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edge e;
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edge_iterator ei;
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if (bb != loop->tail)
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FOR_EACH_EDGE (e, ei, bb->succs)
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{
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if (bb_in_loop_p (loop, e->dest))
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{
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if (!(e->flags & EDGE_FALLTHRU))
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loop->jumps_within = true;
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}
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else
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{
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loop->jumps_outof = true;
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if (!loop->bad)
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gcc_assert (!REGNO_REG_SET_P (df_get_live_in (e->dest),
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REGNO (loop->iter_reg)));
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}
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}
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for (insn = BB_HEAD (bb);
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insn != NEXT_INSN (BB_END (bb));
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insn = NEXT_INSN (insn))
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{
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df_ref *def_rec;
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HARD_REG_SET set_this_insn;
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if (!INSN_P (insn))
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continue;
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if (recog_memoized (insn) < 0
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&& (GET_CODE (PATTERN (insn)) == ASM_INPUT
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|| asm_noperands (PATTERN (insn)) >= 0))
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loop->has_asm = true;
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CLEAR_HARD_REG_SET (set_this_insn);
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for (def_rec = DF_INSN_DEFS (insn); *def_rec; def_rec++)
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{
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rtx dreg = DF_REF_REG (*def_rec);
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if (!REG_P (dreg))
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continue;
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add_to_hard_reg_set (&set_this_insn, GET_MODE (dreg),
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REGNO (dreg));
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}
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if (insn == loop->loop_end)
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CLEAR_HARD_REG_BIT (set_this_insn, REGNO (loop->iter_reg));
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else if (reg_mentioned_p (loop->iter_reg, PATTERN (insn)))
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loop->iter_reg_used = true;
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IOR_HARD_REG_SET (loop->regs_set_in_loop, set_this_insn);
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}
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}
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}
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/* Compute the incoming_dest and incoming_src members of LOOP by
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identifying the edges that jump into the loop. If there is more
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than one block that jumps into the loop, incoming_src will be set
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to NULL; likewise, if there is more than one block in the loop that
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is the destination of an incoming edge, incoming_dest will be NULL.
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Return true if either of these two fields is nonnull, false
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otherwise. */
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static bool
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process_incoming_edges (hwloop_info loop)
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{
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edge e;
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edge_iterator ei;
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bool first = true;
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FOR_EACH_EDGE (e, ei, loop->incoming)
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{
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if (first)
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{
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loop->incoming_src = e->src;
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loop->incoming_dest = e->dest;
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first = false;
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}
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else
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{
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if (e->dest != loop->incoming_dest)
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loop->incoming_dest = NULL;
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if (e->src != loop->incoming_src)
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loop->incoming_src = NULL;
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}
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}
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if (loop->incoming_src == NULL && loop->incoming_dest == NULL)
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return false;
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return true;
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}
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/* Try to identify a forwarder block that jump into LOOP, and add it to
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the set of blocks in the loop, updating the vector of incoming blocks as
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well. This transformation gives a second chance to loops we couldn't
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otherwise handle by increasing the chance that we'll end up with one
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incoming_src block.
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Return true if we made a change, false otherwise. */
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static bool
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add_forwarder_blocks (hwloop_info loop)
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{
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edge e;
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edge_iterator ei;
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FOR_EACH_EDGE (e, ei, loop->incoming)
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{
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if (forwarder_block_p (e->src))
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{
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edge e2;
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edge_iterator ei2;
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if (dump_file)
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fprintf (dump_file,
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";; Adding forwarder block %d to loop %d and retrying\n",
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e->src->index, loop->loop_no);
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VEC_safe_push (basic_block, heap, loop->blocks, e->src);
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bitmap_set_bit (loop->block_bitmap, e->src->index);
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FOR_EACH_EDGE (e2, ei2, e->src->preds)
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VEC_safe_push (edge, gc, loop->incoming, e2);
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VEC_unordered_remove (edge, loop->incoming, ei.index);
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return true;
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}
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}
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return false;
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}
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/* Called from reorg_loops when a potential loop end is found. LOOP is
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a newly set up structure describing the loop, it is this function's
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responsibility to fill most of it. TAIL_BB and TAIL_INSN point to the
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loop_end insn and its enclosing basic block. REG is the loop counter
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register.
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For our purposes, a loop is defined by the set of blocks reachable from
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the loop head in which the loop counter register is live. This matches
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the expected use; targets that call into this code usually replace the
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loop counter with a different special register. */
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static void
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discover_loop (hwloop_info loop, basic_block tail_bb, rtx tail_insn, rtx reg)
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{
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bool found_tail;
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unsigned dwork = 0;
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basic_block bb;
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VEC (basic_block,heap) *works;
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loop->tail = tail_bb;
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loop->loop_end = tail_insn;
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loop->iter_reg = reg;
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loop->incoming = VEC_alloc (edge, gc, 2);
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loop->start_label = JUMP_LABEL (tail_insn);
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if (EDGE_COUNT (tail_bb->succs) != 2)
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{
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loop->bad = true;
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return;
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}
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loop->head = BRANCH_EDGE (tail_bb)->dest;
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loop->successor = FALLTHRU_EDGE (tail_bb)->dest;
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works = VEC_alloc (basic_block, heap, 20);
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VEC_safe_push (basic_block, heap, works, loop->head);
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found_tail = false;
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for (dwork = 0; VEC_iterate (basic_block, works, dwork, bb); dwork++)
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{
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edge e;
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edge_iterator ei;
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if (bb == EXIT_BLOCK_PTR)
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{
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/* We've reached the exit block. The loop must be bad. */
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if (dump_file)
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fprintf (dump_file,
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";; Loop is bad - reached exit block while scanning\n");
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loop->bad = true;
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break;
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}
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if (bitmap_bit_p (loop->block_bitmap, bb->index))
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continue;
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/* We've not seen this block before. Add it to the loop's
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list and then add each successor to the work list. */
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VEC_safe_push (basic_block, heap, loop->blocks, bb);
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bitmap_set_bit (loop->block_bitmap, bb->index);
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if (bb == tail_bb)
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found_tail = true;
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else
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{
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FOR_EACH_EDGE (e, ei, bb->succs)
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{
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basic_block succ = EDGE_SUCC (bb, ei.index)->dest;
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if (REGNO_REG_SET_P (df_get_live_in (succ),
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REGNO (loop->iter_reg)))
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VEC_safe_push (basic_block, heap, works, succ);
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}
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}
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}
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if (!found_tail)
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loop->bad = true;
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/* Find the predecessor, and make sure nothing else jumps into this loop. */
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if (!loop->bad)
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{
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FOR_EACH_VEC_ELT (basic_block, loop->blocks, dwork, bb)
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{
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edge e;
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edge_iterator ei;
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FOR_EACH_EDGE (e, ei, bb->preds)
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{
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basic_block pred = e->src;
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if (!bb_in_loop_p (loop, pred))
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{
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if (dump_file)
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fprintf (dump_file, ";; Loop %d: incoming edge %d -> %d\n",
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loop->loop_no, pred->index,
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e->dest->index);
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VEC_safe_push (edge, gc, loop->incoming, e);
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}
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}
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}
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if (!process_incoming_edges (loop))
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{
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if (dump_file)
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fprintf (dump_file,
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";; retrying loop %d with forwarder blocks\n",
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loop->loop_no);
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if (!add_forwarder_blocks (loop))
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{
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if (dump_file)
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fprintf (dump_file, ";; No forwarder blocks found\n");
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loop->bad = true;
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}
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else if (!process_incoming_edges (loop))
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{
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if (dump_file)
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fprintf (dump_file,
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";; can't find suitable entry for loop %d\n",
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loop->loop_no);
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}
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}
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}
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VEC_free (basic_block, heap, works);
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}
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/* Analyze the structure of the loops in the current function. Use
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STACK for bitmap allocations. Returns all the valid candidates for
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hardware loops found in this function. HOOKS is the argument
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passed to reorg_loops, used here to find the iteration registers
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from a loop_end pattern. */
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static hwloop_info
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discover_loops (bitmap_obstack *stack, struct hw_doloop_hooks *hooks)
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{
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hwloop_info loops = NULL;
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hwloop_info loop;
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basic_block bb;
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int nloops = 0;
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/* Find all the possible loop tails. This means searching for every
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loop_end instruction. For each one found, create a hwloop_info
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structure and add the head block to the work list. */
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FOR_EACH_BB (bb)
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{
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rtx tail = BB_END (bb);
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rtx insn, reg;
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while (tail && GET_CODE (tail) == NOTE && tail != BB_HEAD (bb))
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tail = PREV_INSN (tail);
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if (tail == NULL_RTX)
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continue;
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if (!JUMP_P (tail))
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continue;
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reg = hooks->end_pattern_reg (tail);
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if (reg == NULL_RTX)
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continue;
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/* A possible loop end */
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/* There's a degenerate case we can handle - an empty loop consisting
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of only a back branch. Handle that by deleting the branch. */
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insn = JUMP_LABEL (tail);
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while (insn && !NONDEBUG_INSN_P (insn))
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insn = NEXT_INSN (insn);
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if (insn == tail)
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{
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basic_block succ = FALLTHRU_EDGE (bb)->dest;
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if (dump_file)
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{
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fprintf (dump_file, ";; degenerate loop ending at\n");
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print_rtl_single (dump_file, tail);
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}
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if (!REGNO_REG_SET_P (df_get_live_in (succ), REGNO (reg)))
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{
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if (dump_file)
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fprintf (dump_file, ";; deleting it\n");
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delete_insn_and_edges (tail);
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continue;
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}
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}
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loop = XCNEW (struct hwloop_info_d);
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loop->next = loops;
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loops = loop;
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loop->loop_no = nloops++;
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loop->blocks = VEC_alloc (basic_block, heap, 20);
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loop->block_bitmap = BITMAP_ALLOC (stack);
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if (dump_file)
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{
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fprintf (dump_file, ";; potential loop %d ending at\n",
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loop->loop_no);
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print_rtl_single (dump_file, tail);
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}
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discover_loop (loop, bb, tail, reg);
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}
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/* Compute loop nestings. Given two loops A and B, either the sets
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of their blocks don't intersect at all, or one is the subset of
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the other, or the blocks don't form a good nesting structure. */
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for (loop = loops; loop; loop = loop->next)
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{
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hwloop_info other;
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if (loop->bad)
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continue;
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for (other = loops; other; other = other->next)
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{
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if (other->bad)
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continue;
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if (!bitmap_intersect_p (other->block_bitmap, loop->block_bitmap))
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continue;
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if (!bitmap_intersect_compl_p (other->block_bitmap,
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loop->block_bitmap))
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VEC_safe_push (hwloop_info, heap, loop->loops, other);
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else if (!bitmap_intersect_compl_p (loop->block_bitmap,
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other->block_bitmap))
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VEC_safe_push (hwloop_info, heap, other->loops, loop);
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else
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{
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if (dump_file)
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fprintf (dump_file,
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";; can't find suitable nesting for loops %d and %d\n",
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loop->loop_no, other->loop_no);
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loop->bad = other->bad = true;
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}
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}
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}
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if (dump_file)
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dump_hwloops (loops);
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return loops;
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}
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/* Free up the loop structures in LOOPS. */
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static void
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free_loops (hwloop_info loops)
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{
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while (loops)
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{
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hwloop_info loop = loops;
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loops = loop->next;
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VEC_free (hwloop_info, heap, loop->loops);
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VEC_free (basic_block, heap, loop->blocks);
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BITMAP_FREE (loop->block_bitmap);
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XDELETE (loop);
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}
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}
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#define BB_AUX_INDEX(BB) ((intptr_t) (BB)->aux)
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/* Initialize the aux fields to give ascending indices to basic blocks. */
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static void
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set_bb_indices (void)
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{
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basic_block bb;
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intptr_t index;
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index = 0;
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FOR_EACH_BB (bb)
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bb->aux = (void *) index++;
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}
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/* The taken-branch edge from the loop end can actually go forward.
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If the target's hardware loop support requires that the loop end be
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after the loop start, try to reorder a loop's basic blocks when we
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find such a case.
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This is not very aggressive; it only moves at most one block. It
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does not introduce new branches into loops; it may remove them, or
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it may switch fallthru/jump edges. */
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static void
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reorder_loops (hwloop_info loops)
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{
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basic_block bb;
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hwloop_info loop;
|
|
|
|
cfg_layout_initialize (0);
|
|
|
|
set_bb_indices ();
|
|
|
|
for (loop = loops; loop; loop = loop->next)
|
|
{
|
|
edge e;
|
|
edge_iterator ei;
|
|
|
|
if (loop->bad)
|
|
continue;
|
|
|
|
if (BB_AUX_INDEX (loop->head) <= BB_AUX_INDEX (loop->tail))
|
|
continue;
|
|
|
|
FOR_EACH_EDGE (e, ei, loop->head->succs)
|
|
{
|
|
if (bitmap_bit_p (loop->block_bitmap, e->dest->index)
|
|
&& BB_AUX_INDEX (e->dest) < BB_AUX_INDEX (loop->tail))
|
|
{
|
|
basic_block start_bb = e->dest;
|
|
basic_block start_prev_bb = start_bb->prev_bb;
|
|
|
|
if (dump_file)
|
|
fprintf (dump_file, ";; Moving block %d before block %d\n",
|
|
loop->head->index, start_bb->index);
|
|
loop->head->prev_bb->next_bb = loop->head->next_bb;
|
|
loop->head->next_bb->prev_bb = loop->head->prev_bb;
|
|
|
|
loop->head->prev_bb = start_prev_bb;
|
|
loop->head->next_bb = start_bb;
|
|
start_prev_bb->next_bb = start_bb->prev_bb = loop->head;
|
|
|
|
set_bb_indices ();
|
|
break;
|
|
}
|
|
}
|
|
loops = loops->next;
|
|
}
|
|
|
|
FOR_EACH_BB (bb)
|
|
{
|
|
if (bb->next_bb != EXIT_BLOCK_PTR)
|
|
bb->aux = bb->next_bb;
|
|
else
|
|
bb->aux = NULL;
|
|
}
|
|
cfg_layout_finalize ();
|
|
clear_aux_for_blocks ();
|
|
df_analyze ();
|
|
}
|
|
|
|
/* Call the OPT function for LOOP and all of its sub-loops. This is
|
|
done in a depth-first search; innermost loops are visited first.
|
|
OPTIMIZE and FAIL are the functions passed to reorg_loops by the
|
|
target's reorg pass. */
|
|
static void
|
|
optimize_loop (hwloop_info loop, struct hw_doloop_hooks *hooks)
|
|
{
|
|
int ix;
|
|
hwloop_info inner;
|
|
int inner_depth = 0;
|
|
|
|
if (loop->visited)
|
|
return;
|
|
|
|
loop->visited = 1;
|
|
|
|
if (loop->bad)
|
|
{
|
|
if (dump_file)
|
|
fprintf (dump_file, ";; loop %d bad when found\n", loop->loop_no);
|
|
goto bad_loop;
|
|
}
|
|
|
|
/* Every loop contains in its list of inner loops every loop nested inside
|
|
it, even if there are intermediate loops. This works because we're doing
|
|
a depth-first search here and never visit a loop more than once.
|
|
Recursion depth is effectively limited by the number of available
|
|
hardware registers. */
|
|
for (ix = 0; VEC_iterate (hwloop_info, loop->loops, ix, inner); ix++)
|
|
{
|
|
optimize_loop (inner, hooks);
|
|
|
|
if (!inner->bad && inner_depth < inner->depth)
|
|
inner_depth = inner->depth;
|
|
/* The set of registers may be changed while optimizing the inner
|
|
loop. */
|
|
IOR_HARD_REG_SET (loop->regs_set_in_loop, inner->regs_set_in_loop);
|
|
}
|
|
|
|
loop->depth = inner_depth + 1;
|
|
|
|
if (hooks->opt (loop))
|
|
return;
|
|
|
|
bad_loop:
|
|
if (dump_file)
|
|
fprintf (dump_file, ";; loop %d is bad\n", loop->loop_no);
|
|
|
|
loop->bad = true;
|
|
hooks->fail (loop);
|
|
}
|
|
|
|
/* This function can be used from a port's machine_dependent_reorg to
|
|
find and analyze loops that end in loop_end instructions. It uses
|
|
a set of function pointers in HOOKS to call back into the
|
|
target-specific functions to perform the actual machine-specific
|
|
transformations.
|
|
|
|
Such transformations typically involve additional set-up
|
|
instructions before the loop, to define loop bounds or set up a
|
|
special loop counter register.
|
|
|
|
DO_REORDER should be set to true if we should try to use the
|
|
reorder_loops function to ensure the loop end occurs after the loop
|
|
start. This is for use by targets where the loop hardware requires
|
|
this condition.
|
|
|
|
HOOKS is used to pass in target specific hooks; see
|
|
hw-doloop.h. */
|
|
void
|
|
reorg_loops (bool do_reorder, struct hw_doloop_hooks *hooks)
|
|
{
|
|
hwloop_info loops = NULL;
|
|
hwloop_info loop;
|
|
bitmap_obstack stack;
|
|
|
|
df_live_add_problem ();
|
|
df_live_set_all_dirty ();
|
|
df_analyze ();
|
|
|
|
bitmap_obstack_initialize (&stack);
|
|
|
|
if (dump_file)
|
|
fprintf (dump_file, ";; Find loops, first pass\n\n");
|
|
|
|
loops = discover_loops (&stack, hooks);
|
|
|
|
if (do_reorder)
|
|
{
|
|
reorder_loops (loops);
|
|
free_loops (loops);
|
|
|
|
if (dump_file)
|
|
fprintf (dump_file, ";; Find loops, second pass\n\n");
|
|
|
|
loops = discover_loops (&stack, hooks);
|
|
}
|
|
|
|
for (loop = loops; loop; loop = loop->next)
|
|
scan_loop (loop);
|
|
|
|
/* Now apply the optimizations. */
|
|
for (loop = loops; loop; loop = loop->next)
|
|
optimize_loop (loop, hooks);
|
|
|
|
if (dump_file)
|
|
{
|
|
fprintf (dump_file, ";; After hardware loops optimization:\n\n");
|
|
dump_hwloops (loops);
|
|
}
|
|
|
|
free_loops (loops);
|
|
|
|
if (dump_file)
|
|
print_rtl (dump_file, get_insns ());
|
|
}
|
|
#endif
|