1ee3d1ef10
Introduce the libhwasan library from LLVM sources.
456 lines
15 KiB
C++
456 lines
15 KiB
C++
//===-- hwasan_linux.cpp ----------------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file is a part of HWAddressSanitizer and contains Linux-, NetBSD- and
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/// FreeBSD-specific code.
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///
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//===----------------------------------------------------------------------===//
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#include "sanitizer_common/sanitizer_platform.h"
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#if SANITIZER_FREEBSD || SANITIZER_LINUX || SANITIZER_NETBSD
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#include "hwasan.h"
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#include "hwasan_dynamic_shadow.h"
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#include "hwasan_interface_internal.h"
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#include "hwasan_mapping.h"
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#include "hwasan_report.h"
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#include "hwasan_thread.h"
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#include "hwasan_thread_list.h"
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#include <dlfcn.h>
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#include <elf.h>
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#include <link.h>
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#include <pthread.h>
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#include <signal.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <sys/resource.h>
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#include <sys/time.h>
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#include <unistd.h>
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#include <unwind.h>
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#include <sys/prctl.h>
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#include <errno.h>
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#include "sanitizer_common/sanitizer_common.h"
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#include "sanitizer_common/sanitizer_procmaps.h"
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// Configurations of HWASAN_WITH_INTERCEPTORS and SANITIZER_ANDROID.
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//
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// HWASAN_WITH_INTERCEPTORS=OFF, SANITIZER_ANDROID=OFF
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// Not currently tested.
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// HWASAN_WITH_INTERCEPTORS=OFF, SANITIZER_ANDROID=ON
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// Integration tests downstream exist.
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// HWASAN_WITH_INTERCEPTORS=ON, SANITIZER_ANDROID=OFF
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// Tested with check-hwasan on x86_64-linux.
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// HWASAN_WITH_INTERCEPTORS=ON, SANITIZER_ANDROID=ON
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// Tested with check-hwasan on aarch64-linux-android.
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#if !SANITIZER_ANDROID
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SANITIZER_INTERFACE_ATTRIBUTE
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THREADLOCAL uptr __hwasan_tls;
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#endif
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namespace __hwasan {
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// With the zero shadow base we can not actually map pages starting from 0.
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// This constant is somewhat arbitrary.
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constexpr uptr kZeroBaseShadowStart = 0;
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constexpr uptr kZeroBaseMaxShadowStart = 1 << 18;
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static void ProtectGap(uptr addr, uptr size) {
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__sanitizer::ProtectGap(addr, size, kZeroBaseShadowStart,
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kZeroBaseMaxShadowStart);
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}
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uptr kLowMemStart;
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uptr kLowMemEnd;
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uptr kLowShadowEnd;
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uptr kLowShadowStart;
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uptr kHighShadowStart;
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uptr kHighShadowEnd;
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uptr kHighMemStart;
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uptr kHighMemEnd;
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static void PrintRange(uptr start, uptr end, const char *name) {
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Printf("|| [%p, %p] || %.*s ||\n", (void *)start, (void *)end, 10, name);
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}
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static void PrintAddressSpaceLayout() {
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PrintRange(kHighMemStart, kHighMemEnd, "HighMem");
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if (kHighShadowEnd + 1 < kHighMemStart)
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PrintRange(kHighShadowEnd + 1, kHighMemStart - 1, "ShadowGap");
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else
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CHECK_EQ(kHighShadowEnd + 1, kHighMemStart);
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PrintRange(kHighShadowStart, kHighShadowEnd, "HighShadow");
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if (kLowShadowEnd + 1 < kHighShadowStart)
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PrintRange(kLowShadowEnd + 1, kHighShadowStart - 1, "ShadowGap");
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else
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CHECK_EQ(kLowMemEnd + 1, kHighShadowStart);
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PrintRange(kLowShadowStart, kLowShadowEnd, "LowShadow");
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if (kLowMemEnd + 1 < kLowShadowStart)
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PrintRange(kLowMemEnd + 1, kLowShadowStart - 1, "ShadowGap");
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else
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CHECK_EQ(kLowMemEnd + 1, kLowShadowStart);
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PrintRange(kLowMemStart, kLowMemEnd, "LowMem");
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CHECK_EQ(0, kLowMemStart);
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}
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static uptr GetHighMemEnd() {
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// HighMem covers the upper part of the address space.
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uptr max_address = GetMaxUserVirtualAddress();
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// Adjust max address to make sure that kHighMemEnd and kHighMemStart are
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// properly aligned:
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max_address |= (GetMmapGranularity() << kShadowScale) - 1;
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return max_address;
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}
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static void InitializeShadowBaseAddress(uptr shadow_size_bytes) {
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__hwasan_shadow_memory_dynamic_address =
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FindDynamicShadowStart(shadow_size_bytes);
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}
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void InitPrctl() {
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#define PR_SET_TAGGED_ADDR_CTRL 55
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#define PR_GET_TAGGED_ADDR_CTRL 56
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#define PR_TAGGED_ADDR_ENABLE (1UL << 0)
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// Check we're running on a kernel that can use the tagged address ABI.
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if (internal_prctl(PR_GET_TAGGED_ADDR_CTRL, 0, 0, 0, 0) == (uptr)-1 &&
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errno == EINVAL) {
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#if SANITIZER_ANDROID
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// Some older Android kernels have the tagged pointer ABI on
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// unconditionally, and hence don't have the tagged-addr prctl while still
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// allow the ABI.
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// If targeting Android and the prctl is not around we assume this is the
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// case.
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return;
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#else
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Printf(
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"FATAL: "
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"HWAddressSanitizer requires a kernel with tagged address ABI.\n");
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Die();
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#endif
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}
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// Turn on the tagged address ABI.
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if (internal_prctl(PR_SET_TAGGED_ADDR_CTRL, PR_TAGGED_ADDR_ENABLE, 0, 0, 0) ==
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(uptr)-1 ||
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!internal_prctl(PR_GET_TAGGED_ADDR_CTRL, 0, 0, 0, 0)) {
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Printf(
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"FATAL: HWAddressSanitizer failed to enable tagged address syscall "
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"ABI.\nSuggest check `sysctl abi.tagged_addr_disabled` "
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"configuration.\n");
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Die();
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}
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#undef PR_SET_TAGGED_ADDR_CTRL
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#undef PR_GET_TAGGED_ADDR_CTRL
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#undef PR_TAGGED_ADDR_ENABLE
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}
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bool InitShadow() {
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// Define the entire memory range.
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kHighMemEnd = GetHighMemEnd();
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// Determine shadow memory base offset.
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InitializeShadowBaseAddress(MemToShadowSize(kHighMemEnd));
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// Place the low memory first.
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kLowMemEnd = __hwasan_shadow_memory_dynamic_address - 1;
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kLowMemStart = 0;
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// Define the low shadow based on the already placed low memory.
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kLowShadowEnd = MemToShadow(kLowMemEnd);
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kLowShadowStart = __hwasan_shadow_memory_dynamic_address;
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// High shadow takes whatever memory is left up there (making sure it is not
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// interfering with low memory in the fixed case).
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kHighShadowEnd = MemToShadow(kHighMemEnd);
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kHighShadowStart = Max(kLowMemEnd, MemToShadow(kHighShadowEnd)) + 1;
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// High memory starts where allocated shadow allows.
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kHighMemStart = ShadowToMem(kHighShadowStart);
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// Check the sanity of the defined memory ranges (there might be gaps).
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CHECK_EQ(kHighMemStart % GetMmapGranularity(), 0);
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CHECK_GT(kHighMemStart, kHighShadowEnd);
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CHECK_GT(kHighShadowEnd, kHighShadowStart);
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CHECK_GT(kHighShadowStart, kLowMemEnd);
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CHECK_GT(kLowMemEnd, kLowMemStart);
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CHECK_GT(kLowShadowEnd, kLowShadowStart);
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CHECK_GT(kLowShadowStart, kLowMemEnd);
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if (Verbosity())
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PrintAddressSpaceLayout();
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// Reserve shadow memory.
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ReserveShadowMemoryRange(kLowShadowStart, kLowShadowEnd, "low shadow");
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ReserveShadowMemoryRange(kHighShadowStart, kHighShadowEnd, "high shadow");
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// Protect all the gaps.
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ProtectGap(0, Min(kLowMemStart, kLowShadowStart));
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if (kLowMemEnd + 1 < kLowShadowStart)
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ProtectGap(kLowMemEnd + 1, kLowShadowStart - kLowMemEnd - 1);
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if (kLowShadowEnd + 1 < kHighShadowStart)
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ProtectGap(kLowShadowEnd + 1, kHighShadowStart - kLowShadowEnd - 1);
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if (kHighShadowEnd + 1 < kHighMemStart)
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ProtectGap(kHighShadowEnd + 1, kHighMemStart - kHighShadowEnd - 1);
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return true;
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}
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void InitThreads() {
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CHECK(__hwasan_shadow_memory_dynamic_address);
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uptr guard_page_size = GetMmapGranularity();
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uptr thread_space_start =
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__hwasan_shadow_memory_dynamic_address - (1ULL << kShadowBaseAlignment);
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uptr thread_space_end =
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__hwasan_shadow_memory_dynamic_address - guard_page_size;
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ReserveShadowMemoryRange(thread_space_start, thread_space_end - 1,
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"hwasan threads", /*madvise_shadow*/ false);
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ProtectGap(thread_space_end,
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__hwasan_shadow_memory_dynamic_address - thread_space_end);
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InitThreadList(thread_space_start, thread_space_end - thread_space_start);
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}
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bool MemIsApp(uptr p) {
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CHECK(GetTagFromPointer(p) == 0);
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return p >= kHighMemStart || (p >= kLowMemStart && p <= kLowMemEnd);
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}
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static void HwasanAtExit(void) {
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if (common_flags()->print_module_map)
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DumpProcessMap();
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if (flags()->print_stats && (flags()->atexit || hwasan_report_count > 0))
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ReportStats();
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if (hwasan_report_count > 0) {
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// ReportAtExitStatistics();
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if (common_flags()->exitcode)
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internal__exit(common_flags()->exitcode);
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}
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}
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void InstallAtExitHandler() {
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atexit(HwasanAtExit);
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}
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// ---------------------- TSD ---------------- {{{1
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extern "C" void __hwasan_thread_enter() {
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hwasanThreadList().CreateCurrentThread()->InitRandomState();
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}
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extern "C" void __hwasan_thread_exit() {
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Thread *t = GetCurrentThread();
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// Make sure that signal handler can not see a stale current thread pointer.
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atomic_signal_fence(memory_order_seq_cst);
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if (t)
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hwasanThreadList().ReleaseThread(t);
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}
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#if HWASAN_WITH_INTERCEPTORS
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static pthread_key_t tsd_key;
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static bool tsd_key_inited = false;
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void HwasanTSDThreadInit() {
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if (tsd_key_inited)
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CHECK_EQ(0, pthread_setspecific(tsd_key,
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(void *)GetPthreadDestructorIterations()));
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}
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void HwasanTSDDtor(void *tsd) {
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uptr iterations = (uptr)tsd;
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if (iterations > 1) {
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CHECK_EQ(0, pthread_setspecific(tsd_key, (void *)(iterations - 1)));
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return;
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}
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__hwasan_thread_exit();
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}
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void HwasanTSDInit() {
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CHECK(!tsd_key_inited);
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tsd_key_inited = true;
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CHECK_EQ(0, pthread_key_create(&tsd_key, HwasanTSDDtor));
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}
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#else
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void HwasanTSDInit() {}
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void HwasanTSDThreadInit() {}
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#endif
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#if SANITIZER_ANDROID
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uptr *GetCurrentThreadLongPtr() {
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return (uptr *)get_android_tls_ptr();
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}
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#else
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uptr *GetCurrentThreadLongPtr() {
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return &__hwasan_tls;
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}
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#endif
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#if SANITIZER_ANDROID
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void AndroidTestTlsSlot() {
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uptr kMagicValue = 0x010203040A0B0C0D;
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uptr *tls_ptr = GetCurrentThreadLongPtr();
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uptr old_value = *tls_ptr;
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*tls_ptr = kMagicValue;
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dlerror();
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if (*(uptr *)get_android_tls_ptr() != kMagicValue) {
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Printf(
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"ERROR: Incompatible version of Android: TLS_SLOT_SANITIZER(6) is used "
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"for dlerror().\n");
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Die();
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}
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*tls_ptr = old_value;
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}
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#else
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void AndroidTestTlsSlot() {}
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#endif
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Thread *GetCurrentThread() {
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uptr *ThreadLongPtr = GetCurrentThreadLongPtr();
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if (UNLIKELY(*ThreadLongPtr == 0))
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return nullptr;
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auto *R = (StackAllocationsRingBuffer *)ThreadLongPtr;
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return hwasanThreadList().GetThreadByBufferAddress((uptr)R->Next());
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}
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struct AccessInfo {
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uptr addr;
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uptr size;
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bool is_store;
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bool is_load;
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bool recover;
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};
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static AccessInfo GetAccessInfo(siginfo_t *info, ucontext_t *uc) {
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// Access type is passed in a platform dependent way (see below) and encoded
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// as 0xXY, where X&1 is 1 for store, 0 for load, and X&2 is 1 if the error is
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// recoverable. Valid values of Y are 0 to 4, which are interpreted as
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// log2(access_size), and 0xF, which means that access size is passed via
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// platform dependent register (see below).
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#if defined(__aarch64__)
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// Access type is encoded in BRK immediate as 0x900 + 0xXY. For Y == 0xF,
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// access size is stored in X1 register. Access address is always in X0
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// register.
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uptr pc = (uptr)info->si_addr;
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const unsigned code = ((*(u32 *)pc) >> 5) & 0xffff;
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if ((code & 0xff00) != 0x900)
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return AccessInfo{}; // Not ours.
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const bool is_store = code & 0x10;
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const bool recover = code & 0x20;
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const uptr addr = uc->uc_mcontext.regs[0];
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const unsigned size_log = code & 0xf;
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if (size_log > 4 && size_log != 0xf)
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return AccessInfo{}; // Not ours.
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const uptr size = size_log == 0xf ? uc->uc_mcontext.regs[1] : 1U << size_log;
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#elif defined(__x86_64__)
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// Access type is encoded in the instruction following INT3 as
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// NOP DWORD ptr [EAX + 0x40 + 0xXY]. For Y == 0xF, access size is stored in
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// RSI register. Access address is always in RDI register.
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uptr pc = (uptr)uc->uc_mcontext.gregs[REG_RIP];
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uint8_t *nop = (uint8_t*)pc;
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if (*nop != 0x0f || *(nop + 1) != 0x1f || *(nop + 2) != 0x40 ||
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*(nop + 3) < 0x40)
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return AccessInfo{}; // Not ours.
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const unsigned code = *(nop + 3);
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const bool is_store = code & 0x10;
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const bool recover = code & 0x20;
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const uptr addr = uc->uc_mcontext.gregs[REG_RDI];
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const unsigned size_log = code & 0xf;
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if (size_log > 4 && size_log != 0xf)
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return AccessInfo{}; // Not ours.
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const uptr size =
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size_log == 0xf ? uc->uc_mcontext.gregs[REG_RSI] : 1U << size_log;
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#else
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# error Unsupported architecture
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#endif
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return AccessInfo{addr, size, is_store, !is_store, recover};
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}
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static void HandleTagMismatch(AccessInfo ai, uptr pc, uptr frame,
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ucontext_t *uc, uptr *registers_frame = nullptr) {
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InternalMmapVector<BufferedStackTrace> stack_buffer(1);
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BufferedStackTrace *stack = stack_buffer.data();
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stack->Reset();
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stack->Unwind(pc, frame, uc, common_flags()->fast_unwind_on_fatal);
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// The second stack frame contains the failure __hwasan_check function, as
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// we have a stack frame for the registers saved in __hwasan_tag_mismatch that
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// we wish to ignore. This (currently) only occurs on AArch64, as x64
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// implementations use SIGTRAP to implement the failure, and thus do not go
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// through the stack saver.
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if (registers_frame && stack->trace && stack->size > 0) {
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stack->trace++;
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stack->size--;
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}
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bool fatal = flags()->halt_on_error || !ai.recover;
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ReportTagMismatch(stack, ai.addr, ai.size, ai.is_store, fatal,
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registers_frame);
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}
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static bool HwasanOnSIGTRAP(int signo, siginfo_t *info, ucontext_t *uc) {
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AccessInfo ai = GetAccessInfo(info, uc);
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if (!ai.is_store && !ai.is_load)
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return false;
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SignalContext sig{info, uc};
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HandleTagMismatch(ai, StackTrace::GetNextInstructionPc(sig.pc), sig.bp, uc);
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#if defined(__aarch64__)
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uc->uc_mcontext.pc += 4;
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#elif defined(__x86_64__)
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#else
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# error Unsupported architecture
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#endif
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return true;
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}
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static void OnStackUnwind(const SignalContext &sig, const void *,
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BufferedStackTrace *stack) {
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stack->Unwind(StackTrace::GetNextInstructionPc(sig.pc), sig.bp, sig.context,
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common_flags()->fast_unwind_on_fatal);
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}
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void HwasanOnDeadlySignal(int signo, void *info, void *context) {
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// Probably a tag mismatch.
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if (signo == SIGTRAP)
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if (HwasanOnSIGTRAP(signo, (siginfo_t *)info, (ucontext_t*)context))
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return;
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HandleDeadlySignal(info, context, GetTid(), &OnStackUnwind, nullptr);
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}
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} // namespace __hwasan
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// Entry point for interoperability between __hwasan_tag_mismatch (ASM) and the
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// rest of the mismatch handling code (C++).
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void __hwasan_tag_mismatch4(uptr addr, uptr access_info, uptr *registers_frame,
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size_t outsize) {
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__hwasan::AccessInfo ai;
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ai.is_store = access_info & 0x10;
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ai.is_load = !ai.is_store;
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ai.recover = access_info & 0x20;
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ai.addr = addr;
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if ((access_info & 0xf) == 0xf)
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ai.size = outsize;
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else
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ai.size = 1 << (access_info & 0xf);
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__hwasan::HandleTagMismatch(ai, (uptr)__builtin_return_address(0),
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(uptr)__builtin_frame_address(0), nullptr,
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registers_frame);
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__builtin_unreachable();
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}
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#endif // SANITIZER_FREEBSD || SANITIZER_LINUX || SANITIZER_NETBSD
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