1e26ff7391
gcc.dg/pr56350.c started ICEing for SVE in GCC 10 because we pattern-matched a division reduction: a /= 8; into a signed shift with division semantics: ... = IFN_SDIV_POW2 (..., 3); whereas the reduction code expected it still to be a gassign. One fix would be to check for a reduction in the pattern matcher (but current patterns don't generally do that). Another would be to fail gracefully for reductions involving calls. Since we can't vectorise the reduction either way, and probably have a better shot with the shift form, this patch goes for the "fail gracefully" approach. 2020-01-28 Richard Sandiford <richard.sandiford@arm.com> gcc/ * tree-vect-loop.c (vectorizable_reduction): Fail gracefully for reduction chains that (now) include a call. |
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