a71c0334f7
2016-01-21 Michael Meissner <meissner@linux.vnet.ibm.com> Steven Munroe <munroesj@linux.vnet.ibm.com> Tulio Magno Quites Machado Filho <tulioqm@br.ibm.com> * config/rs6000/float128-sed: New files to convert TF names to KF names for PowerPC IEEE 128-bit floating point support. * config/rs6000/float128-sed-hw: Likewise. * config/rs6000/float128-hw.c: New file for ISA 3.0 IEEE 128-bit floating point hardware support. * config/rs6000/float128-ifunc.c: New file to pick either IEEE 128-bit floating point software emulation or use ISA 3.0 hardware support if it is available. * config/rs6000/quad-float128.h: New file to support IEEE 128-bit floating point. * config/rs6000/extendkftf2-sw.c: New file, convert IEEE 128-bit floating point to IBM extended double. * config/rs6000/trunctfkf2-sw.c: New file, convert IBM extended double to IEEE 128-bit floating point. * config/rs6000/t-float128: New Makefile fragments to enable building __float128 emulation support. * config/rs6000/t-float128-hw: Likewise. * config/rs6000/sfp-exceptions.c: New file to provide exception support for IEEE 128-bit floating point. * config/rs6000/floattikf.c: New files for converting between IEEE 128-bit floating point and signed/unsigned 128-bit integers. * config/rs6000/fixunskfti.c: Likewise. * config/rs6000/fixkfti.c: Likewise. * config/rs6000/floatuntikf.c: Likewise. * config/rs6000/sfp-machine.h (_FP_W_TYPE_SIZE): Use 64-bit types when building on 64-bit systems, or when VSX is enabled. (_FP_W_TYPE): Likewise. (_FP_WS_TYPE): Likewise. (_FP_I_TYPE): Likewise. (TItype): Define on 64-bit systems. (UTItype): Likewise. (TI_BITS): Likewise. (_FP_MUL_MEAT_D): Add support for using 64-bit types. (_FP_MUL_MEAT_Q): Likewise. (_FP_DIV_MEAT_D): Likewise. (_FP_DIV_MEAT_Q): Likewise. (_FP_NANFRAC_D): Likewise. (_FP_NANFRAC_Q): Likewise. (ISA_BIT): Add exception support if we are being compiled on a machine with hardware floating point support to build the IEEE 128-bit emulation functions. (FP_EX_INVALID): Likewise. (FP_EX_OVERFLOW): Likewise. (FP_EX_UNDERFLOW): Likewise. (FP_EX_DIVZERO): Likewise. (FP_EX_INEXACT): Likewise. (FP_EX_ALL): Likewise. (__sfp_handle_exceptions): Likewise. (FP_HANDLE_EXCEPTIONS): Likewise. (FP_RND_NEAREST): Likewise. (FP_RND_ZERO): Likewise. (FP_RND_PINF): Likewise. (FP_RND_MINF): Likewise. (FP_RND_MASK): Likewise. (_FP_DECL_EX): Likewise. (FP_INIT_ROUNDMODE): Likewise. (FP_ROUNDMODE): Likewise. * libgcc/config.host (powerpc*-*-linux*): If compiler can compile VSX code, enable IEEE 128-bit floating point. If the compiler can compile IEEE 128-bit floating point code with ISA 3.0 IEEE 128-bit floating point hardware instructions and it supports declaring functions with the ifunc attribute, enable ifunc functions to switch between software and hardware support. * configure.ac (powerpc*-*-linux*): Likewise. * configure: Regenerate. Co-Authored-By: Steven Munroe <munroesj@linux.vnet.ibm.com> Co-Authored-By: Tulio Magno Quites Machado Filho <tulioqm@br.ibm.com> From-SVN: r232685
73 lines
2.2 KiB
C
73 lines
2.2 KiB
C
/* Copyright (C) 2016 Free Software Foundation, Inc.
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This file is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the
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Free Software Foundation; either version 3, or (at your option) any
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later version.
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This file is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#include "sfp-machine.h"
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/* Only provide exception support if we have hardware floating point and we can
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execute the mtfsf instruction. This would only be true if we are using the
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emulation routines for IEEE 128-bit floating point on pre-ISA 3.0 machines
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without the IEEE 128-bit floating point support. */
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#ifndef __NO_FPRS__
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void
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__sfp_handle_exceptions (int _fex)
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{
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const double fp_max = __DBL_MAX__;
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const double fp_min = __DBL_MIN__;
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const double fp_zero = (double) 0.0;
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const double fp_one = 1.0;
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double tmp;
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if (_fex & FP_EX_INVALID)
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{
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__asm__ __volatile__ ("fdiv %0, %1, %1"
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: "=f" (tmp)
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: "f" (fp_zero));
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}
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if (_fex & FP_EX_DIVZERO)
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{
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__asm__ __volatile__ ("fdiv %0, %1, %2"
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: "=f" (tmp)
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: "f" (fp_one), "f" (fp_zero));
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}
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if (_fex & FP_EX_OVERFLOW)
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{
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__asm__ __volatile__ ("fadd %0, %1, %1"
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: "=f" (tmp)
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: "f" (fp_max));
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}
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if (_fex & FP_EX_UNDERFLOW)
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{
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__asm__ __volatile__ ("fmul %0, %1, %1"
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: "=f" (tmp)
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: "f" (fp_min));
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}
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if (_fex & FP_EX_INEXACT)
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{
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__asm__ __volatile__ ("fsub %0, %1, %2"
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: "=f" (tmp)
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: "f" (fp_max), "f" (fp_one));
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}
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}
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#endif /* !__NO_FPRS__ */
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