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gcc/ChangeLog 2020-10-19 Andrea Corallo <andrea.corallo@arm.com> * config/aarch64/arm_neon.h (__ST2_LANE_FUNC, __ST3_LANE_FUNC) (__ST4_LANE_FUNC): Rename the macro generating the 'q' variants into __ST2Q_LANE_FUNC, __ST2Q_LANE_FUNC, __ST2Q_LANE_FUNC so they all can be undefed at the and of the file. (vst2_lane_bf16, vst2q_lane_bf16, vst3_lane_bf16, vst3q_lane_bf16) (vst4_lane_bf16, vst4q_lane_bf16): Add new intrinsics. gcc/testsuite/ChangeLog 2020-10-19 Andrea Corallo <andrea.corallo@arm.com> * gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h (hbfloat16_t): Define type. (CHECK_FP): Make it working for bfloat types. * gcc.target/aarch64/advsimd-intrinsics/bf16_vstN_lane_1.c: New file. * gcc.target/aarch64/advsimd-intrinsics/bf16_vstN_lane_2.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_bf16_indices_1.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_bf16_indices_1.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_bf16_indices_1.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_bf16_indices_1.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_bf16_indices_1.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_bf16_indices_1.c: Likewise. |
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