93 lines
2.2 KiB
ArmAsm
93 lines
2.2 KiB
ArmAsm
/* Signed 32 bit division optimized for Epiphany.
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Copyright (C) 2009-2020 Free Software Foundation, Inc.
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Contributed by Embecosm on behalf of Adapteva, Inc.
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This file is part of GCC.
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This file is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the
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Free Software Foundation; either version 3, or (at your option) any
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later version.
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This file is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#include "epiphany-asm.h"
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FSTAB (__divsi3,T_INT)
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.global SYM(__divsi3)
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.balign 4
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HIDDEN_FUNC(__divsi3)
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SYM(__divsi3):
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mov r12,0
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sub r2,r12,r0
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movlt r2,r0
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sub r3,r12,r1
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movlt r3,r1
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sub r19,r2,r3
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bltu .Lret0
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movt r12,0x4000
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orr r16,r2,r12
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orr r18,r3,r12
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fsub r16,r16,r12
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fsub r18,r18,r12
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movt r12,0x4b80
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lsr r19,r3,23
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lsr r17,r2,23
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movt r17,0x4b80
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fsub r17,r17,r12
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movt r19,0x4b80
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fsub r19,r19,r12
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mov r12,%low(.L0step)
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movt r12,%high(.L0step)
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mov r20,0
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mov r21,1
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movne r16,r17
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lsr r17,r3,23
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movne r18,r19
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eor r1,r1,r0 ; save sign
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asr r19,r1,31
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lsr r1,r16,23
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lsr r0,r18,23
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sub r1,r1,r0 ; calculate bit number difference.
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lsl r3,r3,r1
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lsr r16,r3,1
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lsl r0,r21,r1
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lsl r1,r1,3
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sub r12,r12,r1
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sub r3,r2,r3
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movgteu r2,r3
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movgteu r20,r0
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lsr r0,r0,1
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add r17,r0,r20
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sub r3,r2,r16
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movgteu r2,r3
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movgteu r20,r17
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sub r16,r16,1
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jr r12
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.rep 30
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lsl r2,r2,1
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sub r3,r2,r16
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movgteu r2,r3
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.endr
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sub r0,r0,1 ; mask result bits from steps ...
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and r0,r0,r2
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orr r20,r0,r20 ; ... and combine with first bit.
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.L0step:eor r0,r20,r19 ; restore sign
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sub r0,r0,r19
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rts
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.Lret0: mov r0,0
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rts
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ENDFUNC(__divsi3)
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