3bd11f791e
The following testcase ICEs, because the cond_andv* expander has vector_operand predicates in both of the commutative inputs and calls gen_andv*_mask which calls ix86_binary_operator_ok in its condition, but nothing calls ix86_fixup_binary_operands_no_copy during the expansion, which means cond_* accepts even operands like 2 MEMs which then can't be matched. The following patch handles it like most other insns that the other cond_* patterns use - by having a separate define_expand that calls ix86_fixup_binary_operands_no_copy and define_ins with ix86_binary_operator_ok. 2022-03-07 Jakub Jelinek <jakub@redhat.com> PR target/104779 * config/i386/sse.md (avx512dq_mul<mode>3<mask_name>): New define_expand pattern. Rename define_insn to ... (*avx512dq_mul<mode>3<mask_name>): ... this. (<code><mode>3_mask): New any_logic define_expand pattern. (<mask_codefor><code><mode>3<mask_name>): Rename to ... (*<code><mode>3<mask_name>): ... this. * gcc.target/i386/pr104779.c: New test. |
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