a3a821c903
gcc/ChangeLog: 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org> * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p): New function. (rs6000_quadword_masked_address_p): Likewise. (quad_aligned_load_p): Likewise. (quad_aligned_store_p): Likewise. (const_load_sequence_p): Add comment to describe the outer-most loop. (mimic_memory_attributes_and_flags): New function. (rs6000_gen_stvx): Likewise. (replace_swapped_aligned_store): Likewise. (rs6000_gen_lvx): Likewise. (replace_swapped_aligned_load): Likewise. (replace_swapped_load_constant): Capitalize argument name in comment describing this function. (rs6000_analyze_swaps): Add a third pass to search for vector loads and stores that access quad-word aligned addresses and replace with stvx or lvx instructions when appropriate. * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p): New function prototype. (rs6000_quadword_masked_address_p): Likewise. (rs6000_gen_lvx): Likewise. (rs6000_gen_stvx): Likewise. * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes VSX_D (V2DF, V2DI), modify this split to select lvx instruction when memory address is aligned. (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify this split to select lvx instruction when memory address is aligned. (*vsx_le_perm_load_v8hi): Modify this split to select lvx instruction when memory address is aligned. (*vsx_le_perm_load_v16qi): Likewise. (four unnamed splitters): Modify to select the stvx instruction when memory is aligned. gcc/testsuite/ChangeLog: 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org> * gcc.target/powerpc/pr48857.c: Modify dejagnu directives to look for lvx and stvx instead of lxvd2x and stxvd2x and require little-endian target. Add comments. * gcc.target/powerpc/swaps-p8-28.c: Add functions for more comprehensive testing. * gcc.target/powerpc/swaps-p8-29.c: Likewise. * gcc.target/powerpc/swaps-p8-30.c: Likewise. * gcc.target/powerpc/swaps-p8-31.c: Likewise. * gcc.target/powerpc/swaps-p8-32.c: Likewise. * gcc.target/powerpc/swaps-p8-33.c: Likewise. * gcc.target/powerpc/swaps-p8-34.c: Likewise. * gcc.target/powerpc/swaps-p8-35.c: Likewise. * gcc.target/powerpc/swaps-p8-36.c: Likewise. * gcc.target/powerpc/swaps-p8-37.c: Likewise. * gcc.target/powerpc/swaps-p8-38.c: Likewise. * gcc.target/powerpc/swaps-p8-39.c: Likewise. * gcc.target/powerpc/swaps-p8-40.c: Likewise. * gcc.target/powerpc/swaps-p8-41.c: Likewise. * gcc.target/powerpc/swaps-p8-42.c: Likewise. * gcc.target/powerpc/swaps-p8-43.c: Likewise. * gcc.target/powerpc/swaps-p8-44.c: Likewise. * gcc.target/powerpc/swaps-p8-45.c: Likewise. * gcc.target/powerpc/vec-extract-2.c: Add comment and remove scan-assembler-not directives that forbid lvx and xxpermdi. * gcc.target/powerpc/vec-extract-3.c: Likewise. * gcc.target/powerpc/vec-extract-5.c: Likewise. * gcc.target/powerpc/vec-extract-6.c: Likewise. * gcc.target/powerpc/vec-extract-7.c: Likewise. * gcc.target/powerpc/vec-extract-8.c: Likewise. * gcc.target/powerpc/vec-extract-9.c: Likewise. * gcc.target/powerpc/vsx-vector-6-le.c: Change scan-assembler-times directives to reflect different numbers of expected xxlnor, xxlor, xvcmpgtdp, and xxland instructions. libcpp/ChangeLog: 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org> * lex.c (search_line_fast): Remove illegal coercion of an unaligned pointer value to vector pointer type and replace with use of __builtin_vec_vsx_ld () built-in function, which operates on unaligned pointer values. From-SVN: r256656 |
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| include | ||
| po | ||
| aclocal.m4 | ||
| ChangeLog | ||
| ChangeLog.jit | ||
| charset.c | ||
| config.in | ||
| configure | ||
| configure.ac | ||
| directives-only.c | ||
| directives.c | ||
| errors.c | ||
| expr.c | ||
| files.c | ||
| identifiers.c | ||
| init.c | ||
| internal.h | ||
| lex.c | ||
| line-map.c | ||
| location-example.txt | ||
| macro.c | ||
| Makefile.in | ||
| makeucnid.c | ||
| mkdeps.c | ||
| pch.c | ||
| symtab.c | ||
| system.h | ||
| traditional.c | ||
| ucnid.h | ||
| ucnid.tab | ||