85ec4feb11
From-SVN: r256169
697 lines
13 KiB
ArmAsm
697 lines
13 KiB
ArmAsm
/* HImode div/mod functions for the GCC support library for the Renesas RL78 processors.
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Copyright (C) 2012-2018 Free Software Foundation, Inc.
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Contributed by Red Hat.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#include "vregs.h"
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#if defined __RL78_MUL_G14__
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START_FUNC ___divhi3
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;; r8 = 4[sp] / 6[sp]
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;; Test for a negative denumerator.
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movw ax, [sp+6]
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mov1 cy, a.7
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movw de, ax
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bc $__div_neg_den
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;; Test for a negative numerator.
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movw ax, [sp+4]
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mov1 cy, a.7
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bc $__div_neg_num
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;; Neither are negative - we can use the unsigned divide instruction.
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__div_no_convert:
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push psw
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di
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divhu
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pop psw
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movw r8, ax
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ret
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__div_neg_den:
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;; Negate the denumerator (which is in DE)
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clrw ax
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subw ax, de
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movw de, ax
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;; Test for a negative numerator.
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movw ax, [sp+4]
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mov1 cy, a.7
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;; If it is not negative then we perform the division and then negate the result.
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bnc $__div_then_convert
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;; Otherwise we negate the numerator and then go with an unsigned division.
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movw bc, ax
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clrw ax
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subw ax, bc
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br $__div_no_convert
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__div_neg_num:
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;; Negate the numerator (which is in AX)
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;; We know that the denumerator is positive.
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movw bc, ax
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clrw ax
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subw ax, bc
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__div_then_convert:
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push psw
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di
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divhu
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pop psw
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;; Negate result and transfer into r8
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movw bc, ax
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clrw ax
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subw ax, bc
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movw r8, ax
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ret
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END_FUNC ___divhi3
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;----------------------------------------------------------------------
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START_FUNC ___modhi3
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;; r8 = 4[sp] % 6[sp]
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;; Test for a negative denumerator.
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movw ax, [sp+6]
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mov1 cy, a.7
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movw de, ax
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bc $__mod_neg_den
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;; Test for a negative numerator.
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movw ax, [sp+4]
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mov1 cy, a.7
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bc $__mod_neg_num
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;; Neither are negative - we can use the unsigned divide instruction.
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__mod_no_convert:
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push psw
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di
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divhu
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pop psw
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movw ax, de
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movw r8, ax
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ret
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__mod_neg_den:
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;; Negate the denumerator (which is in DE)
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clrw ax
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subw ax, de
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movw de, ax
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;; Test for a negative numerator.
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movw ax, [sp+4]
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mov1 cy, a.7
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;; If it is not negative then we perform the modulo operation without conversion.
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bnc $__mod_no_convert
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;; Otherwise we negate the numerator and then go with an unsigned modulo operation.
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movw bc, ax
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clrw ax
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subw ax, bc
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br $__mod_then_convert
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__mod_neg_num:
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;; Negate the numerator (which is in AX)
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;; We know that the denumerator is positive.
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movw bc, ax
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clrw ax
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subw ax, bc
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__mod_then_convert:
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push psw
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di
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divhu
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pop psw
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;; Negate result and transfer into r8
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clrw ax
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subw ax, de
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movw r8, ax
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ret
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END_FUNC ___modhi3
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;----------------------------------------------------------------------
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#elif defined __RL78_MUL_G13__
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;; The G13 S2 core does not have a 16 bit divide peripheral.
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;; So instead we perform a 32-bit divide and twiddle the inputs
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;; as necessary.
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;; Hardware registers. Note - these values match the silicon, not the documentation.
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MDAL = 0xffff0
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MDAH = 0xffff2
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MDBL = 0xffff6
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MDBH = 0xffff4
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MDCL = 0xf00e0
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MDCH = 0xf00e2
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MDUC = 0xf00e8
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.macro _Negate src, dest
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movw ax, !\src
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movw bc, ax
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clrw ax
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subw ax, bc
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movw \dest, ax
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.endm
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;----------------------------------------------------------------------
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START_FUNC ___divhi3
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;; r8 = 4[sp] / 6[sp] (signed division)
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mov a, #0xC0 ; Set DIVMODE=1 and MACMODE=1
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mov !MDUC, a ; This preps the peripheral for division without interrupt generation
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clrw ax ; Clear the top 16-bits of the divisor and dividend
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movw MDBH, ax
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movw MDAH, ax
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;; Load and test for a negative denumerator.
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movw ax, [sp+6]
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movw MDBL, ax
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mov1 cy, a.7
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bc $__div_neg_den
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;; Load and test for a negative numerator.
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movw ax, [sp+4]
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mov1 cy, a.7
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movw MDAL, ax
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bc $__div_neg_num
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;; Neither are negative - we can use the unsigned divide hardware.
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__div_no_convert:
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mov a, #0xC1 ; Set the DIVST bit in MDUC
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mov !MDUC, a ; This starts the division op
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1: mov a, !MDUC ; Wait 16 clocks or until DIVST is clear
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bt a.0, $1b
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movw ax, MDAL ; Read the result
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movw r8, ax
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ret
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__div_neg_den:
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;; Negate the denumerator (which is in MDBL)
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_Negate MDBL MDBL
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;; Load and test for a negative numerator.
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movw ax, [sp+4]
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mov1 cy, a.7
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movw MDAL, ax
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;; If it is not negative then we perform the division and then negate the result.
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bnc $__div_then_convert
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;; Otherwise we negate the numerator and then go with a straightforward unsigned division.
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_Negate MDAL MDAL
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br $!__div_no_convert
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__div_neg_num:
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;; Negate the numerator (which is in MDAL)
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;; We know that the denumerator is positive.
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_Negate MDAL MDAL
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__div_then_convert:
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mov a, #0xC1 ; Set the DIVST bit in MDUC
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mov !MDUC, a ; This starts the division op
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1: mov a, !MDUC ; Wait 16 clocks or until DIVST is clear
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bt a.0, $1b
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;; Negate result and transfer into r8
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_Negate MDAL r8
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ret
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END_FUNC ___divhi3
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;----------------------------------------------------------------------
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START_FUNC ___modhi3
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;; r8 = 4[sp] % 6[sp] (signed modulus)
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mov a, #0xC0 ; Set DIVMODE=1 and MACMODE=1
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mov !MDUC, a ; This preps the peripheral for division without interrupt generation
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clrw ax ; Clear the top 16-bits of the divisor and dividend
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movw MDBH, ax
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movw MDAH, ax
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;; Load and test for a negative denumerator.
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movw ax, [sp+6]
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movw MDBL, ax
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mov1 cy, a.7
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bc $__mod_neg_den
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;; Load and test for a negative numerator.
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movw ax, [sp+4]
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mov1 cy, a.7
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movw MDAL, ax
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bc $__mod_neg_num
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;; Neither are negative - we can use the unsigned divide hardware
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__mod_no_convert:
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mov a, #0xC1 ; Set the DIVST bit in MDUC
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mov !MDUC, a ; This starts the division op
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1: mov a, !MDUC ; Wait 16 clocks or until DIVST is clear
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bt a.0, $1b
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movw ax, !MDCL ; Read the remainder
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movw r8, ax
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ret
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__mod_neg_den:
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;; Negate the denumerator (which is in MDBL)
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_Negate MDBL MDBL
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;; Load and test for a negative numerator.
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movw ax, [sp+4]
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mov1 cy, a.7
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movw MDAL, ax
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;; If it is not negative then we perform the modulo operation without conversion.
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bnc $__mod_no_convert
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;; Otherwise we negate the numerator and then go with a modulo followed by negation.
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_Negate MDAL MDAL
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br $!__mod_then_convert
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__mod_neg_num:
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;; Negate the numerator (which is in MDAL)
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;; We know that the denumerator is positive.
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_Negate MDAL MDAL
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__mod_then_convert:
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mov a, #0xC1 ; Set the DIVST bit in MDUC
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mov !MDUC, a ; This starts the division op
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1: mov a, !MDUC ; Wait 16 clocks or until DIVST is clear
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bt a.0, $1b
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_Negate MDCL r8
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ret
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END_FUNC ___modhi3
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;----------------------------------------------------------------------
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START_FUNC ___udivhi3
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;; r8 = 4[sp] / 6[sp] (unsigned division)
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mov a, #0xC0 ; Set DIVMODE=1 and MACMODE=1
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mov !MDUC, a ; This preps the peripheral for division without interrupt generation
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movw ax, [sp+4] ; Load the divisor
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movw MDAL, ax
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movw ax, [sp+6] ; Load the dividend
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movw MDBL, ax
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clrw ax
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movw MDAH, ax
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movw MDBH, ax
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mov a, #0xC1 ; Set the DIVST bit in MDUC
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mov !MDUC, a ; This starts the division op
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1: mov a, !MDUC ; Wait 16 clocks or until DIVST is clear
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bt a.0, $1b
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movw ax, !MDAL ; Read the remainder
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movw r8, ax
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ret
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END_FUNC ___udivhi3
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;----------------------------------------------------------------------
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START_FUNC ___umodhi3
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;; r8 = 4[sp] % 6[sp] (unsigned modulus)
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mov a, #0xC0 ; Set DIVMODE=1 and MACMODE=1
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mov !MDUC, a ; This preps the peripheral for division without interrupt generation
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movw ax, [sp+4] ; Load the divisor
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movw MDAL, ax
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movw ax, [sp+6] ; Load the dividend
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movw MDBL, ax
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clrw ax
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movw MDAH, ax
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movw MDBH, ax
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mov a, #0xC1 ; Set the DIVST bit in MDUC
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mov !MDUC, a ; This starts the division op
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1: mov a, !MDUC ; Wait 16 clocks or until DIVST is clear
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bt a.0, $1b
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movw ax, !MDCL ; Read the remainder
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movw r8, ax
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ret
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END_FUNC ___umodhi3
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;----------------------------------------------------------------------
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#elif defined __RL78_MUL_NONE__
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.macro MAKE_GENERIC which,need_result
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.if \need_result
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quot = r8
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num = r10
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den = r12
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bit = r14
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.else
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num = r8
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quot = r10
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den = r12
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bit = r14
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.endif
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quotB0 = quot
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quotB1 = quot+1
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numB0 = num
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numB1 = num+1
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denB0 = den
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denB1 = den+1
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bitB0 = bit
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bitB1 = bit+1
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#define bit bc
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#define bitB0 c
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#define bitB1 b
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START_FUNC __generic_hidivmod\which
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num_lt_den\which:
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.if \need_result
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movw r8, #0
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.else
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movw ax, [sp+8]
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movw r8, ax
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.endif
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ret
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;; These routines leave DE alone - the signed functions use DE
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;; to store sign information that must remain intact
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.if \need_result
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.global __generic_hidiv
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__generic_hidiv:
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.else
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.global __generic_himod
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__generic_himod:
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.endif
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;; (quot,rem) = 8[sp] /% 10[sp]
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movw hl, sp
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movw ax, [hl+10] ; denH
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cmpw ax, [hl+8] ; numH
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bh $num_lt_den\which
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;; (quot,rem) = 16[sp] /% 20[sp]
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;; copy numerator
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movw ax, [hl+8]
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movw num, ax
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;; copy denomonator
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movw ax, [hl+10]
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movw den, ax
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movw ax, den
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cmpw ax, #0
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bnz $den_not_zero\which
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.if \need_result
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movw quot, #0
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.else
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movw num, #0
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.endif
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ret
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den_not_zero\which:
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.if \need_result
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;; zero out quot
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movw quot, #0
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.endif
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;; initialize bit to 1
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movw bit, #1
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; while (den < num && !(den & (1L << BITS_MINUS_1)))
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shift_den_bit\which:
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movw ax, den
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mov1 cy,a.7
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bc $enter_main_loop\which
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cmpw ax, num
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bh $enter_main_loop\which
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;; den <<= 1
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; movw ax, den ; already has it from the cmpw above
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shlw ax, 1
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movw den, ax
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;; bit <<= 1
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.if \need_result
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#ifdef bit
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shlw bit, 1
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#else
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movw ax, bit
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shlw ax, 1
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movw bit, ax
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#endif
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.else
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;; if we don't need to compute the quotent, we don't need an
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;; actual bit *mask*, we just need to keep track of which bit
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inc bitB0
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.endif
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br $shift_den_bit\which
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main_loop\which:
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;; if (num >= den) (cmp den > num)
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movw ax, den
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cmpw ax, num
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bh $next_loop\which
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;; num -= den
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movw ax, num
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subw ax, den
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movw num, ax
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.if \need_result
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;; res |= bit
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mov a, quotB0
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or a, bitB0
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mov quotB0, a
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mov a, quotB1
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or a, bitB1
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mov quotB1, a
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.endif
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next_loop\which:
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;; den >>= 1
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movw ax, den
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shrw ax, 1
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movw den, ax
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.if \need_result
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;; bit >>= 1
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movw ax, bit
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shrw ax, 1
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movw bit, ax
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.else
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dec bitB0
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.endif
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enter_main_loop\which:
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.if \need_result
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movw ax, bit
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cmpw ax, #0
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.else
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cmp0 bitB0
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.endif
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bnz $main_loop\which
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main_loop_done\which:
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ret
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END_FUNC __generic_hidivmod\which
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.endm
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;----------------------------------------------------------------------
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MAKE_GENERIC _d 1
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MAKE_GENERIC _m 0
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;----------------------------------------------------------------------
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START_FUNC ___udivhi3
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;; r8 = 4[sp] / 6[sp]
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call $!__generic_hidiv
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ret
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END_FUNC ___udivhi3
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START_FUNC ___umodhi3
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;; r8 = 4[sp] % 6[sp]
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call $!__generic_himod
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ret
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END_FUNC ___umodhi3
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;----------------------------------------------------------------------
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.macro NEG_AX
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movw hl, ax
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movw ax, #0
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subw ax, [hl]
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movw [hl], ax
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.endm
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;----------------------------------------------------------------------
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START_FUNC ___divhi3
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;; r8 = 4[sp] / 6[sp]
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movw de, #0
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mov a, [sp+5]
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mov1 cy, a.7
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bc $div_signed_num
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mov a, [sp+7]
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mov1 cy, a.7
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bc $div_signed_den
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call $!__generic_hidiv
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ret
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div_signed_num:
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;; neg [sp+4]
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movw ax, sp
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addw ax, #4
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NEG_AX
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mov d, #1
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mov a, [sp+7]
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mov1 cy, a.7
|
|
bnc $div_unsigned_den
|
|
div_signed_den:
|
|
;; neg [sp+6]
|
|
movw ax, sp
|
|
addw ax, #6
|
|
NEG_AX
|
|
mov e, #1
|
|
div_unsigned_den:
|
|
call $!__generic_hidiv
|
|
|
|
mov a, d
|
|
cmp0 a
|
|
bz $div_skip_restore_num
|
|
;; We have to restore the numerator [sp+4]
|
|
movw ax, sp
|
|
addw ax, #4
|
|
NEG_AX
|
|
mov a, d
|
|
div_skip_restore_num:
|
|
xor a, e
|
|
bz $div_no_neg
|
|
movw ax, #r8
|
|
NEG_AX
|
|
div_no_neg:
|
|
mov a, e
|
|
cmp0 a
|
|
bz $div_skip_restore_den
|
|
movw ax, sp
|
|
addw ax, #6
|
|
NEG_AX
|
|
div_skip_restore_den:
|
|
ret
|
|
END_FUNC ___divhi3
|
|
|
|
|
|
START_FUNC ___modhi3
|
|
;; r8 = 4[sp] % 6[sp]
|
|
movw de, #0
|
|
mov a, [sp+5]
|
|
mov1 cy, a.7
|
|
bc $mod_signed_num
|
|
mov a, [sp+7]
|
|
mov1 cy, a.7
|
|
bc $mod_signed_den
|
|
call $!__generic_himod
|
|
ret
|
|
|
|
mod_signed_num:
|
|
;; neg [sp+4]
|
|
movw ax, sp
|
|
addw ax, #4
|
|
NEG_AX
|
|
mov d, #1
|
|
mov a, [sp+7]
|
|
mov1 cy, a.7
|
|
bnc $mod_unsigned_den
|
|
mod_signed_den:
|
|
;; neg [sp+6]
|
|
movw ax, sp
|
|
addw ax, #6
|
|
NEG_AX
|
|
mod_unsigned_den:
|
|
call $!__generic_himod
|
|
|
|
mov a, d
|
|
cmp0 a
|
|
bz $mod_no_neg
|
|
movw ax, #r8
|
|
NEG_AX
|
|
;; Also restore numerator
|
|
movw ax, sp
|
|
addw ax, #4
|
|
NEG_AX
|
|
mod_no_neg:
|
|
mov a, e
|
|
cmp0 a
|
|
bz $mod_skip_restore_den
|
|
movw ax, sp
|
|
addw ax, #6
|
|
NEG_AX
|
|
mod_skip_restore_den:
|
|
ret
|
|
END_FUNC ___modhi3
|
|
|
|
;----------------------------------------------------------------------
|
|
|
|
#else
|
|
|
|
#error "Unknown RL78 hardware multiply/divide support"
|
|
|
|
#endif
|