445cf5eb0d
libstdc++:
Add memory barriers to the double-checked locking used for static
initialization.
* libsupc++/guard.cc (__test_and_acquire): Define default.
(_GLIBCXX_GUARD_TEST_AND_ACQUIRE, __set_and_release)
(_GLIBCXX_GUARD_SET_AND_RELEASE): Likewise.
(recursion_push, recursion_pop): New abstraction functions.
(__cxa_guard_acquire): Use _GLIBCXX_GUARD_TEST_AND_ACQUIRE.
(__cxa_guard_release): Use _GLIBCXX_GUARD_SET_AND_RELEASE.
* config/cpu/generic/cxxabi_tweaks.h (_GLIBCXX_GUARD_TEST): Rename
from _GLIBCXX_GUARD_ACQUIRE and reverse sense.
(_GLIBCXX_GUARD_SET): Rename from _GLIBCXX_GUARD_RELEASE.
* config/cpu/arm/cxxabi_tweaks.h: Likewise.
* config/cpu/alpha/atomic_word.h (_GLIBCXX_READ_MEM_BARRIER)
(_GLIBCXX_WRITE_MEM_BARRIER): Define.
* config/cpu/powerpc/atomic_word.h: Likewise.
* config/cpu/sparc/atomic_word.h: Likewise.
* config/cpu/generic/atomic_word.h: Define them, commented out.
* include/bits/atomicity.h: Define defaults.
* config/cpu/ia64/atomic_word.h (__test_and_acquire)
(__set_and_release): New inlines.
(_GLIBCXX_GUARD_TEST_AND_ACQUIRE): Define.
(_GLIBCXX_GUARD_SET_AND_RELEASE): Define.
* libsupc++/guard.cc (acquire_1): Use __builtin_trap instead of
abort();
gcc:
* doc/tm.texi (TARGET_RELAXED_ORDERING): Document.
* target.h (struct gcc_target): Add relaxed_ordering field.
* target-def.h (TARGET_RELAXED_ORDERING): Define default.
(TARGET_INITIALIZER): Add it.
* config/alpha/alpha.c (TARGET_RELAXED_ORDERING): Define.
* config/ia64/ia64.c (TARGET_RELAXED_ORDERING): Define.
* config/rs6000/rs6000.c (TARGET_RELAXED_ORDERING): Define.
* config/sparc/sparc.c (TARGET_RELAXED_ORDERING): Define.
* cp/decl.c (expand_static_init): Don't use shortcut if
targetm.relaxed_ordering.
From-SVN: r92659
49 lines
2.1 KiB
C++
49 lines
2.1 KiB
C++
// Low-level type for atomic operations -*- C++ -*-
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// Copyright (C) 2004 Free Software Foundation, Inc.
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//
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// This file is part of the GNU ISO C++ Library. This library is free
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// software; you can redistribute it and/or modify it under the
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// terms of the GNU General Public License as published by the
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// Free Software Foundation; either version 2, or (at your option)
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// any later version.
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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// You should have received a copy of the GNU General Public License along
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// with this library; see the file COPYING. If not, write to the Free
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// Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307,
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// USA.
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// As a special exception, you may use this file as part of a free software
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// library without restriction. Specifically, if other files instantiate
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// templates or use macros or inline functions from this file, or you compile
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// this file and link it with other files to produce an executable, this
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// file does not by itself cause the resulting executable to be covered by
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// the GNU General Public License. This exception does not however
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// invalidate any other reasons why the executable file might be covered by
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// the GNU General Public License.
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#ifndef _GLIBCXX_ATOMIC_WORD_H
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#define _GLIBCXX_ATOMIC_WORD_H 1
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typedef int _Atomic_word;
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// Define these two macros using the appropriate memory barrier for the target.
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// The commented out versions below are the defaults.
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// See ia64/atomic_word.h for an alternative approach.
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// This one prevents loads from being hoisted across the barrier;
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// in other words, this is a Load-Load acquire barrier.
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// This is necessary iff TARGET_RELAXED_ORDERING is defined in tm.h.
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// #define _GLIBCXX_READ_MEM_BARRIER __asm __volatile ("":::"memory")
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// This one prevents stores from being sunk across the barrier; in other
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// words, a Store-Store release barrier.
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// #define _GLIBCXX_WRITE_MEM_BARRIER __asm __volatile ("":::"memory")
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#endif
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