8d9254fc8a
From-SVN: r279813
86 lines
2.1 KiB
ArmAsm
86 lines
2.1 KiB
ArmAsm
/* Unsigned 32 bit division optimized for Epiphany.
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Copyright (C) 2009-2020 Free Software Foundation, Inc.
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Contributed by Embecosm on behalf of Adapteva, Inc.
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This file is part of GCC.
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This file is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the
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Free Software Foundation; either version 3, or (at your option) any
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later version.
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This file is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#include "epiphany-asm.h"
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FSTAB (__udivsi3,T_UINT)
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.global SYM(__udivsi3)
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.balign 4
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HIDDEN_FUNC(__udivsi3)
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SYM(__udivsi3):
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sub r3,r0,r1
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bltu .Lret0
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mov r3,0x95
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lsl r12,r3,23 ; 0x4a800000
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lsl r3,r3,30 ; 0x40000000
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orr r16,r0,r3
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orr r2,r1,r3
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fsub r16,r16,r3
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fsub r2,r2,r3
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lsr r3,r1,21
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lsr r17,r0,21
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movt r17,0x4a80
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fsub r17,r17,r12
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movt r3,0x4a80
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fsub r3,r3,r12
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mov r12,%low(.L0step)
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movt r12,%high(.L0step)
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mov r21,1
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movne r16,r17
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lsr r17,r1,21
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movne r2,r3
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lsr r3,r16,23 ; must mask lower bits of r2 in case op0 was ..
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lsr r2,r2,23 ; .. shifted and op1 was not.
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sub r3,r3,r2 ; calculate bit number difference.
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lsl r1,r1,r3
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lsr r16,r1,1
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lsl r2,r21,r3
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lsl r3,r3,3
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sub r12,r12,r3
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sub r3,r0,r1
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movltu r3,r0
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mov r0,0
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movgteu r0,r2
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lsr r2,r2,1
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add r17,r2,r0
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sub r1,r3,r16
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movgteu r3,r1
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movgteu r0,r17
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sub r16,r16,1
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jr r12
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.rep 30
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lsl r3,r3,1
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sub r1,r3,r16
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movgteu r3,r1
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.endr
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sub r2,r2,1 ; mask result bits from steps ...
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and r3,r3,r2
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orr r0,r0,r3 ; ... and combine with first bits.
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nop
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.L0step:rts
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.Lret0: mov r0,0
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rts
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ENDFUNC(__udivsi3)
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