489 lines
14 KiB
C
489 lines
14 KiB
C
/* Fallback frame-state unwinder for Darwin.
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Copyright (C) 2004-2014 Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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#ifdef __ppc__
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#include "tconfig.h"
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#include "tsystem.h"
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#include "coretypes.h"
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#include "tm.h"
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#include "libgcc_tm.h"
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#include "dwarf2.h"
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#include "unwind.h"
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#include "unwind-dw2.h"
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#include <stdint.h>
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#include <stdbool.h>
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#include <sys/types.h>
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#include <signal.h>
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#define R_LR 65
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#define R_CTR 66
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#define R_CR2 70
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#define R_XER 76
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#define R_VR0 77
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#define R_VRSAVE 109
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#define R_VSCR 110
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#define R_SPEFSCR 112
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typedef unsigned long reg_unit;
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/* Place in GPRS the parameters to the first 'sc' instruction that would
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have been executed if we were returning from this CONTEXT, or
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return false if an unexpected instruction is encountered. */
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static bool
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interpret_libc (reg_unit gprs[32], struct _Unwind_Context *context)
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{
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uint32_t *pc = (uint32_t *)_Unwind_GetIP (context);
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uint32_t cr;
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reg_unit lr = (reg_unit) pc;
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reg_unit ctr = 0;
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uint32_t *invalid_address = NULL;
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int i;
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for (i = 0; i < 13; i++)
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gprs[i] = 1;
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gprs[1] = _Unwind_GetCFA (context);
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for (; i < 32; i++)
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gprs[i] = _Unwind_GetGR (context, i);
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cr = _Unwind_GetGR (context, R_CR2);
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/* For each supported Libc, we have to track the code flow
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all the way back into the kernel.
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This code is believed to support all released Libc/Libsystem builds since
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Jaguar 6C115, including all the security updates. To be precise,
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Libc Libsystem Build(s)
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262~1 60~37 6C115
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262~1 60.2~4 6D52
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262~1 61~3 6F21-6F22
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262~1 63~24 6G30-6G37
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262~1 63~32 6I34-6I35
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262~1 63~64 6L29-6L60
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262.4.1~1 63~84 6L123-6R172
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320~1 71~101 7B85-7D28
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320~1 71~266 7F54-7F56
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320~1 71~288 7F112
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320~1 71~289 7F113
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320.1.3~1 71.1.1~29 7H60-7H105
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320.1.3~1 71.1.1~30 7H110-7H113
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320.1.3~1 71.1.1~31 7H114
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That's a big table! It would be insane to try to keep track of
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every little detail, so we just read the code itself and do what
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it would do.
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*/
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for (;;)
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{
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uint32_t ins = *pc++;
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if ((ins & 0xFC000003) == 0x48000000) /* b instruction */
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{
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pc += ((((int32_t) ins & 0x3FFFFFC) ^ 0x2000000) - 0x2000004) / 4;
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continue;
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}
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if ((ins & 0xFC600000) == 0x2C000000) /* cmpwi */
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{
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int32_t val1 = (int16_t) ins;
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int32_t val2 = gprs[ins >> 16 & 0x1F];
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/* Only beq and bne instructions are supported, so we only
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need to set the EQ bit. */
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uint32_t mask = 0xF << ((ins >> 21 & 0x1C) ^ 0x1C);
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if (val1 == val2)
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cr |= mask;
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else
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cr &= ~mask;
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continue;
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}
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if ((ins & 0xFEC38003) == 0x40820000) /* forwards beq/bne */
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{
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if ((cr >> ((ins >> 16 & 0x1F) ^ 0x1F) & 1) == (ins >> 24 & 1))
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pc += (ins & 0x7FFC) / 4 - 1;
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continue;
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}
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if ((ins & 0xFC0007FF) == 0x7C000378) /* or, including mr */
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{
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gprs [ins >> 16 & 0x1F] = (gprs [ins >> 11 & 0x1F]
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| gprs [ins >> 21 & 0x1F]);
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continue;
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}
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if (ins >> 26 == 0x0E) /* addi, including li */
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{
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reg_unit src = (ins >> 16 & 0x1F) == 0 ? 0 : gprs [ins >> 16 & 0x1F];
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gprs [ins >> 21 & 0x1F] = src + (int16_t) ins;
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continue;
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}
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if (ins >> 26 == 0x0F) /* addis, including lis */
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{
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reg_unit src = (ins >> 16 & 0x1F) == 0 ? 0 : gprs [ins >> 16 & 0x1F];
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gprs [ins >> 21 & 0x1F] = src + ((int16_t) ins << 16);
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continue;
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}
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if (ins >> 26 == 0x20) /* lwz */
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{
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reg_unit src = (ins >> 16 & 0x1F) == 0 ? 0 : gprs [ins >> 16 & 0x1F];
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uint32_t *p = (uint32_t *)(src + (int16_t) ins);
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if (p == invalid_address)
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return false;
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gprs [ins >> 21 & 0x1F] = *p;
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continue;
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}
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if (ins >> 26 == 0x21) /* lwzu */
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{
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uint32_t *p = (uint32_t *)(gprs [ins >> 16 & 0x1F] += (int16_t) ins);
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if (p == invalid_address)
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return false;
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gprs [ins >> 21 & 0x1F] = *p;
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continue;
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}
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if (ins >> 26 == 0x24) /* stw */
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/* What we hope this is doing is '--in_sigtramp'. We don't want
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to actually store to memory, so just make a note of the
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address and refuse to load from it. */
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{
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reg_unit src = (ins >> 16 & 0x1F) == 0 ? 0 : gprs [ins >> 16 & 0x1F];
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uint32_t *p = (uint32_t *)(src + (int16_t) ins);
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if (p == NULL || invalid_address != NULL)
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return false;
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invalid_address = p;
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continue;
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}
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if (ins >> 26 == 0x2E) /* lmw */
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{
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reg_unit src = (ins >> 16 & 0x1F) == 0 ? 0 : gprs [ins >> 16 & 0x1F];
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uint32_t *p = (uint32_t *)(src + (int16_t) ins);
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int i;
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for (i = (ins >> 21 & 0x1F); i < 32; i++)
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{
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if (p == invalid_address)
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return false;
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gprs[i] = *p++;
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}
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continue;
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}
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if ((ins & 0xFC1FFFFF) == 0x7c0803a6) /* mtlr */
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{
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lr = gprs [ins >> 21 & 0x1F];
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continue;
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}
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if ((ins & 0xFC1FFFFF) == 0x7c0802a6) /* mflr */
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{
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gprs [ins >> 21 & 0x1F] = lr;
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continue;
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}
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if ((ins & 0xFC1FFFFF) == 0x7c0903a6) /* mtctr */
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{
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ctr = gprs [ins >> 21 & 0x1F];
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continue;
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}
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/* The PowerPC User's Manual says that bit 11 of the mtcrf
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instruction is reserved and should be set to zero, but it
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looks like the Darwin assembler doesn't do that... */
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if ((ins & 0xFC000FFF) == 0x7c000120) /* mtcrf */
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{
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int i;
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uint32_t mask = 0;
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for (i = 0; i < 8; i++)
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mask |= ((-(ins >> (12 + i) & 1)) & 0xF) << 4 * i;
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cr = (cr & ~mask) | (gprs [ins >> 21 & 0x1F] & mask);
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continue;
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}
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if (ins == 0x429f0005) /* bcl- 20,4*cr7+so,.+4, loads pc into LR */
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{
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lr = (reg_unit) pc;
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continue;
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}
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if (ins == 0x4e800420) /* bctr */
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{
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pc = (uint32_t *) ctr;
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continue;
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}
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if (ins == 0x44000002) /* sc */
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return true;
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return false;
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}
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}
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/* We used to include <ucontext.h> and <mach/thread_status.h>,
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but they change so much between different Darwin system versions
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that it's much easier to just write the structures involved here
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directly. */
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/* These defines are from the kernel's bsd/dev/ppc/unix_signal.c. */
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#define UC_TRAD 1
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#define UC_TRAD_VEC 6
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#define UC_TRAD64 20
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#define UC_TRAD64_VEC 25
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#define UC_FLAVOR 30
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#define UC_FLAVOR_VEC 35
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#define UC_FLAVOR64 40
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#define UC_FLAVOR64_VEC 45
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#define UC_DUAL 50
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#define UC_DUAL_VEC 55
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struct gcc_ucontext
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{
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int onstack;
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sigset_t sigmask;
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void * stack_sp;
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size_t stack_sz;
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int stack_flags;
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struct gcc_ucontext *link;
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size_t mcsize;
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struct gcc_mcontext32 *mcontext;
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};
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struct gcc_float_vector_state
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{
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double fpregs[32];
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uint32_t fpscr_pad;
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uint32_t fpscr;
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uint32_t save_vr[32][4];
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uint32_t save_vscr[4];
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};
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struct gcc_mcontext32 {
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uint32_t dar;
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uint32_t dsisr;
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uint32_t exception;
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uint32_t padding1[5];
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uint32_t srr0;
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uint32_t srr1;
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uint32_t gpr[32];
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uint32_t cr;
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uint32_t xer;
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uint32_t lr;
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uint32_t ctr;
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uint32_t mq;
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uint32_t vrsave;
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struct gcc_float_vector_state fvs;
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};
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/* These are based on /usr/include/ppc/ucontext.h and
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/usr/include/mach/ppc/thread_status.h, but rewritten to be more
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convenient, to compile on Jaguar, and to work around Radar 3712064
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on Panther, which is that the 'es' field of 'struct mcontext64' has
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the wrong type (doh!). */
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struct gcc_mcontext64 {
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uint64_t dar;
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uint32_t dsisr;
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uint32_t exception;
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uint32_t padding1[4];
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uint64_t srr0;
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uint64_t srr1;
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uint32_t gpr[32][2];
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uint32_t cr;
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uint32_t xer[2]; /* These are arrays because the original structure has them misaligned. */
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uint32_t lr[2];
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uint32_t ctr[2];
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uint32_t vrsave;
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struct gcc_float_vector_state fvs;
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};
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#define UC_FLAVOR_SIZE \
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(sizeof (struct gcc_mcontext32) - 33*16)
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#define UC_FLAVOR_VEC_SIZE (sizeof (struct gcc_mcontext32))
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#define UC_FLAVOR64_SIZE \
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(sizeof (struct gcc_mcontext64) - 33*16)
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#define UC_FLAVOR64_VEC_SIZE (sizeof (struct gcc_mcontext64))
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/* Given GPRS as input to a 'sc' instruction, and OLD_CFA, update FS
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to represent the execution of a signal return; or, if not a signal
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return, return false. */
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static bool
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handle_syscall (_Unwind_FrameState *fs, const reg_unit gprs[32],
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_Unwind_Ptr old_cfa)
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{
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struct gcc_ucontext *uctx;
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bool is_64, is_vector;
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struct gcc_float_vector_state * float_vector_state;
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_Unwind_Ptr new_cfa;
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int i;
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static _Unwind_Ptr return_addr;
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/* Yay! We're in a Libc that we understand, and it's made a
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system call. In Jaguar, this is a direct system call with value 103;
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in Panther and Tiger it is a SYS_syscall call for system call number 184,
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and in Leopard it is a direct syscall with number 184. */
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if (gprs[0] == 0x67 /* SYS_SIGRETURN */)
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{
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uctx = (struct gcc_ucontext *) gprs[3];
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is_vector = (uctx->mcsize == UC_FLAVOR64_VEC_SIZE
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|| uctx->mcsize == UC_FLAVOR_VEC_SIZE);
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is_64 = (uctx->mcsize == UC_FLAVOR64_VEC_SIZE
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|| uctx->mcsize == UC_FLAVOR64_SIZE);
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}
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else if (gprs[0] == 0 /* SYS_syscall */ && gprs[3] == 184)
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{
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int ctxstyle = gprs[5];
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uctx = (struct gcc_ucontext *) gprs[4];
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is_vector = (ctxstyle == UC_FLAVOR_VEC || ctxstyle == UC_FLAVOR64_VEC
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|| ctxstyle == UC_TRAD_VEC || ctxstyle == UC_TRAD64_VEC);
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is_64 = (ctxstyle == UC_FLAVOR64_VEC || ctxstyle == UC_TRAD64_VEC
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|| ctxstyle == UC_FLAVOR64 || ctxstyle == UC_TRAD64);
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}
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else if (gprs[0] == 184 /* SYS_sigreturn */)
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{
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int ctxstyle = gprs[4];
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uctx = (struct gcc_ucontext *) gprs[3];
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is_vector = (ctxstyle == UC_FLAVOR_VEC || ctxstyle == UC_FLAVOR64_VEC
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|| ctxstyle == UC_TRAD_VEC || ctxstyle == UC_TRAD64_VEC);
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is_64 = (ctxstyle == UC_FLAVOR64_VEC || ctxstyle == UC_TRAD64_VEC
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|| ctxstyle == UC_FLAVOR64 || ctxstyle == UC_TRAD64);
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}
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else
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return false;
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#define set_offset(r, addr) \
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(fs->regs.reg[r].how = REG_SAVED_OFFSET, \
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fs->regs.reg[r].loc.offset = (_Unwind_Ptr)(addr) - new_cfa)
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/* Restore even the registers that are not call-saved, since they
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might be being used in the prologue to save other registers,
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for instance GPR0 is sometimes used to save LR. */
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/* Handle the GPRs, and produce the information needed to do the rest. */
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if (is_64)
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{
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/* The context is 64-bit, but it doesn't carry any extra information
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for us because only the low 32 bits of the registers are
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call-saved. */
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struct gcc_mcontext64 *m64 = (struct gcc_mcontext64 *)uctx->mcontext;
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int i;
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float_vector_state = &m64->fvs;
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new_cfa = m64->gpr[1][1];
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set_offset (R_CR2, &m64->cr);
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for (i = 0; i < 32; i++)
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set_offset (i, m64->gpr[i] + 1);
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set_offset (R_XER, m64->xer + 1);
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set_offset (R_LR, m64->lr + 1);
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set_offset (R_CTR, m64->ctr + 1);
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if (is_vector)
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set_offset (R_VRSAVE, &m64->vrsave);
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/* Sometimes, srr0 points to the instruction that caused the exception,
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and sometimes to the next instruction to be executed; we want
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the latter. */
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if (m64->exception == 3 || m64->exception == 4
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|| m64->exception == 6
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|| (m64->exception == 7 && !(m64->srr1 & 0x10000)))
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return_addr = m64->srr0 + 4;
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else
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return_addr = m64->srr0;
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}
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else
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{
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struct gcc_mcontext32 *m = uctx->mcontext;
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int i;
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float_vector_state = &m->fvs;
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new_cfa = m->gpr[1];
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set_offset (R_CR2, &m->cr);
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for (i = 0; i < 32; i++)
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set_offset (i, m->gpr + i);
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set_offset (R_XER, &m->xer);
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set_offset (R_LR, &m->lr);
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set_offset (R_CTR, &m->ctr);
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if (is_vector)
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set_offset (R_VRSAVE, &m->vrsave);
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/* Sometimes, srr0 points to the instruction that caused the exception,
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and sometimes to the next instruction to be executed; we want
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the latter. */
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if (m->exception == 3 || m->exception == 4
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|| m->exception == 6
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|| (m->exception == 7 && !(m->srr1 & 0x10000)))
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return_addr = m->srr0 + 4;
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else
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return_addr = m->srr0;
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}
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fs->regs.cfa_how = CFA_REG_OFFSET;
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fs->regs.cfa_reg = STACK_POINTER_REGNUM;
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fs->regs.cfa_offset = new_cfa - old_cfa;;
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/* The choice of column for the return address is somewhat tricky.
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Fortunately, the actual choice is private to this file, and
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the space it's reserved from is the GCC register space, not the
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DWARF2 numbering. So any free element of the right size is an OK
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choice. Thus: */
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fs->retaddr_column = ARG_POINTER_REGNUM;
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/* FIXME: this should really be done using a DWARF2 location expression,
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not using a static variable. In fact, this entire file should
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be implemented in DWARF2 expressions. */
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set_offset (ARG_POINTER_REGNUM, &return_addr);
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for (i = 0; i < 32; i++)
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set_offset (32 + i, float_vector_state->fpregs + i);
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set_offset (R_SPEFSCR, &float_vector_state->fpscr);
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if (is_vector)
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{
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for (i = 0; i < 32; i++)
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set_offset (R_VR0 + i, float_vector_state->save_vr + i);
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set_offset (R_VSCR, float_vector_state->save_vscr);
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}
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return true;
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}
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/* This is also prototyped in rs6000/darwin.h, inside the
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|
MD_FALLBACK_FRAME_STATE_FOR macro. */
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|
extern bool _Unwind_fallback_frame_state_for (struct _Unwind_Context *context,
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|
_Unwind_FrameState *fs);
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|
|
|
/* Implement the MD_FALLBACK_FRAME_STATE_FOR macro,
|
|
returning true iff the frame was a sigreturn() frame that we
|
|
can understand. */
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|
|
|
bool
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|
_Unwind_fallback_frame_state_for (struct _Unwind_Context *context,
|
|
_Unwind_FrameState *fs)
|
|
{
|
|
reg_unit gprs[32];
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|
|
|
if (!interpret_libc (gprs, context))
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|
return false;
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|
return handle_syscall (fs, gprs, _Unwind_GetCFA (context));
|
|
}
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|
#endif
|