61f17a5c5a
Improve modes_tieable by returning true in more cases: allow scalar access
within vectors without requiring an extra move. Removing these moves helps
the register allocator in deciding whether to use integer or FP registers on
operations that can be done on both. This saves about 100 instructions in the
gcc.target/aarch64 tests.
A typical example:
orr v1.8b, v0.8b, v1.8b
fmov x0, d0
fmov x1, d1
add x0, x1, x0
ins v0.d[0], x0
orr v0.8b, v1.8b, v0.8b
after:
orr v1.8b, v0.8b, v1.8b
add d0, d1, d0
orr v0.8b, v1.8b, v0.8b
gcc/
* config/aarch64/aarch64.c (aarch64_modes_tieable_p):
Allow scalar/single vector modes to be tieable.
From-SVN: r237597
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