628 lines
22 KiB
C
628 lines
22 KiB
C
/*
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* Copyright 1988, 1989 Hans-J. Boehm, Alan J. Demers
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* Copyright (c) 1991-1994 by Xerox Corporation. All rights reserved.
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*
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* THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED
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* OR IMPLIED. ANY USE IS AT YOUR OWN RISK.
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*
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* Permission is hereby granted to use or copy this program
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* for any purpose, provided the above notices are retained on all copies.
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* Permission to modify the code and to distribute modified code is granted,
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* provided the above notices are retained, and a notice that the code was
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* modified is included with the above copyright notice.
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*/
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/* Boehm, November 17, 1995 12:13 pm PST */
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# include "private/gc_priv.h"
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# include <stdio.h>
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# include <setjmp.h>
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# if defined(OS2) || defined(CX_UX)
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# define _setjmp(b) setjmp(b)
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# define _longjmp(b,v) longjmp(b,v)
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# endif
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# ifdef AMIGA
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# ifndef __GNUC__
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# include <dos.h>
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# else
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# include <machine/reg.h>
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# endif
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# endif
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#if defined(RS6000) || defined(POWERPC)
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# include <ucontext.h>
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#endif
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#if defined(__MWERKS__) && !defined(POWERPC)
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asm static void PushMacRegisters()
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{
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sub.w #4,sp // reserve space for one parameter.
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move.l a2,(sp)
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jsr GC_push_one
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move.l a3,(sp)
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jsr GC_push_one
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move.l a4,(sp)
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jsr GC_push_one
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# if !__option(a6frames)
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// <pcb> perhaps a6 should be pushed if stack frames are not being used.
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move.l a6,(sp)
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jsr GC_push_one
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# endif
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// skip a5 (globals), a6 (frame pointer), and a7 (stack pointer)
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move.l d2,(sp)
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jsr GC_push_one
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move.l d3,(sp)
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jsr GC_push_one
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move.l d4,(sp)
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jsr GC_push_one
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move.l d5,(sp)
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jsr GC_push_one
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move.l d6,(sp)
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jsr GC_push_one
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move.l d7,(sp)
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jsr GC_push_one
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add.w #4,sp // fix stack.
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rts
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}
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#endif /* __MWERKS__ */
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# if defined(SPARC) || defined(IA64)
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/* Value returned from register flushing routine; either sp (SPARC) */
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/* or ar.bsp (IA64) */
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word GC_save_regs_ret_val;
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# endif
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/* Routine to mark from registers that are preserved by the C compiler. */
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/* This must be ported to every new architecture. There is a generic */
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/* version at the end, that is likely, but not guaranteed to work */
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/* on your architecture. Run the test_setjmp program to see whether */
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/* there is any chance it will work. */
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#if !defined(USE_GENERIC_PUSH_REGS) && !defined(USE_ASM_PUSH_REGS)
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#undef HAVE_PUSH_REGS
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void GC_push_regs()
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{
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# ifdef RT
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register long TMP_SP; /* must be bound to r11 */
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# endif
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# ifdef VAX
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/* VAX - generic code below does not work under 4.2 */
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/* r1 through r5 are caller save, and therefore */
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/* on the stack or dead. */
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asm("pushl r11"); asm("calls $1,_GC_push_one");
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asm("pushl r10"); asm("calls $1,_GC_push_one");
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asm("pushl r9"); asm("calls $1,_GC_push_one");
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asm("pushl r8"); asm("calls $1,_GC_push_one");
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asm("pushl r7"); asm("calls $1,_GC_push_one");
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asm("pushl r6"); asm("calls $1,_GC_push_one");
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# define HAVE_PUSH_REGS
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# endif
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# if defined(M68K) && (defined(SUNOS4) || defined(NEXT))
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/* M68K SUNOS - could be replaced by generic code */
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/* a0, a1 and d1 are caller save */
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/* and therefore are on stack or dead. */
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asm("subqw #0x4,sp"); /* allocate word on top of stack */
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asm("movl a2,sp@"); asm("jbsr _GC_push_one");
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asm("movl a3,sp@"); asm("jbsr _GC_push_one");
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asm("movl a4,sp@"); asm("jbsr _GC_push_one");
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asm("movl a5,sp@"); asm("jbsr _GC_push_one");
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/* Skip frame pointer and stack pointer */
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asm("movl d1,sp@"); asm("jbsr _GC_push_one");
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asm("movl d2,sp@"); asm("jbsr _GC_push_one");
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asm("movl d3,sp@"); asm("jbsr _GC_push_one");
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asm("movl d4,sp@"); asm("jbsr _GC_push_one");
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asm("movl d5,sp@"); asm("jbsr _GC_push_one");
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asm("movl d6,sp@"); asm("jbsr _GC_push_one");
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asm("movl d7,sp@"); asm("jbsr _GC_push_one");
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asm("addqw #0x4,sp"); /* put stack back where it was */
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# define HAVE_PUSH_REGS
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# endif
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# if defined(M68K) && defined(HP)
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/* M68K HP - could be replaced by generic code */
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/* a0, a1 and d1 are caller save. */
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asm("subq.w &0x4,%sp"); /* allocate word on top of stack */
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asm("mov.l %a2,(%sp)"); asm("jsr _GC_push_one");
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asm("mov.l %a3,(%sp)"); asm("jsr _GC_push_one");
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asm("mov.l %a4,(%sp)"); asm("jsr _GC_push_one");
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asm("mov.l %a5,(%sp)"); asm("jsr _GC_push_one");
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/* Skip frame pointer and stack pointer */
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asm("mov.l %d1,(%sp)"); asm("jsr _GC_push_one");
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asm("mov.l %d2,(%sp)"); asm("jsr _GC_push_one");
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asm("mov.l %d3,(%sp)"); asm("jsr _GC_push_one");
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asm("mov.l %d4,(%sp)"); asm("jsr _GC_push_one");
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asm("mov.l %d5,(%sp)"); asm("jsr _GC_push_one");
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asm("mov.l %d6,(%sp)"); asm("jsr _GC_push_one");
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asm("mov.l %d7,(%sp)"); asm("jsr _GC_push_one");
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asm("addq.w &0x4,%sp"); /* put stack back where it was */
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# define HAVE_PUSH_REGS
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# endif /* M68K HP */
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# if defined(M68K) && defined(AMIGA)
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/* AMIGA - could be replaced by generic code */
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/* a0, a1, d0 and d1 are caller save */
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# ifdef __GNUC__
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asm("subq.w &0x4,%sp"); /* allocate word on top of stack */
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asm("mov.l %a2,(%sp)"); asm("jsr _GC_push_one");
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asm("mov.l %a3,(%sp)"); asm("jsr _GC_push_one");
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asm("mov.l %a4,(%sp)"); asm("jsr _GC_push_one");
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asm("mov.l %a5,(%sp)"); asm("jsr _GC_push_one");
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asm("mov.l %a6,(%sp)"); asm("jsr _GC_push_one");
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/* Skip frame pointer and stack pointer */
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asm("mov.l %d2,(%sp)"); asm("jsr _GC_push_one");
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asm("mov.l %d3,(%sp)"); asm("jsr _GC_push_one");
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asm("mov.l %d4,(%sp)"); asm("jsr _GC_push_one");
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asm("mov.l %d5,(%sp)"); asm("jsr _GC_push_one");
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asm("mov.l %d6,(%sp)"); asm("jsr _GC_push_one");
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asm("mov.l %d7,(%sp)"); asm("jsr _GC_push_one");
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asm("addq.w &0x4,%sp"); /* put stack back where it was */
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# define HAVE_PUSH_REGS
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# else /* !__GNUC__ */
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GC_push_one(getreg(REG_A2));
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GC_push_one(getreg(REG_A3));
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# ifndef __SASC
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/* Can probably be changed to #if 0 -Kjetil M. (a4=globals)*/
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GC_push_one(getreg(REG_A4));
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# endif
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GC_push_one(getreg(REG_A5));
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GC_push_one(getreg(REG_A6));
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/* Skip stack pointer */
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GC_push_one(getreg(REG_D2));
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GC_push_one(getreg(REG_D3));
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GC_push_one(getreg(REG_D4));
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GC_push_one(getreg(REG_D5));
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GC_push_one(getreg(REG_D6));
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GC_push_one(getreg(REG_D7));
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# define HAVE_PUSH_REGS
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# endif /* !__GNUC__ */
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# endif /* AMIGA */
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# if defined(M68K) && defined(MACOS)
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# if defined(THINK_C)
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# define PushMacReg(reg) \
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move.l reg,(sp) \
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jsr GC_push_one
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asm {
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sub.w #4,sp ; reserve space for one parameter.
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PushMacReg(a2);
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PushMacReg(a3);
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PushMacReg(a4);
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; skip a5 (globals), a6 (frame pointer), and a7 (stack pointer)
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PushMacReg(d2);
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PushMacReg(d3);
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PushMacReg(d4);
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PushMacReg(d5);
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PushMacReg(d6);
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PushMacReg(d7);
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add.w #4,sp ; fix stack.
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}
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# define HAVE_PUSH_REGS
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# undef PushMacReg
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# endif /* THINK_C */
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# if defined(__MWERKS__)
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PushMacRegisters();
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# define HAVE_PUSH_REGS
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# endif /* __MWERKS__ */
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# endif /* MACOS */
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# if defined(I386) &&!defined(OS2) &&!defined(SVR4) \
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&& (defined(__MINGW32__) || !defined(MSWIN32)) \
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&& !defined(SCO) && !defined(SCO_ELF) \
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&& !(defined(LINUX) && defined(__ELF__)) \
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&& !(defined(FREEBSD) && defined(__ELF__)) \
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&& !(defined(NETBSD) && defined(__ELF__)) \
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&& !(defined(OPENBSD) && defined(__ELF__)) \
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&& !(defined(BEOS) && defined(__ELF__)) \
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&& !defined(DOS4GW) && !defined(HURD)
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/* I386 code, generic code does not appear to work */
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/* It does appear to work under OS2, and asms dont */
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/* This is used for some 38g UNIX variants and for CYGWIN32 */
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asm("pushl %eax"); asm("call _GC_push_one"); asm("addl $4,%esp");
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asm("pushl %ecx"); asm("call _GC_push_one"); asm("addl $4,%esp");
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asm("pushl %edx"); asm("call _GC_push_one"); asm("addl $4,%esp");
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asm("pushl %ebp"); asm("call _GC_push_one"); asm("addl $4,%esp");
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asm("pushl %esi"); asm("call _GC_push_one"); asm("addl $4,%esp");
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asm("pushl %edi"); asm("call _GC_push_one"); asm("addl $4,%esp");
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asm("pushl %ebx"); asm("call _GC_push_one"); asm("addl $4,%esp");
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# define HAVE_PUSH_REGS
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# endif
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# if ( defined(I386) && defined(LINUX) && defined(__ELF__) ) \
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|| ( defined(I386) && defined(FREEBSD) && defined(__ELF__) ) \
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|| ( defined(I386) && defined(NETBSD) && defined(__ELF__) ) \
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|| ( defined(I386) && defined(OPENBSD) && defined(__ELF__) ) \
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|| ( defined(I386) && defined(HURD) && defined(__ELF__) ) \
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|| ( defined(I386) && defined(DGUX) )
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/* This is modified for Linux with ELF (Note: _ELF_ only) */
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/* This section handles FreeBSD with ELF. */
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/* Eax is caller-save and dead here. Other caller-save */
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/* registers could also be skipped. We assume there are no */
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/* pointers in MMX registers, etc. */
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/* We combine instructions in a single asm to prevent gcc from */
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/* inserting code in the middle. */
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asm("pushl %ecx; call GC_push_one; addl $4,%esp");
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asm("pushl %edx; call GC_push_one; addl $4,%esp");
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asm("pushl %ebp; call GC_push_one; addl $4,%esp");
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asm("pushl %esi; call GC_push_one; addl $4,%esp");
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asm("pushl %edi; call GC_push_one; addl $4,%esp");
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asm("pushl %ebx; call GC_push_one; addl $4,%esp");
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# define HAVE_PUSH_REGS
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# endif
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# if ( defined(I386) && defined(BEOS) && defined(__ELF__) )
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/* As far as I can understand from */
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/* http://www.beunited.org/articles/jbq/nasm.shtml, */
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/* only ebp, esi, edi and ebx are not scratch. How MMX */
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/* etc. registers should be treated, I have no idea. */
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asm("pushl %ebp; call GC_push_one; addl $4,%esp");
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asm("pushl %esi; call GC_push_one; addl $4,%esp");
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asm("pushl %edi; call GC_push_one; addl $4,%esp");
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asm("pushl %ebx; call GC_push_one; addl $4,%esp");
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# define HAVE_PUSH_REGS
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# endif
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# if defined(I386) && defined(MSWIN32) && !defined(__MINGW32__) \
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&& !defined(USE_GENERIC)
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/* I386 code, Microsoft variant */
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__asm push eax
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__asm call GC_push_one
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__asm add esp,4
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__asm push ebx
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__asm call GC_push_one
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__asm add esp,4
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__asm push ecx
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__asm call GC_push_one
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__asm add esp,4
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__asm push edx
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__asm call GC_push_one
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__asm add esp,4
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__asm push ebp
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__asm call GC_push_one
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__asm add esp,4
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__asm push esi
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__asm call GC_push_one
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__asm add esp,4
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__asm push edi
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__asm call GC_push_one
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__asm add esp,4
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# define HAVE_PUSH_REGS
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# endif
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# if defined(I386) && (defined(SVR4) || defined(SCO) || defined(SCO_ELF))
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/* I386 code, SVR4 variant, generic code does not appear to work */
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asm("pushl %eax"); asm("call GC_push_one"); asm("addl $4,%esp");
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asm("pushl %ebx"); asm("call GC_push_one"); asm("addl $4,%esp");
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asm("pushl %ecx"); asm("call GC_push_one"); asm("addl $4,%esp");
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asm("pushl %edx"); asm("call GC_push_one"); asm("addl $4,%esp");
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asm("pushl %ebp"); asm("call GC_push_one"); asm("addl $4,%esp");
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asm("pushl %esi"); asm("call GC_push_one"); asm("addl $4,%esp");
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asm("pushl %edi"); asm("call GC_push_one"); asm("addl $4,%esp");
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# define HAVE_PUSH_REGS
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# endif
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# ifdef NS32K
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asm ("movd r3, tos"); asm ("bsr ?_GC_push_one"); asm ("adjspb $-4");
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asm ("movd r4, tos"); asm ("bsr ?_GC_push_one"); asm ("adjspb $-4");
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asm ("movd r5, tos"); asm ("bsr ?_GC_push_one"); asm ("adjspb $-4");
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asm ("movd r6, tos"); asm ("bsr ?_GC_push_one"); asm ("adjspb $-4");
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asm ("movd r7, tos"); asm ("bsr ?_GC_push_one"); asm ("adjspb $-4");
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# define HAVE_PUSH_REGS
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# endif
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# if defined(SPARC)
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GC_save_regs_ret_val = GC_save_regs_in_stack();
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# define HAVE_PUSH_REGS
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# endif
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# ifdef RT
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GC_push_one(TMP_SP); /* GC_push_one from r11 */
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asm("cas r11, r6, r0"); GC_push_one(TMP_SP); /* r6 */
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asm("cas r11, r7, r0"); GC_push_one(TMP_SP); /* through */
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asm("cas r11, r8, r0"); GC_push_one(TMP_SP); /* r10 */
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asm("cas r11, r9, r0"); GC_push_one(TMP_SP);
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asm("cas r11, r10, r0"); GC_push_one(TMP_SP);
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asm("cas r11, r12, r0"); GC_push_one(TMP_SP); /* r12 */
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asm("cas r11, r13, r0"); GC_push_one(TMP_SP); /* through */
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asm("cas r11, r14, r0"); GC_push_one(TMP_SP); /* r15 */
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asm("cas r11, r15, r0"); GC_push_one(TMP_SP);
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# define HAVE_PUSH_REGS
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# endif
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# if defined(M68K) && defined(SYSV)
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/* Once again similar to SUN and HP, though setjmp appears to work.
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--Parag
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*/
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# ifdef __GNUC__
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asm("subqw #0x4,%sp"); /* allocate word on top of stack */
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asm("movl %a2,%sp@"); asm("jbsr GC_push_one");
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asm("movl %a3,%sp@"); asm("jbsr GC_push_one");
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asm("movl %a4,%sp@"); asm("jbsr GC_push_one");
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asm("movl %a5,%sp@"); asm("jbsr GC_push_one");
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/* Skip frame pointer and stack pointer */
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asm("movl %d1,%sp@"); asm("jbsr GC_push_one");
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asm("movl %d2,%sp@"); asm("jbsr GC_push_one");
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asm("movl %d3,%sp@"); asm("jbsr GC_push_one");
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asm("movl %d4,%sp@"); asm("jbsr GC_push_one");
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asm("movl %d5,%sp@"); asm("jbsr GC_push_one");
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asm("movl %d6,%sp@"); asm("jbsr GC_push_one");
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asm("movl %d7,%sp@"); asm("jbsr GC_push_one");
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asm("addqw #0x4,%sp"); /* put stack back where it was */
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# define HAVE_PUSH_REGS
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# else /* !__GNUC__*/
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asm("subq.w &0x4,%sp"); /* allocate word on top of stack */
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asm("mov.l %a2,(%sp)"); asm("jsr GC_push_one");
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asm("mov.l %a3,(%sp)"); asm("jsr GC_push_one");
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asm("mov.l %a4,(%sp)"); asm("jsr GC_push_one");
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asm("mov.l %a5,(%sp)"); asm("jsr GC_push_one");
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/* Skip frame pointer and stack pointer */
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asm("mov.l %d1,(%sp)"); asm("jsr GC_push_one");
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asm("mov.l %d2,(%sp)"); asm("jsr GC_push_one");
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asm("mov.l %d3,(%sp)"); asm("jsr GC_push_one");
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asm("mov.l %d4,(%sp)"); asm("jsr GC_push_one");
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asm("mov.l %d5,(%sp)"); asm("jsr GC_push_one");
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asm("mov.l %d6,(%sp)"); asm("jsr GC_push_one");
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asm("mov.l %d7,(%sp)"); asm("jsr GC_push_one");
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asm("addq.w &0x4,%sp"); /* put stack back where it was */
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# define HAVE_PUSH_REGS
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# endif /* !__GNUC__ */
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# endif /* M68K/SYSV */
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# if defined(PJ)
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{
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register int * sp asm ("optop");
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extern int *__libc_stack_end;
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GC_push_all_stack (sp, __libc_stack_end);
|
|
# define HAVE_PUSH_REGS
|
|
/* Isn't this redundant with the code to push the stack? */
|
|
}
|
|
# endif
|
|
|
|
/* other machines... */
|
|
# if !defined(HAVE_PUSH_REGS)
|
|
--> We just generated an empty GC_push_regs, which
|
|
--> is almost certainly broken. Try defining
|
|
--> USE_GENERIC_PUSH_REGS instead.
|
|
# endif
|
|
}
|
|
#endif /* !USE_GENERIC_PUSH_REGS && !USE_ASM_PUSH_REGS */
|
|
|
|
void GC_with_callee_saves_pushed(fn, arg)
|
|
void (*fn)();
|
|
ptr_t arg;
|
|
{
|
|
word dummy;
|
|
|
|
# if defined(USE_GENERIC_PUSH_REGS)
|
|
# ifdef HAVE_BUILTIN_UNWIND_INIT
|
|
/* This was suggested by Richard Henderson as the way to */
|
|
/* force callee-save registers and register windows onto */
|
|
/* the stack. */
|
|
__builtin_unwind_init();
|
|
# else /* !HAVE_BUILTIN_UNWIND_INIT */
|
|
# if defined(RS6000) || defined(POWERPC)
|
|
/* FIXME: RS6000 means AIX. */
|
|
/* This should probably be used in all Posix/non-gcc */
|
|
/* settings. We defer that change to minimize risk. */
|
|
ucontext_t ctxt;
|
|
getcontext(&ctxt);
|
|
# else
|
|
/* Generic code */
|
|
/* The idea is due to Parag Patel at HP. */
|
|
/* We're not sure whether he would like */
|
|
/* to be he acknowledged for it or not. */
|
|
jmp_buf regs;
|
|
register word * i = (word *) regs;
|
|
register ptr_t lim = (ptr_t)(regs) + (sizeof regs);
|
|
|
|
/* Setjmp doesn't always clear all of the buffer. */
|
|
/* That tends to preserve garbage. Clear it. */
|
|
for (; (char *)i < lim; i++) {
|
|
*i = 0;
|
|
}
|
|
# if defined(MSWIN32) || defined(MSWINCE) \
|
|
|| defined(UTS4) || defined(LINUX) || defined(EWS4800)
|
|
(void) setjmp(regs);
|
|
# else
|
|
(void) _setjmp(regs);
|
|
/* We don't want to mess with signals. According to */
|
|
/* SUSV3, setjmp() may or may not save signal mask. */
|
|
/* _setjmp won't, but is less portable. */
|
|
# endif
|
|
# endif /* !AIX ... */
|
|
# endif /* !HAVE_BUILTIN_UNWIND_INIT */
|
|
# else
|
|
# if defined(PTHREADS) && !defined(MSWIN32) /* !USE_GENERIC_PUSH_REGS */
|
|
/* We may still need this to save thread contexts. */
|
|
ucontext_t ctxt;
|
|
getcontext(&ctxt);
|
|
# else /* Shouldn't be needed */
|
|
ABORT("Unexpected call to GC_with_callee_saves_pushed");
|
|
# endif
|
|
# endif
|
|
# if (defined(SPARC) && !defined(HAVE_BUILTIN_UNWIND_INIT)) \
|
|
|| defined(IA64)
|
|
/* On a register window machine, we need to save register */
|
|
/* contents on the stack for this to work. The setjmp */
|
|
/* is probably not needed on SPARC, since pointers are */
|
|
/* only stored in windowed or scratch registers. It is */
|
|
/* needed on IA64, since some non-windowed registers are */
|
|
/* preserved. */
|
|
{
|
|
GC_save_regs_ret_val = GC_save_regs_in_stack();
|
|
/* On IA64 gcc, could use __builtin_ia64_flushrs() and */
|
|
/* __builtin_ia64_flushrs(). The latter will be done */
|
|
/* implicitly by __builtin_unwind_init() for gcc3.0.1 */
|
|
/* and later. */
|
|
}
|
|
# endif
|
|
fn(arg);
|
|
/* Strongly discourage the compiler from treating the above */
|
|
/* as a tail-call, since that would pop the register */
|
|
/* contents before we get a chance to look at them. */
|
|
GC_noop1((word)(&dummy));
|
|
}
|
|
|
|
#if defined(USE_GENERIC_PUSH_REGS)
|
|
void GC_generic_push_regs(cold_gc_frame)
|
|
ptr_t cold_gc_frame;
|
|
{
|
|
GC_with_callee_saves_pushed(GC_push_current_stack, cold_gc_frame);
|
|
}
|
|
#endif /* USE_GENERIC_PUSH_REGS */
|
|
|
|
/* On register window machines, we need a way to force registers into */
|
|
/* the stack. Return sp. */
|
|
# ifdef SPARC
|
|
asm(" .seg \"text\"");
|
|
# if defined(SVR4) || defined(NETBSD) || defined(FREEBSD)
|
|
asm(" .globl GC_save_regs_in_stack");
|
|
asm("GC_save_regs_in_stack:");
|
|
asm(" .type GC_save_regs_in_stack,#function");
|
|
# else
|
|
asm(" .globl _GC_save_regs_in_stack");
|
|
asm("_GC_save_regs_in_stack:");
|
|
# endif
|
|
# if defined(__arch64__) || defined(__sparcv9)
|
|
asm(" save %sp,-128,%sp");
|
|
asm(" flushw");
|
|
asm(" ret");
|
|
asm(" restore %sp,2047+128,%o0");
|
|
# else
|
|
asm(" ta 0x3 ! ST_FLUSH_WINDOWS");
|
|
asm(" retl");
|
|
asm(" mov %sp,%o0");
|
|
# endif
|
|
# ifdef SVR4
|
|
asm(" .GC_save_regs_in_stack_end:");
|
|
asm(" .size GC_save_regs_in_stack,.GC_save_regs_in_stack_end-GC_save_regs_in_stack");
|
|
# endif
|
|
# ifdef LINT
|
|
word GC_save_regs_in_stack() { return(0 /* sp really */);}
|
|
# endif
|
|
# endif
|
|
|
|
/* On IA64, we also need to flush register windows. But they end */
|
|
/* up on the other side of the stack segment. */
|
|
/* Returns the backing store pointer for the register stack. */
|
|
/* We now implement this as a separate assembly file, since inline */
|
|
/* assembly code here doesn't work with either the Intel or HP */
|
|
/* compilers. */
|
|
# if 0
|
|
# ifdef LINUX
|
|
asm(" .text");
|
|
asm(" .psr abi64");
|
|
asm(" .psr lsb");
|
|
asm(" .lsb");
|
|
asm("");
|
|
asm(" .text");
|
|
asm(" .align 16");
|
|
asm(" .global GC_save_regs_in_stack");
|
|
asm(" .proc GC_save_regs_in_stack");
|
|
asm("GC_save_regs_in_stack:");
|
|
asm(" .body");
|
|
asm(" flushrs");
|
|
asm(" ;;");
|
|
asm(" mov r8=ar.bsp");
|
|
asm(" br.ret.sptk.few rp");
|
|
asm(" .endp GC_save_regs_in_stack");
|
|
# endif /* LINUX */
|
|
# if 0 /* Other alternatives that don't work on HP/UX */
|
|
word GC_save_regs_in_stack() {
|
|
# if USE_BUILTINS
|
|
__builtin_ia64_flushrs();
|
|
return __builtin_ia64_bsp();
|
|
# else
|
|
# ifdef HPUX
|
|
_asm(" flushrs");
|
|
_asm(" ;;");
|
|
_asm(" mov r8=ar.bsp");
|
|
_asm(" br.ret.sptk.few rp");
|
|
# else
|
|
asm(" flushrs");
|
|
asm(" ;;");
|
|
asm(" mov r8=ar.bsp");
|
|
asm(" br.ret.sptk.few rp");
|
|
# endif
|
|
# endif
|
|
}
|
|
# endif
|
|
# endif
|
|
|
|
/* GC_clear_stack_inner(arg, limit) clears stack area up to limit and */
|
|
/* returns arg. Stack clearing is crucial on SPARC, so we supply */
|
|
/* an assembly version that's more careful. Assumes limit is hotter */
|
|
/* than sp, and limit is 8 byte aligned. */
|
|
#if defined(ASM_CLEAR_CODE)
|
|
#ifndef SPARC
|
|
--> fix it
|
|
#endif
|
|
# ifdef SUNOS4
|
|
asm(".globl _GC_clear_stack_inner");
|
|
asm("_GC_clear_stack_inner:");
|
|
# else
|
|
asm(".globl GC_clear_stack_inner");
|
|
asm("GC_clear_stack_inner:");
|
|
asm(".type GC_save_regs_in_stack,#function");
|
|
# endif
|
|
#if defined(__arch64__) || defined(__sparcv9)
|
|
asm("mov %sp,%o2"); /* Save sp */
|
|
asm("add %sp,2047-8,%o3"); /* p = sp+bias-8 */
|
|
asm("add %o1,-2047-192,%sp"); /* Move sp out of the way, */
|
|
/* so that traps still work. */
|
|
/* Includes some extra words */
|
|
/* so we can be sloppy below. */
|
|
asm("loop:");
|
|
asm("stx %g0,[%o3]"); /* *(long *)p = 0 */
|
|
asm("cmp %o3,%o1");
|
|
asm("bgu,pt %xcc, loop"); /* if (p > limit) goto loop */
|
|
asm("add %o3,-8,%o3"); /* p -= 8 (delay slot) */
|
|
asm("retl");
|
|
asm("mov %o2,%sp"); /* Restore sp., delay slot */
|
|
#else
|
|
asm("mov %sp,%o2"); /* Save sp */
|
|
asm("add %sp,-8,%o3"); /* p = sp-8 */
|
|
asm("clr %g1"); /* [g0,g1] = 0 */
|
|
asm("add %o1,-0x60,%sp"); /* Move sp out of the way, */
|
|
/* so that traps still work. */
|
|
/* Includes some extra words */
|
|
/* so we can be sloppy below. */
|
|
asm("loop:");
|
|
asm("std %g0,[%o3]"); /* *(long long *)p = 0 */
|
|
asm("cmp %o3,%o1");
|
|
asm("bgu loop "); /* if (p > limit) goto loop */
|
|
asm("add %o3,-8,%o3"); /* p -= 8 (delay slot) */
|
|
asm("retl");
|
|
asm("mov %o2,%sp"); /* Restore sp., delay slot */
|
|
#endif /* old SPARC */
|
|
/* First argument = %o0 = return value */
|
|
# ifdef SVR4
|
|
asm(" .GC_clear_stack_inner_end:");
|
|
asm(" .size GC_clear_stack_inner,.GC_clear_stack_inner_end-GC_clear_stack_inner");
|
|
# endif
|
|
|
|
# ifdef LINT
|
|
/*ARGSUSED*/
|
|
ptr_t GC_clear_stack_inner(arg, limit)
|
|
ptr_t arg; word limit;
|
|
{ return(arg); }
|
|
# endif
|
|
#endif
|