4b4bf9414f
2004-07-08 Jerry Quinn <jlquinn@optonline.net> * alias.c (nonlocal_mentioned_p, nonlocal_referenced_p, nonlocal_set_p, init_alias_analysis): Use, LABEL_P, JUMP_P, CALL_P, NONJUMP_INSN_P, INSN_P, NOTE_P, BARRIER_P. * bb-reorder.c (mark_bb_for_unlikely_executed_section, add_labels_and_missing_jumps, find_jump_block, fix_crossing_unconditional_branches, add_reg_crossing_jump_notes): Likewise. * bt-load.c (btr_referenced_p, compute_defs_uses_and_gen, link_btr_uses, move_btr_def): Likewise. * builtins.c (expand_builtin_longjmp, expand_builtin_nonlocal_goto, expand_builtin_expect_jump): Likewise. * caller-save.c (save_call_clobbered_regs, insert_one_insn): Likewise. * calls.c (expand_call, emit_library_call_value_1): Likewise. * cfganal.c (forwarder_block_p): Likewise. * cfgbuild.c (inside_basic_block_p, count_basic_blocks, make_label_edge, rtl_make_eh_edge, make_edges, find_basic_blocks_1, find_bb_boundaries): Likewise. * cfgcleanup.c (try_simplify_condjump, try_forward_edges, merge_blocks_move_predecessor_nojumps, merge_blocks_move_successor_nojumps, insns_match_p, flow_find_cross_jump, outgoing_edges_match, try_crossjump_to_edge, try_optimize_cfg): Likewise. * cfgexpand.c (expand_block, construct_exit_block): Likewise. * cfglayout.c (skip_insns_after_block, label_for_bb, record_effective_endpoints, insn_locators_initialize, fixup_reorder_chain, update_unlikely_executed_notes): Likewise. * cfgmainloop.c (create_loop_notes): Likewise. * cfgrtl.c (delete_insn, delete_insn_chain, create_basic_block_structure, rtl_delete_block, free_bb_for_insn, update_bb_for_insn, rtl_merge_blocks, rtl_can_merge_blocks, block_label, try_redirect_by_replacing_jump, last_loop_beg_note, redirect_branch_edge, force_nonfallthru_and_redirect, rtl_tidy_fallthru_edge, back_edge_of_syntactic_loop_p, rtl_split_edge, commit_one_edge_insertion, print_rtl_with_bb, update_br_prob_note, rtl_verify_flow_info_1, rtl_verify_flow_info, purge_dead_edges, cfg_layout_redirect_edge_and_branch, cfg_layout_delete_block, cfg_layout_can_merge_blocks_p, cfg_layout_merge_blocks, rtl_block_ends_with_call_p, need_fake_edge_p, rtl_flow_call_edges_add): Likewise. * combine.c (combine_instructions, can_combine_p, try_combine, find_split_point, record_dead_and_set_regs, reg_dead_at_p, distribute_notes, distribute_links, insn_cuid): Likewise. * cse.c (fold_rtx, cse_insn, cse_around_loop, invalidate_skipped_block, cse_set_around_loop, cse_end_of_basic_block, cse_main, cse_basic_block, cse_condition_code_reg): Likewise. * cselib.c (cselib_process_insn): Likewise. * ddg.c (create_ddg): Likewise. * df.c (df_insn_refs_record, df_bb_rd_local_compute, df_insns_modify): Likewise. * dwarf2out.c (dwarf2out_stack_adjust, dwarf2out_frame_debug, gen_label_die, dwarf2out_var_location): Likewise. * emit-rtl.c (get_first_nonnote_insn, get_last_nonnote_insn, next_insn, previous_insn, next_nonnote_insn, prev_nonnote_insn, last_call_insn, active_insn_p, next_label, prev_label, link_cc0_insns, next_cc0_user, try_split, add_insn_after, add_insn_before, remove_insn, add_function_usage_to, reorder_insns, find_line_note, remove_unnecessary_notes, emit_insn_after_1, classify_insn): Likewise. * except.c (convert_from_eh_region_ranges_1, emit_to_new_bb_before, connect_post_landing_pads, sjlj_mark_call_sites, sjlj_emit_function_enter, sjlj_emit_function_exit, reachable_handlers, can_throw_internal, can_throw_external, set_nothrow_function_flags, convert_to_eh_region_ranges): Likewise. * explow.c (optimize_save_area_alloca): Likewise. * expr.c (expand_expr_real): Likewise. * final.c (insn_current_reference_address, compute_alignments, shorten_branches, final, scan_ahead_for_unlikely_executed_note, final_scan_insn, output_asm_label, leaf_function_p): Likewise. * flow.c (first_insn_after_basic_block_note, delete_dead_jumptables, propagate_block_delete_insn, propagate_one_insn, init_propagate_block_info, propagate_block, libcall_dead_p, mark_set_1, attempt_auto_inc, find_auto_inc, try_pre_increment): Likewise. * function.c (instantiate_virtual_regs, reorder_blocks_1, expand_function_start, expand_function_end, contains, thread_prologue_and_epilogue_insns, reposition_prologue_and_epilogue_notes): Likewise. * gcse.c (constprop_register, bypass_conditional_jumps, insert_insn_end_bb, gcse_after_reload): Likewise. * genemit.c (gen_expand, gen_split): Likewise. * genpeep.c (gen_peephole, main): Likewise. * global.c (build_insn_chain): Likewise. * graph.c (node_data, print_rtl_graph_with_bb): Likewise. * haifa-sched.c (unlink_other_notes, unlink_line_notes, get_block_head_tail, no_real_insns_p, rm_line_notes, save_line_notes, restore_line_notes, rm_redundant_line_notes, rm_other_notes, ok_for_early_queue_removal, set_priorities, sched_init): Likewise. * ifcvt.c (count_bb_insns, first_active_insn, last_active_insn, cond_exec_process_insns, end_ifcvt_sequence, noce_process_if_block, merge_if_block, block_jumps_and_fallthru_p, find_if_block, dead_or_predicable): Likewise. * integrate.c (try_constants): Likewise. * jump.c (rebuild_jump_labels, cleanup_barriers, purge_line_number_notes, init_label_info, mark_all_labels, squeeze_notes, get_label_before, get_label_after, reversed_comparison_code_parts, simplejump_p, pc_set, returnjump_p, onlyjump_p, follow_jumps, mark_jump_label, delete_barrier, delete_prior_computation, delete_computation, delete_related_insns, delete_for_peephole, redirect_jump): Likewise. * lcm.c (optimize_mode_switching): Likewise. * local-alloc.c (validate_equiv_mem, update_equiv_regs, block_alloc): Likewise. * loop-doloop.c (doloop_valid_p, doloop_optimize): Likewise. * loop-invariant.c (find_exits, find_invariants_bb): Likewise. * loop-iv.c (simplify_using_assignment): Likewise. * loop.c (compute_luids, loop_optimize, scan_loop, libcall_other_reg, libcall_benefit, skip_consec_insns, move_movables, prescan_loop, find_and_verify_loops, labels_in_range_p, for_each_insn_in_loop, loop_bivs_init_find, strength_reduce, check_insn_for_bivs, check_insn_for_givs, check_final_value, update_giv_derive, basic_induction_var, product_cheap_p, check_dbra_loop, loop_insn_first_p, last_use_this_basic_block, canonicalize_condition, get_condition, loop_regs_scan, load_mems, try_copy_prop, LOOP_BLOCK_NUM, loop_dump_aux): Likewise. * modulo-sched.c (doloop_register_get, find_line_note, sms_schedule, sms_schedule_by_order): Likewise. * optabs.c (emit_no_conflict_block, emit_libcall_block): Likewise. * postreload.c (reload_cse_simplify_operands, reload_combine, reload_cse_move2add): Likewise. * predict.c (can_predict_insn_p, estimate_probability, expected_value_to_br_prob, process_note_predictions): Likewise. * print-rtl.c (print_rtx, print_rtl, print_rtl_single): Likewise. * profile.c (branch_prob): Likewise. * ra-build.c (live_out_1, livethrough_conflicts_bb, detect_webs_set_in_cond_jump): Likewise. * ra-debug.c (ra_print_rtx_object, ra_debug_insns, ra_print_rtl_with_bb): Likewise. * ra-rewrite.c (insert_stores, rewrite_program2): Likewise. * recog.c (next_insn_tests_no_inequality, find_single_use, split_all_insns, peephole2_optimize, if_test_bypass_p): Likewise. * reg-stack.c (next_flags_user, record_label_references, emit_swap_insn, swap_rtx_condition, subst_stack_regs, compensate_edge, convert_regs_1): Likewise. * regclass.c (scan_one_insn): Likewise. * regmove.c (optimize_reg_copy_1, optimize_reg_copy_2, fixup_match_2, regmove_optimize, fixup_match_1, single_set_for_csa, combine_stack_adjustments_for_block): Likewise. * regrename.c (build_def_use, copyprop_hardreg_forward_1): Likewise. * reload.c (find_reloads, find_reloads_address_1, subst_reloads, find_equiv_reg): Likewise. * reload1.c (reload, calculate_needs_all_insns, set_label_offsets, reload_as_needed, emit_input_reload_insns, do_output_reload, delete_output_reload, delete_address_reloads_1, fixup_abnormal_edges): Likewise. * reorg.c (find_end_label, emit_delay_sequence, delete_from_delay_slot, delete_scheduled_jump, optimize_skip, get_jump_flags, rare_destination, mostly_true_jump, try_merge_delay_insns, redundant_insn, own_thread_p, fill_simple_delay_slots, fill_slots_from_thread, fill_eager_delay_slots, relax_delay_slots, make_return_insns, dbr_schedule): Likewise. * resource.c (find_basic_block, next_insn_no_annul, find_dead_or_set_registers, mark_target_live_regs): Likewise. * rtl.h (RTX_PREV): Likewise. * rtlanal.c (global_reg_mentioned_p, no_labels_between_p, no_jumps_between_p, reg_used_between_p, reg_referenced_between_p, reg_set_p, find_last_value, dead_or_set_regno_p, find_reg_fusage, find_regno_fusage, pure_call_p, replace_label, rtx_referenced_p_1, tablejump_p, computed_jump_p, insns_safe_to_move_p, find_first_parameter_load, can_hoist_insn_p): Likewise. * sched-deps.c (get_condition, add_dependence, sched_analyze_2, sched_analyze_insn, sched_analyze, add_forward_dependence): Likewise. * sched-ebb.c (fix_basic_block_boundaries, add_deps_for_risky_insns, schedule_ebbs): Likewise. * sched-rgn.c (is_cfg_nonregular, find_conditional_protection, is_conditionally_protected, can_schedule_ready_p, add_branch_dependences, debug_dependencies): Likewise. * stmt.c (emit_nop, expand_start_case, emit_jump_if_reachable): Likewise. * unroll.c (unroll_loop, copy_loop_body, back_branch_in_range_p, reg_dead_after_loop, loop_find_equiv_value, loop_iterations, set_dominates_use, ujump_to_loop_cont): Likewise. * var-tracking.c (prologue_stack_adjust, vt_initialize): Likewise. * varasm.c (output_constant_pool_1): Likewise. From-SVN: r84341
870 lines
27 KiB
C
870 lines
27 KiB
C
/* Save and restore call-clobbered registers which are live across a call.
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Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998,
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1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 2, or (at your option) any later
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version.
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING. If not, write to the Free
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Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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02111-1307, USA. */
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#include "config.h"
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#include "system.h"
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#include "coretypes.h"
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#include "tm.h"
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#include "rtl.h"
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#include "insn-config.h"
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#include "flags.h"
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#include "regs.h"
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#include "hard-reg-set.h"
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#include "recog.h"
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#include "basic-block.h"
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#include "reload.h"
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#include "function.h"
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#include "expr.h"
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#include "toplev.h"
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#include "tm_p.h"
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#ifndef MAX_MOVE_MAX
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#define MAX_MOVE_MAX MOVE_MAX
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#endif
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#ifndef MIN_UNITS_PER_WORD
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#define MIN_UNITS_PER_WORD UNITS_PER_WORD
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#endif
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#define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
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/* Modes for each hard register that we can save. The smallest mode is wide
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enough to save the entire contents of the register. When saving the
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register because it is live we first try to save in multi-register modes.
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If that is not possible the save is done one register at a time. */
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static enum machine_mode
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regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
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/* For each hard register, a place on the stack where it can be saved,
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if needed. */
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static rtx
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regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
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/* We will only make a register eligible for caller-save if it can be
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saved in its widest mode with a simple SET insn as long as the memory
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address is valid. We record the INSN_CODE is those insns here since
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when we emit them, the addresses might not be valid, so they might not
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be recognized. */
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static int
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reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
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static int
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reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
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/* Set of hard regs currently residing in save area (during insn scan). */
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static HARD_REG_SET hard_regs_saved;
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/* Number of registers currently in hard_regs_saved. */
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static int n_regs_saved;
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/* Computed by mark_referenced_regs, all regs referenced in a given
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insn. */
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static HARD_REG_SET referenced_regs;
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/* Computed in mark_set_regs, holds all registers set by the current
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instruction. */
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static HARD_REG_SET this_insn_sets;
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static void mark_set_regs (rtx, rtx, void *);
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static void mark_referenced_regs (rtx);
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static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *,
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enum machine_mode *);
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static int insert_restore (struct insn_chain *, int, int, int,
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enum machine_mode *);
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static struct insn_chain *insert_one_insn (struct insn_chain *, int, int,
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rtx);
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static void add_stored_regs (rtx, rtx, void *);
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/* Initialize for caller-save.
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Look at all the hard registers that are used by a call and for which
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regclass.c has not already excluded from being used across a call.
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Ensure that we can find a mode to save the register and that there is a
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simple insn to save and restore the register. This latter check avoids
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problems that would occur if we tried to save the MQ register of some
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machines directly into memory. */
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void
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init_caller_save (void)
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{
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rtx addr_reg;
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int offset;
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rtx address;
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int i, j;
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enum machine_mode mode;
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rtx savepat, restpat;
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rtx test_reg, test_mem;
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rtx saveinsn, restinsn;
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/* First find all the registers that we need to deal with and all
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the modes that they can have. If we can't find a mode to use,
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we can't have the register live over calls. */
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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{
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if (call_used_regs[i] && ! call_fixed_regs[i])
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{
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for (j = 1; j <= MOVE_MAX_WORDS; j++)
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{
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regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
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VOIDmode);
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if (regno_save_mode[i][j] == VOIDmode && j == 1)
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{
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call_fixed_regs[i] = 1;
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SET_HARD_REG_BIT (call_fixed_reg_set, i);
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}
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}
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}
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else
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regno_save_mode[i][1] = VOIDmode;
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}
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/* The following code tries to approximate the conditions under which
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we can easily save and restore a register without scratch registers or
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other complexities. It will usually work, except under conditions where
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the validity of an insn operand is dependent on the address offset.
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No such cases are currently known.
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We first find a typical offset from some BASE_REG_CLASS register.
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This address is chosen by finding the first register in the class
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and by finding the smallest power of two that is a valid offset from
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that register in every mode we will use to save registers. */
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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if (TEST_HARD_REG_BIT
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(reg_class_contents
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[(int) MODE_BASE_REG_CLASS (regno_save_mode [i][1])], i))
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break;
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if (i == FIRST_PSEUDO_REGISTER)
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abort ();
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addr_reg = gen_rtx_REG (Pmode, i);
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for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
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{
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address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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if (regno_save_mode[i][1] != VOIDmode
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&& ! strict_memory_address_p (regno_save_mode[i][1], address))
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break;
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if (i == FIRST_PSEUDO_REGISTER)
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break;
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}
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/* If we didn't find a valid address, we must use register indirect. */
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if (offset == 0)
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address = addr_reg;
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/* Next we try to form an insn to save and restore the register. We
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see if such an insn is recognized and meets its constraints.
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To avoid lots of unnecessary RTL allocation, we construct all the RTL
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once, then modify the memory and register operands in-place. */
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test_reg = gen_rtx_REG (VOIDmode, 0);
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test_mem = gen_rtx_MEM (VOIDmode, address);
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savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg);
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restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem);
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saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, savepat, -1, 0, 0);
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restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, restpat, -1, 0, 0);
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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for (mode = 0 ; mode < MAX_MACHINE_MODE; mode++)
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if (HARD_REGNO_MODE_OK (i, mode))
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{
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int ok;
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/* Update the register number and modes of the register
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and memory operand. */
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REGNO (test_reg) = i;
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PUT_MODE (test_reg, mode);
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PUT_MODE (test_mem, mode);
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/* Force re-recognition of the modified insns. */
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INSN_CODE (saveinsn) = -1;
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INSN_CODE (restinsn) = -1;
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reg_save_code[i][mode] = recog_memoized (saveinsn);
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reg_restore_code[i][mode] = recog_memoized (restinsn);
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/* Now extract both insns and see if we can meet their
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constraints. */
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ok = (reg_save_code[i][mode] != -1
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&& reg_restore_code[i][mode] != -1);
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if (ok)
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{
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extract_insn (saveinsn);
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ok = constrain_operands (1);
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extract_insn (restinsn);
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ok &= constrain_operands (1);
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}
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if (! ok)
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{
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reg_save_code[i][mode] = -1;
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reg_restore_code[i][mode] = -1;
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}
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}
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else
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{
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reg_save_code[i][mode] = -1;
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reg_restore_code[i][mode] = -1;
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}
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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for (j = 1; j <= MOVE_MAX_WORDS; j++)
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if (reg_save_code [i][regno_save_mode[i][j]] == -1)
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{
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regno_save_mode[i][j] = VOIDmode;
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if (j == 1)
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{
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call_fixed_regs[i] = 1;
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SET_HARD_REG_BIT (call_fixed_reg_set, i);
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}
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}
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}
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/* Initialize save areas by showing that we haven't allocated any yet. */
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void
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init_save_areas (void)
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{
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int i, j;
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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for (j = 1; j <= MOVE_MAX_WORDS; j++)
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regno_save_mem[i][j] = 0;
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}
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/* Allocate save areas for any hard registers that might need saving.
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We take a conservative approach here and look for call-clobbered hard
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registers that are assigned to pseudos that cross calls. This may
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overestimate slightly (especially if some of these registers are later
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used as spill registers), but it should not be significant.
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Future work:
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In the fallback case we should iterate backwards across all possible
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modes for the save, choosing the largest available one instead of
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falling back to the smallest mode immediately. (eg TF -> DF -> SF).
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We do not try to use "move multiple" instructions that exist
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on some machines (such as the 68k moveml). It could be a win to try
|
||
and use them when possible. The hard part is doing it in a way that is
|
||
machine independent since they might be saving non-consecutive
|
||
registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
|
||
|
||
void
|
||
setup_save_areas (void)
|
||
{
|
||
int i, j, k;
|
||
unsigned int r;
|
||
HARD_REG_SET hard_regs_used;
|
||
|
||
/* Allocate space in the save area for the largest multi-register
|
||
pseudos first, then work backwards to single register
|
||
pseudos. */
|
||
|
||
/* Find and record all call-used hard-registers in this function. */
|
||
CLEAR_HARD_REG_SET (hard_regs_used);
|
||
for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
|
||
if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
|
||
{
|
||
unsigned int regno = reg_renumber[i];
|
||
unsigned int endregno
|
||
= regno + hard_regno_nregs[regno][GET_MODE (regno_reg_rtx[i])];
|
||
|
||
for (r = regno; r < endregno; r++)
|
||
if (call_used_regs[r])
|
||
SET_HARD_REG_BIT (hard_regs_used, r);
|
||
}
|
||
|
||
/* Now run through all the call-used hard-registers and allocate
|
||
space for them in the caller-save area. Try to allocate space
|
||
in a manner which allows multi-register saves/restores to be done. */
|
||
|
||
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
||
for (j = MOVE_MAX_WORDS; j > 0; j--)
|
||
{
|
||
int do_save = 1;
|
||
|
||
/* If no mode exists for this size, try another. Also break out
|
||
if we have already saved this hard register. */
|
||
if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
|
||
continue;
|
||
|
||
/* See if any register in this group has been saved. */
|
||
for (k = 0; k < j; k++)
|
||
if (regno_save_mem[i + k][1])
|
||
{
|
||
do_save = 0;
|
||
break;
|
||
}
|
||
if (! do_save)
|
||
continue;
|
||
|
||
for (k = 0; k < j; k++)
|
||
if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
|
||
{
|
||
do_save = 0;
|
||
break;
|
||
}
|
||
if (! do_save)
|
||
continue;
|
||
|
||
/* We have found an acceptable mode to store in. */
|
||
regno_save_mem[i][j]
|
||
= assign_stack_local (regno_save_mode[i][j],
|
||
GET_MODE_SIZE (regno_save_mode[i][j]), 0);
|
||
|
||
/* Setup single word save area just in case... */
|
||
for (k = 0; k < j; k++)
|
||
/* This should not depend on WORDS_BIG_ENDIAN.
|
||
The order of words in regs is the same as in memory. */
|
||
regno_save_mem[i + k][1]
|
||
= adjust_address_nv (regno_save_mem[i][j],
|
||
regno_save_mode[i + k][1],
|
||
k * UNITS_PER_WORD);
|
||
}
|
||
|
||
/* Now loop again and set the alias set of any save areas we made to
|
||
the alias set used to represent frame objects. */
|
||
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
||
for (j = MOVE_MAX_WORDS; j > 0; j--)
|
||
if (regno_save_mem[i][j] != 0)
|
||
set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
|
||
}
|
||
|
||
/* Find the places where hard regs are live across calls and save them. */
|
||
|
||
void
|
||
save_call_clobbered_regs (void)
|
||
{
|
||
struct insn_chain *chain, *next;
|
||
enum machine_mode save_mode [FIRST_PSEUDO_REGISTER];
|
||
|
||
CLEAR_HARD_REG_SET (hard_regs_saved);
|
||
n_regs_saved = 0;
|
||
|
||
for (chain = reload_insn_chain; chain != 0; chain = next)
|
||
{
|
||
rtx insn = chain->insn;
|
||
enum rtx_code code = GET_CODE (insn);
|
||
|
||
next = chain->next;
|
||
|
||
if (chain->is_caller_save_insn)
|
||
abort ();
|
||
|
||
if (INSN_P (insn))
|
||
{
|
||
/* If some registers have been saved, see if INSN references
|
||
any of them. We must restore them before the insn if so. */
|
||
|
||
if (n_regs_saved)
|
||
{
|
||
int regno;
|
||
|
||
if (code == JUMP_INSN)
|
||
/* Restore all registers if this is a JUMP_INSN. */
|
||
COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
|
||
else
|
||
{
|
||
CLEAR_HARD_REG_SET (referenced_regs);
|
||
mark_referenced_regs (PATTERN (insn));
|
||
AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
|
||
}
|
||
|
||
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
|
||
if (TEST_HARD_REG_BIT (referenced_regs, regno))
|
||
regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS, save_mode);
|
||
}
|
||
|
||
if (code == CALL_INSN && ! find_reg_note (insn, REG_NORETURN, NULL))
|
||
{
|
||
int regno;
|
||
HARD_REG_SET hard_regs_to_save;
|
||
|
||
/* Use the register life information in CHAIN to compute which
|
||
regs are live during the call. */
|
||
REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
|
||
&chain->live_throughout);
|
||
/* Save hard registers always in the widest mode available. */
|
||
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
|
||
if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
|
||
save_mode [regno] = regno_save_mode [regno][1];
|
||
else
|
||
save_mode [regno] = VOIDmode;
|
||
|
||
/* Look through all live pseudos, mark their hard registers
|
||
and choose proper mode for saving. */
|
||
EXECUTE_IF_SET_IN_REG_SET
|
||
(&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno,
|
||
{
|
||
int r = reg_renumber[regno];
|
||
int nregs;
|
||
|
||
if (r >= 0)
|
||
{
|
||
enum machine_mode mode;
|
||
|
||
nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
|
||
mode = HARD_REGNO_CALLER_SAVE_MODE
|
||
(r, nregs, PSEUDO_REGNO_MODE (regno));
|
||
if (GET_MODE_BITSIZE (mode)
|
||
> GET_MODE_BITSIZE (save_mode[r]))
|
||
save_mode[r] = mode;
|
||
while (nregs-- > 0)
|
||
SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
|
||
}
|
||
else
|
||
abort ();
|
||
});
|
||
|
||
/* Record all registers set in this call insn. These don't need
|
||
to be saved. N.B. the call insn might set a subreg of a
|
||
multi-hard-reg pseudo; then the pseudo is considered live
|
||
during the call, but the subreg that is set isn't. */
|
||
CLEAR_HARD_REG_SET (this_insn_sets);
|
||
note_stores (PATTERN (insn), mark_set_regs, NULL);
|
||
|
||
/* Compute which hard regs must be saved before this call. */
|
||
AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
|
||
AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
|
||
AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
|
||
AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set);
|
||
|
||
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
|
||
if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
|
||
regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode);
|
||
|
||
/* Must recompute n_regs_saved. */
|
||
n_regs_saved = 0;
|
||
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
|
||
if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
|
||
n_regs_saved++;
|
||
}
|
||
}
|
||
|
||
if (chain->next == 0 || chain->next->block > chain->block)
|
||
{
|
||
int regno;
|
||
/* At the end of the basic block, we must restore any registers that
|
||
remain saved. If the last insn in the block is a JUMP_INSN, put
|
||
the restore before the insn, otherwise, put it after the insn. */
|
||
|
||
if (n_regs_saved)
|
||
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
|
||
if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
|
||
regno += insert_restore (chain, JUMP_P (insn),
|
||
regno, MOVE_MAX_WORDS, save_mode);
|
||
}
|
||
}
|
||
}
|
||
|
||
/* Here from note_stores when an insn stores a value in a register.
|
||
Set the proper bit or bits in this_insn_sets. All pseudos that have
|
||
been assigned hard regs have had their register number changed already,
|
||
so we can ignore pseudos. */
|
||
static void
|
||
mark_set_regs (rtx reg, rtx setter ATTRIBUTE_UNUSED,
|
||
void *data ATTRIBUTE_UNUSED)
|
||
{
|
||
int regno, endregno, i;
|
||
enum machine_mode mode = GET_MODE (reg);
|
||
|
||
if (GET_CODE (reg) == SUBREG)
|
||
{
|
||
rtx inner = SUBREG_REG (reg);
|
||
if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
|
||
return;
|
||
|
||
regno = subreg_hard_regno (reg, 1);
|
||
}
|
||
else if (REG_P (reg)
|
||
&& REGNO (reg) < FIRST_PSEUDO_REGISTER)
|
||
regno = REGNO (reg);
|
||
else
|
||
return;
|
||
|
||
endregno = regno + hard_regno_nregs[regno][mode];
|
||
|
||
for (i = regno; i < endregno; i++)
|
||
SET_HARD_REG_BIT (this_insn_sets, i);
|
||
}
|
||
|
||
/* Here from note_stores when an insn stores a value in a register.
|
||
Set the proper bit or bits in the passed regset. All pseudos that have
|
||
been assigned hard regs have had their register number changed already,
|
||
so we can ignore pseudos. */
|
||
static void
|
||
add_stored_regs (rtx reg, rtx setter, void *data)
|
||
{
|
||
int regno, endregno, i;
|
||
enum machine_mode mode = GET_MODE (reg);
|
||
int offset = 0;
|
||
|
||
if (GET_CODE (setter) == CLOBBER)
|
||
return;
|
||
|
||
if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
|
||
{
|
||
offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
|
||
GET_MODE (SUBREG_REG (reg)),
|
||
SUBREG_BYTE (reg),
|
||
GET_MODE (reg));
|
||
reg = SUBREG_REG (reg);
|
||
}
|
||
|
||
if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
|
||
return;
|
||
|
||
regno = REGNO (reg) + offset;
|
||
endregno = regno + hard_regno_nregs[regno][mode];
|
||
|
||
for (i = regno; i < endregno; i++)
|
||
SET_REGNO_REG_SET ((regset) data, i);
|
||
}
|
||
|
||
/* Walk X and record all referenced registers in REFERENCED_REGS. */
|
||
static void
|
||
mark_referenced_regs (rtx x)
|
||
{
|
||
enum rtx_code code = GET_CODE (x);
|
||
const char *fmt;
|
||
int i, j;
|
||
|
||
if (code == SET)
|
||
mark_referenced_regs (SET_SRC (x));
|
||
if (code == SET || code == CLOBBER)
|
||
{
|
||
x = SET_DEST (x);
|
||
code = GET_CODE (x);
|
||
if ((code == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
|
||
|| code == PC || code == CC0
|
||
|| (code == SUBREG && REG_P (SUBREG_REG (x))
|
||
&& REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER
|
||
/* If we're setting only part of a multi-word register,
|
||
we shall mark it as referenced, because the words
|
||
that are not being set should be restored. */
|
||
&& ((GET_MODE_SIZE (GET_MODE (x))
|
||
>= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
|
||
|| (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
|
||
<= UNITS_PER_WORD))))
|
||
return;
|
||
}
|
||
if (code == MEM || code == SUBREG)
|
||
{
|
||
x = XEXP (x, 0);
|
||
code = GET_CODE (x);
|
||
}
|
||
|
||
if (code == REG)
|
||
{
|
||
int regno = REGNO (x);
|
||
int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
|
||
: reg_renumber[regno]);
|
||
|
||
if (hardregno >= 0)
|
||
{
|
||
int nregs = hard_regno_nregs[hardregno][GET_MODE (x)];
|
||
while (nregs-- > 0)
|
||
SET_HARD_REG_BIT (referenced_regs, hardregno + nregs);
|
||
}
|
||
/* If this is a pseudo that did not get a hard register, scan its
|
||
memory location, since it might involve the use of another
|
||
register, which might be saved. */
|
||
else if (reg_equiv_mem[regno] != 0)
|
||
mark_referenced_regs (XEXP (reg_equiv_mem[regno], 0));
|
||
else if (reg_equiv_address[regno] != 0)
|
||
mark_referenced_regs (reg_equiv_address[regno]);
|
||
return;
|
||
}
|
||
|
||
fmt = GET_RTX_FORMAT (code);
|
||
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
|
||
{
|
||
if (fmt[i] == 'e')
|
||
mark_referenced_regs (XEXP (x, i));
|
||
else if (fmt[i] == 'E')
|
||
for (j = XVECLEN (x, i) - 1; j >= 0; j--)
|
||
mark_referenced_regs (XVECEXP (x, i, j));
|
||
}
|
||
}
|
||
|
||
/* Insert a sequence of insns to restore. Place these insns in front of
|
||
CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
|
||
the maximum number of registers which should be restored during this call.
|
||
It should never be less than 1 since we only work with entire registers.
|
||
|
||
Note that we have verified in init_caller_save that we can do this
|
||
with a simple SET, so use it. Set INSN_CODE to what we save there
|
||
since the address might not be valid so the insn might not be recognized.
|
||
These insns will be reloaded and have register elimination done by
|
||
find_reload, so we need not worry about that here.
|
||
|
||
Return the extra number of registers saved. */
|
||
|
||
static int
|
||
insert_restore (struct insn_chain *chain, int before_p, int regno,
|
||
int maxrestore, enum machine_mode *save_mode)
|
||
{
|
||
int i, k;
|
||
rtx pat = NULL_RTX;
|
||
int code;
|
||
unsigned int numregs = 0;
|
||
struct insn_chain *new;
|
||
rtx mem;
|
||
|
||
/* A common failure mode if register status is not correct in the RTL
|
||
is for this routine to be called with a REGNO we didn't expect to
|
||
save. That will cause us to write an insn with a (nil) SET_DEST
|
||
or SET_SRC. Instead of doing so and causing a crash later, check
|
||
for this common case and abort here instead. This will remove one
|
||
step in debugging such problems. */
|
||
|
||
if (regno_save_mem[regno][1] == 0)
|
||
abort ();
|
||
|
||
/* Get the pattern to emit and update our status.
|
||
|
||
See if we can restore `maxrestore' registers at once. Work
|
||
backwards to the single register case. */
|
||
for (i = maxrestore; i > 0; i--)
|
||
{
|
||
int j;
|
||
int ok = 1;
|
||
|
||
if (regno_save_mem[regno][i] == 0)
|
||
continue;
|
||
|
||
for (j = 0; j < i; j++)
|
||
if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
|
||
{
|
||
ok = 0;
|
||
break;
|
||
}
|
||
/* Must do this one restore at a time. */
|
||
if (! ok)
|
||
continue;
|
||
|
||
numregs = i;
|
||
break;
|
||
}
|
||
|
||
mem = regno_save_mem [regno][numregs];
|
||
if (save_mode [regno] != VOIDmode
|
||
&& save_mode [regno] != GET_MODE (mem)
|
||
&& numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]])
|
||
mem = adjust_address (mem, save_mode[regno], 0);
|
||
else
|
||
mem = copy_rtx (mem);
|
||
pat = gen_rtx_SET (VOIDmode,
|
||
gen_rtx_REG (GET_MODE (mem),
|
||
regno), mem);
|
||
code = reg_restore_code[regno][GET_MODE (mem)];
|
||
new = insert_one_insn (chain, before_p, code, pat);
|
||
|
||
/* Clear status for all registers we restored. */
|
||
for (k = 0; k < i; k++)
|
||
{
|
||
CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
|
||
SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
|
||
n_regs_saved--;
|
||
}
|
||
|
||
/* Tell our callers how many extra registers we saved/restored. */
|
||
return numregs - 1;
|
||
}
|
||
|
||
/* Like insert_restore above, but save registers instead. */
|
||
|
||
static int
|
||
insert_save (struct insn_chain *chain, int before_p, int regno,
|
||
HARD_REG_SET (*to_save), enum machine_mode *save_mode)
|
||
{
|
||
int i;
|
||
unsigned int k;
|
||
rtx pat = NULL_RTX;
|
||
int code;
|
||
unsigned int numregs = 0;
|
||
struct insn_chain *new;
|
||
rtx mem;
|
||
|
||
/* A common failure mode if register status is not correct in the RTL
|
||
is for this routine to be called with a REGNO we didn't expect to
|
||
save. That will cause us to write an insn with a (nil) SET_DEST
|
||
or SET_SRC. Instead of doing so and causing a crash later, check
|
||
for this common case and abort here instead. This will remove one
|
||
step in debugging such problems. */
|
||
|
||
if (regno_save_mem[regno][1] == 0)
|
||
abort ();
|
||
|
||
/* Get the pattern to emit and update our status.
|
||
|
||
See if we can save several registers with a single instruction.
|
||
Work backwards to the single register case. */
|
||
for (i = MOVE_MAX_WORDS; i > 0; i--)
|
||
{
|
||
int j;
|
||
int ok = 1;
|
||
if (regno_save_mem[regno][i] == 0)
|
||
continue;
|
||
|
||
for (j = 0; j < i; j++)
|
||
if (! TEST_HARD_REG_BIT (*to_save, regno + j))
|
||
{
|
||
ok = 0;
|
||
break;
|
||
}
|
||
/* Must do this one save at a time. */
|
||
if (! ok)
|
||
continue;
|
||
|
||
numregs = i;
|
||
break;
|
||
}
|
||
|
||
mem = regno_save_mem [regno][numregs];
|
||
if (save_mode [regno] != VOIDmode
|
||
&& save_mode [regno] != GET_MODE (mem)
|
||
&& numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]])
|
||
mem = adjust_address (mem, save_mode[regno], 0);
|
||
else
|
||
mem = copy_rtx (mem);
|
||
pat = gen_rtx_SET (VOIDmode, mem,
|
||
gen_rtx_REG (GET_MODE (mem),
|
||
regno));
|
||
code = reg_save_code[regno][GET_MODE (mem)];
|
||
new = insert_one_insn (chain, before_p, code, pat);
|
||
|
||
/* Set hard_regs_saved and dead_or_set for all the registers we saved. */
|
||
for (k = 0; k < numregs; k++)
|
||
{
|
||
SET_HARD_REG_BIT (hard_regs_saved, regno + k);
|
||
SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
|
||
n_regs_saved++;
|
||
}
|
||
|
||
/* Tell our callers how many extra registers we saved/restored. */
|
||
return numregs - 1;
|
||
}
|
||
|
||
/* Emit a new caller-save insn and set the code. */
|
||
static struct insn_chain *
|
||
insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
|
||
{
|
||
rtx insn = chain->insn;
|
||
struct insn_chain *new;
|
||
|
||
#ifdef HAVE_cc0
|
||
/* If INSN references CC0, put our insns in front of the insn that sets
|
||
CC0. This is always safe, since the only way we could be passed an
|
||
insn that references CC0 is for a restore, and doing a restore earlier
|
||
isn't a problem. We do, however, assume here that CALL_INSNs don't
|
||
reference CC0. Guard against non-INSN's like CODE_LABEL. */
|
||
|
||
if ((NONJUMP_INSN_P (insn) || JUMP_P (insn))
|
||
&& before_p
|
||
&& reg_referenced_p (cc0_rtx, PATTERN (insn)))
|
||
chain = chain->prev, insn = chain->insn;
|
||
#endif
|
||
|
||
new = new_insn_chain ();
|
||
if (before_p)
|
||
{
|
||
rtx link;
|
||
|
||
new->prev = chain->prev;
|
||
if (new->prev != 0)
|
||
new->prev->next = new;
|
||
else
|
||
reload_insn_chain = new;
|
||
|
||
chain->prev = new;
|
||
new->next = chain;
|
||
new->insn = emit_insn_before (pat, insn);
|
||
/* ??? It would be nice if we could exclude the already / still saved
|
||
registers from the live sets. */
|
||
COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
|
||
/* Registers that die in CHAIN->INSN still live in the new insn. */
|
||
for (link = REG_NOTES (chain->insn); link; link = XEXP (link, 1))
|
||
{
|
||
if (REG_NOTE_KIND (link) == REG_DEAD)
|
||
{
|
||
rtx reg = XEXP (link, 0);
|
||
int regno, i;
|
||
|
||
if (!REG_P (reg))
|
||
abort ();
|
||
|
||
regno = REGNO (reg);
|
||
if (regno >= FIRST_PSEUDO_REGISTER)
|
||
regno = reg_renumber[regno];
|
||
if (regno < 0)
|
||
continue;
|
||
for (i = hard_regno_nregs[regno][GET_MODE (reg)] - 1;
|
||
i >= 0; i--)
|
||
SET_REGNO_REG_SET (&new->live_throughout, regno + i);
|
||
}
|
||
}
|
||
CLEAR_REG_SET (&new->dead_or_set);
|
||
if (chain->insn == BB_HEAD (BASIC_BLOCK (chain->block)))
|
||
BB_HEAD (BASIC_BLOCK (chain->block)) = new->insn;
|
||
}
|
||
else
|
||
{
|
||
new->next = chain->next;
|
||
if (new->next != 0)
|
||
new->next->prev = new;
|
||
chain->next = new;
|
||
new->prev = chain;
|
||
new->insn = emit_insn_after (pat, insn);
|
||
/* ??? It would be nice if we could exclude the already / still saved
|
||
registers from the live sets, and observe REG_UNUSED notes. */
|
||
COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
|
||
/* Registers that are set in CHAIN->INSN live in the new insn.
|
||
(Unless there is a REG_UNUSED note for them, but we don't
|
||
look for them here.) */
|
||
note_stores (PATTERN (chain->insn), add_stored_regs,
|
||
&new->live_throughout);
|
||
CLEAR_REG_SET (&new->dead_or_set);
|
||
if (chain->insn == BB_END (BASIC_BLOCK (chain->block)))
|
||
BB_END (BASIC_BLOCK (chain->block)) = new->insn;
|
||
}
|
||
new->block = chain->block;
|
||
new->is_caller_save_insn = 1;
|
||
|
||
INSN_CODE (new->insn) = code;
|
||
return new;
|
||
}
|