7d8bdfa7e4
aarch64_add_offset contains code to decompose all SVE VL-based constants into native operations. The worst-case fallback is to load the number of SVE elements into a register and use a general multiplication. This patch improves that fallback by reusing expand_mult if can_create_pseudo_p, rather than emitting a MULT pattern directly. In order to increase the chances of being able to use a simple add-and-shift, the patch also tries to compute VG * the lowest set bit of the multiplier, rather than always using CNTD as the basis for the multiplication path. This is tested by the ACLE patches but is really an independent improvement. 2019-08-15 Richard Sandiford <richard.sandiford@arm.com> gcc/ * config/aarch64/aarch64.c (aarch64_add_offset): In the fallback multiplication case, try to compute VG * (lowest set bit) directly rather than always basing the multiplication on VG. Use expand_mult for the multiplication if we can. gcc/testsuite/ * gcc.target/aarch64/sve/loop_add_4.c: Expect 10 INCWs and INCDs rather than 8. From-SVN: r274519 |
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