5624e564d2
From-SVN: r219188
104 lines
3.2 KiB
ArmAsm
104 lines
3.2 KiB
ArmAsm
###################################-
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#
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# Copyright (C) 2009-2015 Free Software Foundation, Inc.
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#
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# Contributed by Michael Eager <eager@eagercon.com>.
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#
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# This file is free software; you can redistribute it and/or modify it
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# under the terms of the GNU General Public License as published by the
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# Free Software Foundation; either version 3, or (at your option) any
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# later version.
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#
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# GCC is distributed in the hope that it will be useful, but WITHOUT
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# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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# License for more details.
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#
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# Under Section 7 of GPL version 3, you are granted additional
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# permissions described in the GCC Runtime Library Exception, version
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# 3.1, as published by the Free Software Foundation.
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#
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# You should have received a copy of the GNU General Public License and
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# a copy of the GCC Runtime Library Exception along with this program;
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# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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# <http://www.gnu.org/licenses/>.
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#
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# udivsi3.S
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#
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# Unsigned divide operation.
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# Input : Divisor in Reg r5
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# Dividend in Reg r6
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# Output: Result in Reg r3
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#
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#######################################
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.globl __udivsi3
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.ent __udivsi3
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.type __udivsi3,@function
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__udivsi3:
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.frame r1,0,r15
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ADDIK r1,r1,-12
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SWI r29,r1,0
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SWI r30,r1,4
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SWI r31,r1,8
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BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
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BEQID r5,$LaResult_Is_Zero # Result is Zero
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ADDIK r30,r0,0 # Clear mod
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ADDIK r29,r0,32 # Initialize the loop count
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# Check if r6 and r5 are equal # if yes, return 1
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RSUB r18,r5,r6
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BEQID r18,$LaRETURN_HERE
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ADDIK r3,r0,1
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# Check if (uns)r6 is greater than (uns)r5. In that case, just return 0
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XOR r18,r5,r6
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BGEID r18,16
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ADD r3,r0,r0 # We would anyways clear r3
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BLTI r6,$LaRETURN_HERE # r6[bit 31 = 1] hence is greater
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BRI $LCheckr6
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RSUB r18,r6,r5 # MICROBLAZEcmp
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BLTI r18,$LaRETURN_HERE
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# If r6 [bit 31] is set, then return result as 1
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$LCheckr6:
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BGTI r6,$LaDIV0
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BRID $LaRETURN_HERE
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ADDIK r3,r0,1
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# First part try to find the first '1' in the r5
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$LaDIV0:
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BLTI r5,$LaDIV2
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$LaDIV1:
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ADD r5,r5,r5 # left shift logical r5
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BGTID r5,$LaDIV1
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ADDIK r29,r29,-1
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$LaDIV2:
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ADD r5,r5,r5 # left shift logical r5 get the '1' into the Carry
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ADDC r30,r30,r30 # Move that bit into the Mod register
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RSUB r31,r6,r30 # Try to subtract (r30 a r6)
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BLTI r31,$LaMOD_TOO_SMALL
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OR r30,r0,r31 # Move the r31 to mod since the result was positive
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ADDIK r3,r3,1
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$LaMOD_TOO_SMALL:
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ADDIK r29,r29,-1
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BEQi r29,$LaLOOP_END
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ADD r3,r3,r3 # Shift in the '1' into div
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BRI $LaDIV2 # Div2
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$LaLOOP_END:
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BRI $LaRETURN_HERE
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$LaDiv_By_Zero:
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$LaResult_Is_Zero:
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OR r3,r0,r0 # set result to 0
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$LaRETURN_HERE:
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# Restore values of CSRs and that of r3 and the divisor and the dividend
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LWI r29,r1,0
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LWI r30,r1,4
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LWI r31,r1,8
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RTSD r15,8
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ADDIK r1,r1,12
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.end __udivsi3
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.size __udivsi3, . - __udivsi3
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