7d67c380fa
libgcc/ * config/rs6000/aix-unwind.h (*_REGNO): New, set of useful register numbers. LR_REGNO replaces R_LR. (ucontext_for): New, helper for ... (ppc_aix_fallback_frame_state): New, implementation for aix 5.2 and 5.3 of ... (MD_FALLBACK_FRAME_STATE_FOR): Define for 32bit configurations. testsuite/ * g++.dg/eh/sighandle.C: New testcase. From-SVN: r187540
256 lines
7.3 KiB
C
256 lines
7.3 KiB
C
/* DWARF2 EH unwinding support for AIX.
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Copyright (C) 2011 Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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/* Useful register numbers. */
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#define LR_REGNO 65
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#define CR2_REGNO 70
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#define XER_REGNO 76
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#define FIRST_ALTIVEC_REGNO 77
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#define VRSAVE_REGNO 109
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#define VSCR_REGNO 110
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/* If the current unwind info (FS) does not contain explicit info
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saving R2, then we have to do a minor amount of code reading to
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figure out if it was saved. The big problem here is that the
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code that does the save/restore is generated by the linker, so
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we have no good way to determine at compile time what to do. */
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#ifdef __64BIT__
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#define MD_FROB_UPDATE_CONTEXT(CTX, FS) \
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do { \
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if ((FS)->regs.reg[2].how == REG_UNSAVED) \
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{ \
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unsigned int *insn \
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= (unsigned int *) \
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_Unwind_GetGR ((CTX), LR_REGNO); \
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if (*insn == 0xE8410028) \
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_Unwind_SetGRPtr ((CTX), 2, (CTX)->cfa + 40); \
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} \
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} while (0)
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#else
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#define MD_FROB_UPDATE_CONTEXT(CTX, FS) \
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do { \
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if ((FS)->regs.reg[2].how == REG_UNSAVED) \
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{ \
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unsigned int *insn \
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= (unsigned int *) \
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_Unwind_GetGR ((CTX), LR_REGNO); \
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if (*insn == 0x80410014) \
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_Unwind_SetGRPtr ((CTX), 2, (CTX)->cfa + 20); \
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} \
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} while (0)
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#endif
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/* Now on to MD_FALLBACK_FRAME_STATE_FOR.
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32bit AIX 5.2 and 5.3 only at this stage. */
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#include <stdlib.h>
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#include <stddef.h>
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#include <signal.h>
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#include <sys/machine.h>
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#ifdef __64BIT__
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/* 64bit fallback not implemented yet, so MD_FALLBACK_FRAME_STATE_FOR not
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defined. Arrange just for the code below to compile. */
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typedef struct __context64 mstate_t;
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#else
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typedef struct mstsave mstate_t;
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#define MD_FALLBACK_FRAME_STATE_FOR ppc_aix_fallback_frame_state
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#endif
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/* If we are compiling on AIX < 5.3, the VMX related datastructs are not
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defined and we take measures to obtain proper runtime behavior if the
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compiled code happens to run on a later version with VMX enabled. */
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#ifndef MSR_VMX
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#define MSR_VMX 0x2000000
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#endif
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typedef unsigned int uint;
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typedef struct { uint v[4]; } vreg_t;
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typedef struct {
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vreg_t regs[32];
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uint pad1 [3];
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uint vscr;
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uint vrsave;
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uint pad2 [3];
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} vstate_t;
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#define EXT_CONTEXT_MARK 0x45435458
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#define EXT_CONTEXT_SIZE 4096
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#define BUMPER_SIZE (EXT_CONTEXT_SIZE - sizeof(vstate_t) - (5 * sizeof(int)))
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typedef struct {
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uint pad1 [4];
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vstate_t vstate;
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char bumper [BUMPER_SIZE];
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int mark;
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} extended_context_t;
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typedef struct {
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char bumper [offsetof (ucontext_t, uc_stack) + sizeof (stack_t)];
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extended_context_t * ectx;
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int mark;
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} vmx_ucontext_t;
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/* Determine whether CONTEXT designates a signal handler, and return the
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associated ucontext_t address if so. Return NULL otherwise. */
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static ucontext_t *
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ucontext_for (struct _Unwind_Context *context)
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{
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const unsigned int * ra = context->ra;
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/* AIX 5.2 and 5.3, threaded or not, share common patterns and feature
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variants depending on the configured kernel (unix_mp or unix_64). */
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if (*(ra - 5) == 0x4c00012c /* isync */
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&& *(ra - 4) == 0x80ec0000 /* lwz r7,0(r12) */
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&& *(ra - 3) == 0x804c0004 /* lwz r2,4(r12) */
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&& *(ra - 2) == 0x7ce903a6 /* mtctr r7 */
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&& *(ra - 1) == 0x4e800421 /* bctrl */
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&& *(ra - 0) == 0x7dc37378) /* mr r3,r14 <-- context->ra */
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{
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/* unix_64 */
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if (*(ra - 6) == 0x7d000164) /* mtmsrd r8 */
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{
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switch (*(ra + 18))
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{
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/* AIX 5.2 */
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case 0x835a0520: /* lwz r26,1312(r26) */
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return (ucontext_t *)(context->cfa + 0x70);
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/* AIX 5.3 */
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case 0x835a0570: /* lwz r26,1392(r26) */
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return (ucontext_t *)(context->cfa + 0x40);
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default:
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return 0;
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}
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}
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/* unix_mp */
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if (*(ra - 6) == 0x7d000124) /* mtmsr r8 */
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{
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typedef struct {
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char pad[56];
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ucontext_t ucontext;
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siginfo_t siginfo;
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} aix52_stack_t;
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aix52_stack_t * frame = (aix52_stack_t *) context->cfa;
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return &frame->ucontext;
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}
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}
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return 0;
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}
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/* The fallback proper. */
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#ifdef DWARF_ALT_FRAME_RETURN_COLUMN
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#define RETURN_COLUMN DWARF_ALT_FRAME_RETURN_COLUMN
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#else
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#define RETURN_COLUMN ARG_POINTER_REGNUM
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#endif
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#define REGISTER_CFA_OFFSET_FOR(FS,REGNO,ADDR,CFA)\
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do { \
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(FS)->regs.reg[REGNO].how = REG_SAVED_OFFSET; \
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(FS)->regs.reg[REGNO].loc.offset = (long) (ADDR) - (CFA); \
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} while (0);
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static _Unwind_Reason_Code
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ppc_aix_fallback_frame_state (struct _Unwind_Context *context,
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_Unwind_FrameState *fs)
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{
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ucontext_t * uctx = ucontext_for (context);
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mstate_t * mctx;
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long new_cfa;
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int i;
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if (uctx == NULL)
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return _URC_END_OF_STACK;
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mctx = &uctx->uc_mcontext.jmp_context;
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/* The "kernel" frame cfa is the stack pointer at the signal occurrence
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point. */
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new_cfa = mctx->gpr[STACK_POINTER_REGNUM];
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fs->regs.cfa_how = CFA_REG_OFFSET;
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fs->regs.cfa_reg = STACK_POINTER_REGNUM;
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fs->regs.cfa_offset = new_cfa - (long) context->cfa;
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/* And we state how to find the various registers it has saved with
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relative offset rules from there. */
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for (i = 0; i < 32; i++)
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if (i != STACK_POINTER_REGNUM)
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REGISTER_CFA_OFFSET_FOR (fs, i, &mctx->gpr[i], new_cfa);
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REGISTER_CFA_OFFSET_FOR (fs, CR2_REGNO, &mctx->cr, new_cfa);
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REGISTER_CFA_OFFSET_FOR (fs, XER_REGNO, &mctx->xer, new_cfa);
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REGISTER_CFA_OFFSET_FOR (fs, LR_REGNO, &mctx->lr, new_cfa);
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fs->retaddr_column = RETURN_COLUMN;
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REGISTER_CFA_OFFSET_FOR (fs, RETURN_COLUMN, &mctx->iar, new_cfa);
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fs->signal_frame = 1;
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/* Honor FP Ever Used ... */
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if (mctx->fpeu)
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{
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for (i = 0; i < 32; i++)
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REGISTER_CFA_OFFSET_FOR (fs, i+32, &mctx->fpr[i], new_cfa);
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}
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/* Honor VMX context, if any. We expect the msr bit never to be set in
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environments where there is no VMX support, e.g. on AIX < 5.3. */
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if (mctx->msr & MSR_VMX)
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{
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vmx_ucontext_t * uc = (vmx_ucontext_t *) uctx;
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if (uc->mark == EXT_CONTEXT_MARK && uc->ectx->mark == EXT_CONTEXT_MARK)
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{
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vstate_t * vstate = &uc->ectx->vstate;
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for (i = 0; i < 32; i++)
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REGISTER_CFA_OFFSET_FOR
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(fs, i+FIRST_ALTIVEC_REGNO, &vstate->regs[i], new_cfa);
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REGISTER_CFA_OFFSET_FOR (fs, VSCR_REGNO, &vstate->vscr, new_cfa);
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REGISTER_CFA_OFFSET_FOR (fs, VRSAVE_REGNO, &vstate->vrsave, new_cfa);
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}
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}
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return _URC_NO_REASON;
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}
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