e0ae13896e
2007-01-10 H.J. Lu <hongjiu.lu@intel.com> PR libgcj/30424 * sysdep/ia64/locks.h (read_barrier): New. (write_barrier): New. From-SVN: r120645
62 lines
1.4 KiB
C
62 lines
1.4 KiB
C
// locks.h - Thread synchronization primitives. IA64 implementation.
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/* Copyright (C) 2002 Free Software Foundation
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This file is part of libgcj.
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This software is copyrighted work licensed under the terms of the
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Libgcj License. Please consult the file "LIBGCJ_LICENSE" for
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details. */
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#ifndef __SYSDEP_LOCKS_H__
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#define __SYSDEP_LOCKS_H__
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#include <ia64intrin.h>
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typedef size_t obj_addr_t; /* Integer type big enough for object */
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/* address. */
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inline static bool
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compare_and_swap(volatile obj_addr_t *addr,
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obj_addr_t old,
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obj_addr_t new_val)
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{
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return __sync_bool_compare_and_swap (addr, old, new_val);
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}
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// The fact that *addr is volatile should cause the compiler to
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// automatically generate an st8.rel.
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inline static void
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release_set(volatile obj_addr_t *addr, obj_addr_t new_val)
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{
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__asm__ __volatile__("" : : : "memory");
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*(addr) = new_val;
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}
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inline static bool
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compare_and_swap_release(volatile obj_addr_t *addr,
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obj_addr_t old,
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obj_addr_t new_val)
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{
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register unsigned long ar_ccv __asm__("ar.ccv") = old;
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unsigned long out;
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__asm__ __volatile__("cmpxchg8.rel %0=%1,%2,%4"
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: "=r"(out), "=m"(*addr)
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: "r"(new_val), "m"(*addr), "d"(ar_ccv) : "memory");
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return (out == old);
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}
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inline static void
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read_barrier()
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{
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__sync_synchronize ();
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}
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inline static void
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write_barrier()
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{
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__sync_synchronize ();
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}
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#endif
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